JPH0650333B2 - Self-diagnosis device for controller for failure section detection device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a controller for a failure section detection device, which optionally, automatically and periodically checks whether or not its circuit function is normal. It is a thing.

[Prior art and its problems]

The controller for the faulty section detection device is installed for the purpose of minimizing damage in response to an abnormal condition that has occurred in the power line or electric power equipment in the distribution line and not affecting other healthy sections. To be done. Thus, the role of the controller for the faulty section detection device is important, and it must be able to operate reliably even in an abnormal state that rarely occurs. Therefore, it is necessary to regularly check whether the controller is functioning normally, but there are many installed units, and
Conventionally, there was a difficulty in inspection due to work problems caused by installation on a pillar. In addition, even if a periodic inspection is carried out, if the controller fails between one periodic inspection and the next, the discovery is delayed and an actual ground fault or short circuit accident occurs. However, there was a problem that it did not work and caused damage such as widespread blackouts and power transmission to the accident point.

[Object of the Invention]

The present invention solves the above-mentioned conventional problems and enables the controller itself to have a self-diagnosis function of the circuit state so that when an abnormality occurs in the circuit, an alarm is issued to promptly perform repair and inspection. The purpose of this is to improve the reliability of the controller.

[Conventional Embodiment] FIG. 3 shows an integrated circuit diagram of a failure section detecting and disconnecting device.
(1) is a section switch, (2) is its main contact, (3) is a closing electromagnet coil, (4) and (5) are connected to the main contact (2) of the section switch (1). The operation transformers whose primary side is connected to the distribution lines (6) and (7) on the power supply side and the load side, respectively, supply the operation power to the controller (8). One of the secondary terminals of the operating transformers (4) and (5) is connected to terminals A and D, and the other is connected to the common terminal B.
One terminal of the coil (3) is connected to the terminal C and the other terminal is connected to the terminal B, respectively.

FIG. 4 is a block diagram showing a circuit example of a conventional controller for a failure section detection device. In the figure, A is the power source side (hereinafter referred to as A
Side), D is a load side (hereinafter referred to as D side), B is a common voltage input terminal, and C is an output terminal for driving a closing electromagnet. (11) is a power supply selection circuit that selects and outputs either the A side power supply or the D side power supply, and selects the side to which power is supplied first in the case of a double-sided power failure state.

The secondary side output terminals E and F of the power source selection circuit (11) are connected to the control power source circuit (12) through the CSb contact of the operation switch CS and the control transformer T _1, and the secondary side terminal G controls the control circuit. Supply control power to each part.

The operation switch CS has three notch control positions of "return ON", "ON", and "OFF", where "ON" is the position during steady operation,
“OFF” is a position where the control circuit is disconnected and operation is stopped, and “return ON” is a position which is temporarily taken to return the control circuit to the operating state when the lock operation is performed, and returns to the ON state after the operation. The switch CS has three contacts, the CSb contact is ON / OFF at the notch of return / on, OFF at the notch of OFF, and the other two contacts CSa ₁ and CSa ₂ are both ON / OFF at the notch of return / incoming. Turns off at the cut notch. Connect from terminal E to output terminal C via CSa ₂ contact.

Reference numeral (13) is a first memory circuit, which permanently stores the operation history of the controller circuit, selects whether or not the lock operation is possible according to the memory state, and controls the operation of detecting the faulty section of the distribution line.

When the control power is supplied in a normal state, the first memory circuit (13) immediately outputs an output. This output is applied to the X timer (15) via the X time settling circuit (14),
(15) starts clocking, X timer after a predetermined X time has passed
(15) outputs and gives a signal to the output circuit (16) through the inhibit circuit INH ₂ . The output circuit (16) immediately outputs an output to energize the output relay MC. Connect from the terminal E to the output terminal C via the contact MCa of the output relay MC, the contact MCa is closed by the energization of the output relay MC and output to the terminal C, the electromagnet (3) of the classification switch is excited, and the classification switching is performed. Bowl (1)
Is thrown in.

The output of the output circuit (16) also gives a signal to the Y timer (17) of the output circuit (16), the Y timer (17) starts clocking, and the Y timer (17) starts after a predetermined Y time elapses. Output. Y timer
The output of (17) gives an inhibit signal to the inhibit circuit INH ₁ to stop the reset signal, and also gives a set signal to the first memory circuit (13) to set it.

The first memory circuit (13) enters the output state, maintains this state, and enters the steady closing state. When power is retransmitted after power failure in this state, the first memory circuit (13) immediately outputs an output and repeats the above operation.

The output signal of the output circuit (16) is also given to the Z ₁ timer (18). In the event of a momentary power failure, the Z ₁ timer maintains the output signal for Z ₁ hours and drives the output circuit when the power is restored. , Output is continued. From the output terminal G of the control power supply circuit (12), CSa ₁ gives a signal to the input terminal of the output circuit (16) through a contact, and forcibly drives the output circuit (16) at the time of “return on / off”.

Inhibit circuit IN from the input terminal of X time settling circuit (14)
A signal is given to the X indicator lamp (19) via H _5, and an inhibit signal of the circuit INH ₅ is given from the output terminal of the output circuit (16).
The X indicator light (19) indicates that the X timer (15) is operating. A signal is given from the input terminal of the Y timer (17) to the Y indicator lamp (20) via the inhibit circuit INH ₆ , and the circuit IN
The inhibit signal H ₆ gives the output terminal of the Y-timer. The Y indicator light (20) indicates that the Y timer (17) is operating.

A side voltage detection circuit from terminals A and B through control transformer T ₂
It connects to (21) and outputs to the secondary side output terminal H. D side voltage detection circuit from terminals D and B through control transformer T ₃ (22)
, And outputs to the secondary side output terminal J. Terminal H,
Input to the loop prevention circuit (23) from J, this circuit (23)
It outputs when both side D and D side power supplies are applied at the same time and gives a reset signal to the first memory circuit (13) through the inhibit circuit INH ₁ to lock the closing control circuit. Circuit IN
The inhibit signal of H ₁ is sent to the Y timer (17) as described above.
, And the reset operation is blocked when the Y timer is output.

An input signal from the output terminal J of the D side voltage detection circuit (22) to the circuit INH ₁ via the inhibit circuit INH ₃ and the circuit INH ₂
Give an inhibit signal to. The second storage circuit (24) stores the power transmission states of the A-side and D-side power supplies (21, 22), the operation history of the controller (8), and particularly the output state of the Y timer (17). According to the above, whether or not to output the lock signal is selected to control the reverse transfer lock operation. The storage circuit (24) receives the set signal from the Y timer output terminal P ₂ and the A side voltage detection circuit (21).
A reset signal is applied to each of the output terminals H through the inhibit circuit INH ₄ . The output of the memory circuit (24) gives an inhibit signal to the inhibit circuit INH ₃ via the changeover switch SW. The inhibit signal of the inhibit circuit INH ₄ is given from the Y timer output terminal P _{2 and} the output terminal J of the D side voltage detection circuit (22), respectively.

The switch SW selects whether or not to make the reverse feed lock conditional. When the switch SW is closed, the switch SW operates according to the storage state of the storage circuit (24), that is, the storage circuit (24) is in the reset state. It is locked only when it is opened, and when it is opened, it is locked unconditionally if a backward signal is output. The Z ₂ timer supplies an output to the inhibit circuit INH ₄ for a predetermined time to provide an insensitive time zone for reverse transmission lock when a power failure occurs after the Y timer (17) outputs, and the state of the distribution line is stabilized. The detection judgment is made later.

Next, the operation of the one configured as above will be described.

First, the state during normal power transmission is selected by the power supply selection circuit (11) by the power supply on the previously transmitted side, power is supplied to each part, and power is supplied from the power supply side and the load side, respectively. At this time, the place where the output is output is that the A side voltage detection circuit (21), the D side voltage detection circuit (22), the control power supply circuit (1
2), loop prevention circuit (23), first memory circuit (13), second memory circuit (24), output circuit (16), Y timer (17), Z ₁ timer (18), Z ₂ timer (25).

(1) Progressive operation When power is transmitted from the A power supply side, the power supply selection circuit (11) and transformer T
Power is supplied to the control power supply circuit (12) from ₁
When (12) outputs an output, the storage circuit (13) stores the output state, so the storage circuit (13) also outputs an output. as a result On the other hand, transformer T ₂ → A side low voltage detection circuit (21) → INH ₄ → memory circuit (24) reset The X timer maintains the output, but the output signal is INH
Keep the state cut by ₂ .

(2) Back-feeding operation When power is transmitted from the load side (D side) after a power failure, the memory circuit (13) stores the output state.
When 2) outputs an output, the memory circuit (13) also outputs.

Then, the X timer receives an instantaneous input, but it is reset immediately and it locks and does not turn on.

In the case of SII type (SW closed) The memory circuit (24) stores the output state and the control power circuit (1
As soon as 2) outputs, the memory circuit (24) also outputs.

Thereafter, the same operation as the progressive operation is performed, and power is transmitted from the D side to the A side.

(3) Power failure closing constraint operation within the detection time During progressive operation, if the output circuit (16) is ON and there is a power failure due to a line accident or the like during Y time, the following operations will stop. Therefore, the memory circuit (13) remains in the reset state, and the memory circuit (13) does not output even when power is transmitted next time, so the control circuit does not enter the operating state, that is, it is locked and the switch (1) is closed. Not done.

(4) Dual power supply restraining operation Memory circuit (13) → X timer (X time tick) (5) Short-time power transmission progressive operation When power is transmitted from the power supply side and a power failure occurs during X hours, (6) Restoration operation for reverse power failure during X hours (7) Power inactivity restraint insensitive operation during X hours When power is retransmitted from the power supply side within Z ₂ hours after power failure during normal power transmission, Therefore, the next time power is transmitted from the load side, the condition in (6) above is not satisfied and the lock does not occur → The same operation as the reverse operation (8) Release of closing constraint (9) Open delay operation When the controller (8) is closed, the output circuit outputs and Z ₁
Self-holding by the timer (18). When a power failure occurs in this state, the Z ₁ timer continues to output the output signal for Z ₁ hours,
If the power supply is restored within _one hour, the output circuit will be activated immediately by the Z ₁ timer output, and the output will be output to turn on the switch (1). When the power is restored after Z ₁ hour or more, Z ₁
The output of the timer has disappeared, and the forward or reverse operation is started. In this case, the output relay MC is once opened by the disappearance of the output of the control power supply circuit (12) due to a power failure.

(10) Manual operation ・ When the operation switch CS is set to the "on / return" side, the contact CS
a ₁ and CSa ₂ are closed. Contact CSa ₁ is an output circuit (16)
To drive the input signal directly to the
The contact CSa ₂ bypasses the output contact MCa and outputs an output to the terminal C to turn on the switch (1) even if the controller fails.

When the operation switch CS is set to the "OFF" side, the power supply circuit is cut off at the contact CSb and the output of the control power supply circuit (12) is lost, so that the output of the controller circuit is lost and the switch (1) is opened.

· The operation switch CS when the "On" contact CSb closed, contacts CSa _1, CSa ₂ is opened, the operation to the above (1) to (9).

(11) Others (a) The voltage detection circuits (21, 22) detect the minimum voltage (15V to 25V) and the reverse transfer constraint minimum voltage (15V to 25V) for both power supplies, and apply a voltage exceeding the minimum voltage. Output to the secondary side.

(b) The loop blocking circuit (23) has a built-in timer for dual power supply restraint minimum time, which outputs both power supply after a predetermined time.

Example of the present invention

FIG. 1 is an integrated circuit diagram of a faulty section detecting / separating device of the present invention,
FIG. 2 is a block diagram showing an embodiment of the present invention and has a configuration partially similar to that of FIGS. 3 and 4, and the same or corresponding portions are denoted by the same reference numerals and the description thereof will be omitted.

Explaining the difference between FIG. 1 and FIG. 3, a check relay group (81) and an operating state detecting means group (82) are added in the circuit of the failure section detection controller (8), and another Diagnostic device
(9) The self-diagnosis operating device (10) is provided. Self Diagnostic Device (9)
A central processing unit (hereinafter referred to as CPU) (91),
Interface (9) between CPU (91) and controller (8)
2) The interface (93) between the CSU (91) and other circuits in the self-diagnosis device (9), the output relay group (94), and the circuit abnormality display device (95) are built in. The operating device (10) incorporates a circuit abnormality output device (101) and an optional diagnosis input device (102).

The controller (8) has an input terminal Mi (i = i) for the relay group (81).
1, 2, ... 9), and output terminals Pj (j = 1, 2, 3) for the operating state detection means group (82) are provided, and the self-diagnosis device (9) is provided with the same terminals corresponding to Mi and Pj. Connected to each other by providing terminals of reference numeral, and further CPU in the device (9) through the interface (92).
Connect to (91). Interface (93) from CSU (91)
Via the internal terminal Mk ′ (k = 10, 11, ... 14) to the output relay group (94), and further through the output relay group to the output terminal Mk (k = 10, 11, ... 14) Derive to. Further, a terminal having the same sign is provided and connected to the circuit abnormality display device (95) corresponding to the terminal Mk '. In this case, M14 'is excluded. An input terminal S is provided from the microcomputer (91) through the interface (93). The operating device (10) is provided with terminals having the same symbols corresponding to the terminals Mk and S, and is connected. In the operating device (10), the terminal Mk (k = 10, 11, ... 14) is a circuit abnormality output device ( 101), the terminal S is connected to the optional diagnosis input device (102).

The inspection relay group (81) constitutes inspection circuit conditions when inspecting the internal control circuit of the controller (8), and includes auxiliary relays mi (i = 1, 2, ... 9) mi corresponds to terminal Mi, and input to terminal Mi activates relay mi. The operating state detecting means group (82) includes means for deriving, as a signal, the operating state of each element circuit requiring inspection in the internal control circuit of the controller (8), and these derived signals are terminals Pj (j =
1, 2, 3) and input to the CPU (91). For example, in this case, “X time end”, “Y time end”, “lock operation” and the like are targeted.

The CPU (91) operates the inspection relay group (81) by a predetermined program, drives the control circuit in a simulated manner, receives signals of the operating state of each element circuit, and determines whether the operation is normally performed. to decide. When driving this simulated circuit, measures are taken so as not to affect the actual operation of the circuit. The judgment of the circuit abnormality by the CPU (91) is output through the interface (93) and is displayed on the circuit abnormality display device (95), and at the time of arbitrary diagnosis input, the self-diagnosis operating device (via the output relay group (94). It is output to 10). Self-diagnosis operating device
The circuit (10) can give a signal from the circuit abnormality display device (101) to external control devices (not shown) to perform remote automatic control or the like.

The optional diagnosis input device (102) inputs a command to the microcomputer (91) when the inspection operation is forced to be re-executed during remote control. When the inspection operation is re-executed, it is executed after erasing the previous defect diagnosis result.

The circuit abnormality display device (95) is provided with, for example, "X time circuit abnormality display", "Y time circuit abnormality display", "lock circuit abnormality display", and "Z time circuit abnormality display".

The circuit abnormality output device (101) is provided with, for example, "X time circuit abnormality output", "Y time circuit abnormality output", "lock circuit abnormality output", "Z time circuit abnormality output" and "normal output". "Normal output" is output when all the inspections have been completed and no abnormality has occurred at the time of arbitrary diagnosis input.

Circuit error display device (95) display and circuit error output device
The output signal of (101) or the external display by that signal is
As described above, it is convenient to display the abnormality contents individually so that the failure contents can be found at a glance, but when individual display is not necessary, it is sufficient to collectively display the "abnormality display". A display lamp may be used as the display means, but more reliable display is possible if a mechanical or magnetic display mechanism is used so that the display can be performed without trouble even during a power failure.

Next, the place where FIG. 2 becomes FIG. 4 will be described. Below, each relay mi (i = 1, 2, ... 9) a contact, b contact, c
The contacts are contacts mia, mib, and mic, respectively, and when there are two or more contacts, they are sequentially numbered. In FIG. 2, the control voltage source of each element unit is supplied from the output terminal G of the control power supply circuit (12) via G ′ via the contact point m ₁ b, and directly from a part of the terminal G. The contact m ₁ a gives a timed circuit reset signal to the X timer. A drive signal is directly applied from the terminal G to the output relay MC via the contact m ₂ a. From terminals G and Z ₁ timer input terminals through terminals a and b of contact m ₃ C ₁ , respectively,
Connect to the energy storage power supply (18a) of the Z ₁ timer (18) from the terminal c. From terminals G and Y timer output terminals, through terminals a and b of contact m ₃ c ₂ respectively, and from terminal c to Y timer Z
₁ timer (hereinafter referred to as Y / Z ₁ timer) (17a) energy storage power source (17b), Y / Z ₁ timer (17a), then Y timer (1
Give a signal to 7).

The Z ₁ timer (18) stores the output signal for a predetermined time (Z ₁ hour) when the output circuit (16) is in the output state and an instantaneous power failure occurs, and outputs the signal immediately if the power failure is restored within that time. The charging power source (18a) is charged by the output of the output circuit (16) in a steady state, but the output circuit (16) during diagnosis may be turned off. At that time, in order to secure the Z ₁ hour energy storage power source, from the primary control power source terminal G
Charge via the m ₃ c ₁ contact. Y / Z ₁ timer (17a) is Z
Similar to the ₁ timer (18), when there is an instantaneous power failure in the Y timer output state, the output signal is memorized for a predetermined time (Y · Z ₁ hour), and if the power is restored within that time, a signal is given immediately and the Y timer (17) ) Is returned to the output state, and as a matter of fact, if the output circuit (16) can maintain the output state as described above, the first memory circuit (13) has already output by the Y timer (17) before the power failure. Since it is in the set state, there is no problem even if the Y timer (17) is timed again, but this Y
· Z ₁ to allow return the output of the Y-timer when a momentary power failure by providing a timer (17a), so that eliminate unnecessary Y time clocking operation. The energy storage power supply (17b) of the Y · Z ₁ timer (17a) is charged by the output of the Y timer (17) in a steady state, but the Y timer output may be turned off during diagnosis, and at that time as well. To secure a Y / Z ₁ hour energy storage power source, charge from the primary control power source terminal G via the m ₃ c ₂ contact.

Contact m ₄ a is, as a power source for energizing supply (26) to the power supply at all times than the primary control power terminal G is supplied to provide a set signal in the memory circuit (13) and (24). A signal is given from the terminal G to the output terminal of the output circuit (16) via the contact point m ₅ a. This is to omit the waiting time (X time) of the X timer at the time of diagnosis.

The Z ₂ timer has a residual voltage for a while after the accident power failure, and it becomes the same phenomenon as when the A side accident is detected after the power is restored.
Since there is a risk of locking operation during power transmission on the side,
The input to the second memory circuit is cut off for a predetermined time (Z ₂ hours) for the residual voltage to disappear, that is, an inhibit signal is supplied to the inhibit circuit INH _4, and the lock circuit is clocked after Z ₂ hours. Is to restore. This Z ₂
The time is the reverse lock insensitive time.

Connect from terminal G via contact point m ₆ a to Z ₂ timer (25) power storage power source (25 a) for clocking. This energy storage power source (25a) is a Y timer
It is charged by the output of (17), and when the output of the Y timer (17) at the time of power failure disappears, the Z ₂ timer is generated by this accumulating power supply (25a).
(25) clocks Z ₂ hours, but Y timer (17) during diagnosis
Since it may be turned off, at that time, charging is secured from the primary control power supply terminal G through the contact point m ₆ a, and it is possible to shift to the steady operation at any time. Output terminal P of Y timer (17)
Insert the contact m ₇ b into the inhibit signal circuit to the inhibit circuit INH ₄ given from the output terminals of the ₂ and Z ₂ timers, and open this contact m ₇ b during diagnosis to output the output signal of the A side voltage detection circuit (21). Then, the reset signal circuit to the second memory circuit (24) is brought into conduction so that it can be reset. As a result, it is possible to display the status of Z ₂ timer completion of Z ₂ time and check the operation of the reverse feed lock and the _dual power supply lock.

The power input circuit of the voltage detection circuit of the A-side and D side (21, 22), each insert a contact ₈ b, m ₉ b, at diagnosis of these contacts m ₈
By opening / closing b, m ₉ , the presence / absence of power on the A side and D side is displayed.

Next, the operation of the one configured as above will be described.

The normal operation of the controller (8) of the original failure section detection device of this circuit is exactly the same as the operation in the circuit of FIG. 4, and the different parts, especially the diagnostic operation will be described here.

The diagnostic unit is composed of a self-diagnosis device (9), a self-diagnosis operating device (10), an inspection relay group (81) built in the controller (8), and an operation state detection means group (82). The CPU (91) in (9) comprehensively controls the operation. The diagnostic operation starts when the distribution line feeder to which the failure detection device belongs operates in a stable state and is in a normal power transmission state. For example, 5 minutes have elapsed since the controller (8) of the failure detection device completed X hours. Set to start inspection later, CP
According to a program preset in U (91), each item is diagnosed in a fixed order and cyclically repeated.

The content of the diagnosis shows typical operation in the same pattern as the actual operation state, inspects whether the function of each element circuit is within the specified range, and judges whether it is good or bad. It is displayed on the display device (95) and is output to the operation device (10) according to a command from the CPU (91). Display (95)
With the display, it is possible to detect abnormalities in patrol inspection and take corrective action.

The operating device (10) cooperates with a remote control central device (master station) to enable remote monitoring control. When it is determined to be abnormal by the diagnosis, the diagnosis is stopped by the command of the CPU (91), and the control circuit returns to the steady operation state. Further, the diagnosis operation is immediately interrupted when a change in the circuit such as a power failure or an accident occurs, the operation is shifted to a steady operation, and then the diagnosis is restarted when the feeder becomes in a stable state.

Generally, it is desirable that the order of the diagnostic items follows the order of the steady operation, but since there are some cases that are sudden, the order of the operations is stored in advance as a program and the operation is performed according to the program. As a specific example, for example, the diagnostic items and the diagnostic order are as follows.

X-time function Y-time function Y-time power failure turn-on lock function X-time power failure reverse-feed lock function X-time dual power-on lock function The operation and functions of relay group mi (i = 1, 2, ... 9) are as follows. On the street.

m ₁ ... contact m ₁ b by forcibly closing than the primary-side control power secondary control power circuit, to emerge whether the state of the control power by transmission power failure of the power distribution line. At the same time, X when power is lost due to m ₁ a
Acts as a timer reset function.

m ₂ … During diagnosis (m _{1 is} operating) Contact relay m ₂ a Output relay MC
Is forcibly turned on, and the main circuit is in a steady operation state (power transmission state)
Therefore, the actual main circuit will not be affected by any operation of the control circuit.

m ₃ ... Y · Z ₁ timer, Z ₁ timer Switch to store energy by supplying power to the energy storage power supplies (18a) and (17b) for operation after power is lost both during steady state and during diagnosis In the steady state, the contacts m ₃ c ₁ and m ₃ c ₂ charge the output of the output circuit (16) and the output of the Y timer (17). During diagnosis, the primary control power supply terminal G is switched to charge. As a result, the operating power supply for the Y timer and Z ₁ timer is always secured after the power supply disappears.

m ₄ ... At the time of diagnosis, the first and second memory circuits are connected by the contact m ₄ a.
(13) and (24) are forcibly set to show the power recovery state after a power failure during normal power transmission. This is to forcibly return to a normal state such as when the control circuit is locked by the diagnosis.

m ₅ ... At the time of diagnosis, a signal is applied to the output circuit of the output circuit (16) by the contact point m ₅ a to forcibly generate the output signal, and the X timer signal causes the output circuit to output an output.

m ₆ ... in diagnostics, to charge the energy-storing power (25a) from the terminal G by contact m ₆ a, the compensation of the Y timer output loss by the diagnostic operation.

m ₇ … By opening the contact m ₇ b, the inhibit signal sent from the energy storage power supply (25a) for the reverse feed lock insensitive time (Z ₂ hours) is cut, and the second memory circuit (24) is reset. to enable. That is, it is possible to display the status of Z ₂ timer completion of Z ₂ time and check the operation of the reverse feed lock. In this state, when the second memory circuit (24) is reset by the output of the voltage detection circuit (21) by applying the A side power supply, the inhibit of the inhibit circuit INH ₃ is cut, and the voltage detection circuit ( When the output of 22) is output, the first memory circuit is reset by the output thereof and the output of the loop blocking circuit (23), and the switch (1) is opened.
(In this case, the output of the Y timer is off due to the power failure immediately before.

disconnecting the input circuit of the A-side voltage detecting circuit (21) by m ₈ ... contact m ₈ b, thereby revealing the power failure condition of the A-side power supply.

disconnecting the input circuit of the D-side voltage detecting circuit (22) by m ₉ ... contact m ₉ b, thereby revealing the power failure condition of the D-side power supply.

Next, the sequential diagnosis operation will be described.

(21) First, in the state of normal power transmission, the power source on the side that was previously transmitted is selected by the power source selection circuit (11), and power is being supplied to each part, and voltage detection signals from the power source side and load side respectively. Is being supplied. At this time, the first storage circuit (13) stores the output state and outputs it at the same time as the power is supplied. In addition to that, the voltage detection circuit (21), the D side voltage detection circuit (22), Control power circuit (12), loop blocking circuit (2
3), first and second memory circuits (13), (24), output circuit (16), Y
Timer (17), Z ₁ timer (18), YZ ₁ timer (17
a) and Z ₂ timer (25).

To display the simulated power failure state from this state, m ₁ , m ₂
The output relay MC is forcibly held and the control circuit is disconnected at the contact m ₁ b. As a result, all circuits after the m ₁ b contact are opened, and a power failure occurs.

(22) Progressive operation (,) When the m ₁ relay is opened and the contact m ₁ b is closed, the memory circuit (13) outputs the output immediately because it stores the output state. (P
₃ : ON) (In this case, relay m ₉ is energized and contact m ₉ b is opened.) As a result, The X timer maintains the output but its output signal is INH ₂
Continue to be cut by. If the power is passed for a predetermined time in this state, the normal power transmission state is entered, and it is determined that the function of is normal.

(23) Power failure closing lock operation within Y time () When the output circuit (16) is ON during the progressive operation, the relay m _{1 is} energized and the contact m ₁ b is opened during the Y time interval. The following operations stop. In this state P _3: remains OFF, the relay m ₁ de-energized, the contacts m ₁ b closed and the time X-timer is inoperative i.e. X time elapsed after P ₁ if left in the OFF lock operation viz feature Judge as normal.

(24) Reverse lock operation during power failure during X hours () During forward operation, during contact with X time, contact m ₁ b open, contact m ₈ b open (contact
m ₉ b is left open from the beginning) and a power failure occurs,
Power transmission from the power supply side (A side) → Blackout during X hours → Memory circuit (2
4) is reset.

Next, when the contact m ₁ b is closed and the contact m ₉ b is closed to set the reverse feed state, the D side voltage detection circuit (22) → INH ₃ → INH ₁ → storage circuit (1
3) Reset → lock _{(P 3: OFF) P 3} : detecting that it has been locked by OFF, the determination and locking operation properly.

(25) Dual power-on lock operation during X time () Sequential operation During X time interval (at this time, m ₁ b closed, contact m ₈ b closed,
Contact m ₉ b Closed.

P _3: detecting that it has been locked by OFF, the determination and locking operation properly.

(26) Z time operation When the forward operation is completed and normal power transmission is in progress, the contacts m ₁ b, m ₈ b, m ₉ b are opened respectively, and after Z hours, each contact is returned to the closed signal P
If the states of ₁ , P ₂ , and P ₃ do not change, it is determined that the Z time operation is normal.

After the diagnosis of (21) to (26) is completed, the diagnosis is repeated cyclically every predetermined time.

If any of the above diagnostic items is judged to be out of order from the predetermined results, the microcomputer (91) outputs the output device (9
5), and relay mi (i = 10, 11, ... 1
Output to the operating device (10) via 3).

In order to reconfirm the diagnosis result, if the arbitrary diagnosis input device (102) of the operation device (10) is operated, the abnormality output and the abnormality display are returned to a blank sheet and the diagnosis is repeated. If there is an abnormality, it is again displayed and output. Further, in this case, the diagnosis of (21) to (26) is finished, and if there is no abnormality, it is judged to be normal and is output to the “normal output” via the relay m ₁₄ .

In the above description, what is represented by a relay or a relay contact may be a non-contact type such as a semiconductor, a magnetic amplifier, a magnetic storage device, or the like, and those generally used as a circuit opening / closing means can be used.

〔The invention's effect〕

In the fault zone detection controller installed on the distribution line, a means for automatically diagnosing the self-function at regular time intervals, a means for automatically diagnosing the self-function by an external diagnostic input, and a function for determining whether the function is normal or abnormal according to the diagnosis result. A means to output and display to the outside and a means to function instead of the circuit in case of abnormality are provided, so a warning is issued when an abnormality occurs in the circuit and it can be easily found during patrol, and prompt repair and inspection. Therefore, it is possible to improve the reliability of the controller, minimize damage caused by an abnormal state occurring in the power line and power equipment in the distribution line, and prevent other healthy sections from being adversely affected.

[Brief description of drawings]

FIG. 1 is an integrated circuit of a fault zone detection device of the present invention, FIG. 2 is a block diagram showing an embodiment of the present invention, FIG. 3 is a general circuit diagram of a conventional fault zone detection device, and FIG. A block diagram showing a circuit example of a controller (8) for a faulty section detecting device,
The figure is an illustration of a partial element circuit. (1): Category switch, (2): Main contact, (3): Electromagnet coil for making, (4), (5): Operation transformer, (6): Power supply side distribution line,
(7): Load side power distribution line, (8): Controller, (81): Relay group,
(82): operating state detection means group, (9): self-diagnosis device, (9
1): central processing unit (CPU), (92), (93): interface, (10): self-diagnosis operating device, (101): circuit abnormality output device, (102): arbitrary diagnosis input device, CS: operation switches, SW: change-over switch, INH ₁ ~INH _5: inhibit _{circuit, CSa 1, CSa 2, CSb} : operation switch _{contacts, m 1 b, m 2 a} , m 3 c 1, m 3 c 2, m 4 a , m ₅ a, m ₆ a, m ₇ b, m ₈ b, m
₉ b: Switching means (relay contact, MC: output relay, L: indicator light, T ₁ , T ₂ , T ₃ : control transformer, A: power supply side operation terminal, D: load side operation terminal, B: common Operation terminal, C: Output operation terminal, E, F: Operation power supply terminal,
G: Primary control power supply terminal, G ': Secondary control power supply terminal, H:
A side voltage detection circuit output terminal J: D side voltage detection circuit output terminal P ₁ : X timer output terminal, P ₂ : Y timer output terminal, P ₃ : First storage circuit output terminal.

Claims (6)

[Claims] 1. A fault having a power supply selection circuit for selecting either the power supply side or the load side of a distribution line section switch, which is operated by a control power supply provided by this power supply selection circuit to drive and control the section switch. The section detection device controller stores its own output state and outputs when the power is restored in the output state when the power is restored.The memory circuit (13) operates by the output of the memory circuit (13) to open / close the section after the power is applied. Clock the predetermined time X until the container is loaded,
X timer (15), X timer (1
5) Output circuit (16) that operates by output and drives the classification switch, Y timer that outputs a predetermined time Y to detect the presence or absence of load side accident after the classification switch is turned on and outputs when the timing is completed (1
7), each element circuit such as a Z time circuit (18) that temporarily stores the output of the output circuit (16) and restores the output in the event of a momentary power failure, and the memory circuit (13) is the output of the output circuit (16) In the controller for the faulty section detecting device which is reset by the output of the Y timer (17) and is output in the set state, the secondary control for supplying the above-mentioned control power source to each element circuit as the primary control power source. Switching means (m ₁ b) inserted between the power supply and the simulated power failure state, output relay MC for switching the classification switch
Is connected directly to the primary control power supply and the opening / closing means (m ₂ a) that forcibly maintains the closed state, and the charging power supply circuit (18a) of the Z ₁ time circuit (18) is provided with a charging circuit from the primary control power supply during diagnosis Opening / closing means (m ₃ c
₁ ) Opening / closing means (m) forcibly setting the memory circuit (13) using the energy storage power source (26) charged by the primary control power source as a power source
₄ a) Switching means (m ₅ a) forcibly applying a signal from the primary control power supply to the output terminal of the output circuit (16), these switching means (m ₁ b,
_{m 2 a, m 3 c 1} , m 3 c 2, m 4 a, m 5 a) its own failure period detector control unit, characterized in that it comprises a central control unit for program control (91) Diagnostic device. 2. A Z time circuit (17a) which is attached to a Y timer (17) and restores its output in the event of a momentary power failure, and the energy storage power supply circuit (17b) of this Z time circuit (17a) is primary for diagnosis. The self-diagnosis device for a controller for a faulty section detection device according to claim 1, further comprising an opening / closing means (m ₃ c ₂ ) for forming a charging circuit from the control power source. 3. An X-timer output signal P ₁ , a Y-timer output signal P ₂ , and a memory circuit (13) output signal P ₃ are input to the central processing unit (91) as data indicating the state of the faulty section detecting device. A self-diagnosis device for a controller for a faulty section detection device according to claim 1. 4. The control for a fault section detecting device according to claim 1, further comprising a circuit abnormality display device (101) for displaying a diagnosis result by an output of the central processing control device (91). Self-diagnosis device. 5. The fault section detection device according to claim 1, further comprising a circuit abnormality output device (101) for outputting a diagnosis result to the outside by an output of the central processing control device (91). Controller self-diagnosis device. 6. The fault section according to claim 1, wherein the self-diagnosis device (9) is provided with an arbitrary diagnostic input device (102) for arbitrarily giving an input for diagnostic operation from the outside. Self-diagnostic device for controller for detector.