JPH0650787B2 - Method for manufacturing semiconductor light emitting device - Google Patents
Method for manufacturing semiconductor light emitting deviceInfo
- Publication number
- JPH0650787B2 JPH0650787B2 JP15962384A JP15962384A JPH0650787B2 JP H0650787 B2 JPH0650787 B2 JP H0650787B2 JP 15962384 A JP15962384 A JP 15962384A JP 15962384 A JP15962384 A JP 15962384A JP H0650787 B2 JPH0650787 B2 JP H0650787B2
- Authority
- JP
- Japan
- Prior art keywords
- crystal growth
- layer
- light emitting
- semiconductor
- emitting device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/223—Buried stripe structure
- H01S5/2238—Buried stripe structure with a terraced structure
Landscapes
- Semiconductor Lasers (AREA)
- Led Devices (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は半導体発光装置の製造方法に関するものであ
る。The present invention relates to a method for manufacturing a semiconductor light emitting device.
従来例の構成とその問題点 従来、半導体レーザや受光素子など化合物半導体を用い
た素子の作製には高品質なエピタキシャル膜の成長が必
要であり、液相成長法が既に実用的な技術として広く利
用されている。この液相成長法が気相成長法や分子線エ
ピタキシャル法、スパッター法などの他の方法と大きく
違う点は、溶媒金属中に溶け込んだ溶質と基板との熱平
衡状態からの少しのズレを利用して気相成長させる所に
あり、温度などによって溶質の過飽和度を制御すること
によって成長膜厚や速度を決めることができる。しか
し、他の気相成長法や分子線エピタキシャル法は非平衡
な状態で成長させており、成長膜厚や速度はソース源か
らの供給量によって律速されるという違いがある。従っ
て、液相成長法は基板の面指数や形状によって溶媒中に
溶け込む溶質の平衡濃度が異なったり、同一基板内に違
った面が存在したり、凹凸があることによって成長面の
形状に大きな差が生ずる。Conventional configuration and its problems Conventionally, the growth of high-quality epitaxial films is required for the production of devices using compound semiconductors such as semiconductor lasers and light-receiving devices, and liquid phase epitaxy has already been widely used as a practical technique. It's being used. The major difference between this liquid phase growth method and other methods such as vapor phase growth method, molecular beam epitaxy method and sputtering method is that a slight deviation from the thermal equilibrium state between the solute dissolved in the solvent metal and the substrate is used. The vapor-phase growth is performed by controlling the supersaturation degree of the solute depending on the temperature and the like, so that the growth film thickness and the growth rate can be determined. However, other vapor phase epitaxy methods and molecular beam epitaxy methods are grown in a non-equilibrium state, and there is a difference in that the growth film thickness and rate are controlled by the supply amount from a source source. Therefore, the liquid phase growth method has a large difference in the shape of the growth surface due to the equilibrium concentration of the solute dissolved in the solvent depending on the surface index and shape of the substrate, the presence of different surfaces in the same substrate, and the unevenness. Occurs.
第１図にその代表的な成長例を示す。Ｉｎを溶媒としＩ
ｎＰ基板上へのInGaAsP,ＩｎＰの液相成長を例にとって
説明すると第１図において、段差４を有する１００面の
ＩｎＰ基板１上にInGaAsP層２を成長させると、段差４
の近傍においては厚く段差から離れるに従って薄く成長
される。更に、ＩｎＰ層３を成長させると膜厚が厚くな
るに従って段差がなくなるように成長していく。このよ
うな成長法を利用した代表的な素子構成として埋込み型
半導体レーザの構成を第２図に示す。ｎ−ＩｎＰ基板５
上にInGaAsP層よりなる活性層６を形成し、更にｐ−Ｉ
ｎＰクラッド層７、キャップｐ−InGaAsp低抵抗層８を
形成する。これを逆メサ状にエッチングを施した後、ｐ
−ＩｎＰ層９およびｎ−ＩｎＰ層１０を成長させること
によって埋込みの構造の半導体レーザが構成される。こ
の場合においても埋込みＩｎＰ層９は逆メサ近傍ほど厚
く成長し、ＩｎＰ層１０の成長後は上面は平面になりや
すい。FIG. 1 shows a typical growth example. In as a solvent I
Liquid phase growth of InGaAsP and InP on an nP substrate will be described as an example. In FIG. 1, when an InGaAsP layer 2 is grown on a 100-sided InP substrate 1 having a step 4, a step 4 is formed.
In the vicinity of, it grows thicker and grows thinner as it goes away from the step. Furthermore, when the InP layer 3 is grown, it grows so that the step disappears as the film thickness increases. FIG. 2 shows the structure of an embedded semiconductor laser as a typical device structure using such a growth method. n-InP substrate 5
An active layer 6 made of an InGaAsP layer is formed on top of the active layer 6, and p-I
An nP clad layer 7 and a cap p-InGaAsp low resistance layer 8 are formed. After etching this in a reverse mesa shape, p
By growing the -InP layer 9 and the n-InP layer 10, a semiconductor laser having a buried structure is formed. Even in this case, the buried InP layer 9 grows thicker in the vicinity of the reverse mesa, and the upper surface of the InP layer 10 tends to be flat after the growth.
このようなレーザは多層構造のエピタキシャル成長およ
び埋込み成長の最低２度のエピタキシャル成長の工程を
有しており、逆メサ形状によって、埋込み成長の形状や
再現性に問題を生じ易く、また、空気中に一度出すこと
は埋込みエピ成長の界面附近には欠陥や歪が発生し易
く、劣化の原因となりやすい。さらに、第２図の活性層
６の巾は通常１．５μ〜２．５μｍで、埋込みエピタキ
シャル工程でたおれやすい。さらにこの巾をせまくする
ことは困難である。Such a laser has a process of epitaxial growth of a multilayer structure and at least two times of epitaxial growth of the buried growth. Due to the inverted mesa shape, the shape and reproducibility of the buried growth are apt to occur, and once in the air. Defects tend to cause defects and strains near the interface of the buried epitaxial growth, and cause deterioration. Further, the width of the active layer 6 shown in FIG. 2 is usually 1.5 μm to 2.5 μm, and is easily worn away in the buried epitaxial step. Furthermore, it is difficult to narrow this width.
発明の目的 本発明は分子線エピタキシャル法などの方向性を有する
ビーム状の非平衡な結晶成長法等で段差を有する基体上
に成長することによって新しい半導体発光装置の製造方
法を提供しようとするものである。An object of the present invention is to provide a method for manufacturing a new semiconductor light emitting device by growing on a substrate having a step by a beam-shaped non-equilibrium crystal growth method having a directional property such as a molecular beam epitaxial method. Is.
発明の構成 本発明は第１の水平面と第２の水平面との間にほぼ垂直
な段差面を有する半導体基板に対し、前記第１及び第２
水平面上にのみ方向性を有するビーム状の分子線を照射
する非平衡な結晶成長法にて第１の半導体層を前記第１
及び第２水平面に対して垂直に結晶成長させる垂直結晶
成長工程と、方向性を有するビーム状の分子線を照射す
る非平衡な結晶成長法にて前記第１の半導体層と逆の伝
導タイプの第２の半導体層を前記第１及び第２水平面と
共に前記段差面にも堆積されるように斜方に結晶成長さ
せる斜方結晶成長工程とを備え、前記垂直結晶工程と前
記斜方結晶成長工程の組み合せにより段差部に、表面が
前記段差部に平行なＰＮ接合を含む電流注入型発光部を
形成し、その他の部分に電流ブロッキング層を形成する
ことを特徴とする半導体発光装置の製造方法である。According to the present invention, there is provided a semiconductor substrate having a step surface which is substantially vertical between a first horizontal plane and a second horizontal plane.
The first semiconductor layer is formed on the first semiconductor layer by a non-equilibrium crystal growth method in which a directional beam-like molecular beam is irradiated only on a horizontal plane.
And a vertical crystal growth step of growing crystals perpendicular to the second horizontal plane, and a non-equilibrium crystal growth method of irradiating a directional beam-like molecular beam to a conductive type opposite to that of the first semiconductor layer. An orthorhombic crystal growth step of obliquely growing a second semiconductor layer together with the first and second horizontal planes so as to be deposited also on the step surface, the vertical crystal step and the orthorhombic crystal growth step. In the method for manufacturing a semiconductor light emitting device, a current injection type light emitting portion including a PN junction whose surface is parallel to the step portion is formed in the step portion by the combination of and the current blocking layer is formed in the other portion. is there.
実施例の説明 本発明を説明するための構造断面図を第３図に示す。Description of Embodiments A structural sectional view for explaining the present invention is shown in FIG.
第３図(a)は、段差を有する基体上１１に矢印の方向１
２より（基体１１の主面に対して垂直より）結晶成長し
た場合を示すもので、段差部１３には成長しないような
形状に成長層１４が成長する。FIG. 3 (a) shows the direction 1 of the arrow on the substrate 11 having steps.
2 shows the case of crystal growth from 2 (perpendicular to the main surface of the base 11), and the growth layer 14 grows in a shape that does not grow on the step portion 13.
(b)に示すような方向１２Ａより成長させた場合（基体
１１の主面に対して斜方に結晶成長）には成長層１５に
示されるようなほぼ均一層として断差部にも成長する。
(c)に示すような方向１２Ｂより成長を行なうと段差部
１３には成長層１６のように段差の影の部分には一部成
長しない層が形成できる。When grown in the direction 12A as shown in (b) (crystal growth oblique to the main surface of the substrate 11), a substantially uniform layer as shown by the growth layer 15 also grows in the cut portion. .
When the growth is performed in the direction 12B as shown in (c), a layer that does not partially grow can be formed in the step portion 13 like the growth layer 16 in the shadow of the step.
このように組成やｎ，ｐ等の伝導タイプをかえた各種の
層を段差を有する基体上に成長する場合、たとえば原
子、分子線方向と基板面方向の相対的位置を複数回かえ
て多層に構成すればよく、第１図(a)，(b)，(c)を組み
合せた構造をとることができる。When various layers having different compositions or conduction types such as n and p are grown on a substrate having steps, for example, the relative positions in the direction of atoms and molecular beams and the direction of the substrate surface are changed a plurality of times to form a multi-layer structure. It suffices to construct the structure, and it is possible to take a structure in which the structures shown in FIGS.
本発明の基本構成断面図を第４図に示す。ｎ型で段差を
有する禁制帯巾Ｅ1の半導体基体１７上に段差をはさん
だ第１および第２主面上にｐ型で禁制帯巾Ｅ2をもつ第
１の半導体層１８を有している。さらに第１，第２主面
および段差面に禁制帯巾Ｅ3の第２の半導体層１９が配
置される。また段差面においては少なくとも第２の半導
体層に接してｐ型で禁制帯巾Ｅ4をもつ第３の半導体層
２０を有し、これらの禁制帯の間にはＥ1，Ｅ2，Ｅ4＞
Ｅ3の関係がある。ｐ，ｎの伝導型は逆の構成でも良
い。第２の半導体層１９をｎ型層で構成すると第１，第
２主面上の第１の半導体層１８と第２の半導体層１９は
ｐ型とｎ型の接合を形成しているのに対し段差部におい
ては第３の半導体層２０と基体１７との間は逆のｎ型と
ｐ型の接合となり、１７および層２０に電極を施し、段
差部が順方向にバイアスされると電流は段差部のみに流
れ段差部で発光させることができる。従って、層１８と
層１９の接合が電流ブロッキング層として働いている。FIG. 4 is a sectional view showing the basic constitution of the present invention. An n-type stepped semiconductor band having a forbidden band width E 1 is provided on the first and second main surfaces having steps and a p-type first semiconductor layer 18 having a forbidden band width E 2. There is. Further, a second semiconductor layer 19 having a forbidden band width E 3 is arranged on the first and second main surfaces and the step surface. Further, the step surface has a third semiconductor layer 20 which is in contact with at least the second semiconductor layer and has a p-type forbidden band width E 4, and E 1 , E 2 , E 4 are provided between these forbidden bands. >
There is a relationship of E 3 . The conductivity types of p and n may be reversed. When the second semiconductor layer 19 is composed of an n-type layer, the first semiconductor layer 18 and the second semiconductor layer 19 on the first and second main surfaces form a p-type and n-type junction. On the other hand, in the step portion, the reverse n-type and p-type junction is formed between the third semiconductor layer 20 and the base body 17, and the electrodes are provided to 17 and the layer 20. When the step portion is biased in the forward direction, the current flows. It is possible to cause only the step portion to flow and emit light at the step portion. Therefore, the junction of layers 18 and 19 acts as a current blocking layer.
また、断面図に垂直方向に共振器を形成するとレーザ発
振を行なわすことができる。一例として、１７をｎ型Ｉ
ＮＰ，１８をＰ型ＩｎＰ，１９をｎ型InGaAsP層２０を
ｐ型ＩｎＰ層とすると、層１９のうち段差部１９Ａの方
分が活性領域となる。段差部を流れる電流２１はバンド
ギャップの小さい層１９をはさんだダブルヘヒテロ接合
を形成しているので効率良く再結合を活性領域１９Ａで
行なわすことができる。更に、上下方向にも各ＩｎＰ層
によって実効的に屈折率とじ込めを行なっている。段差
部はｐｎ接合のみであるが段差部以外の部分はｎｐｎｐ
の構造となり、電流はブロックされ、段差部にのみに狭
搾される。活性領域１９Ａを構成する層１９は高抵抗ｉ
層や量子井戸型多重層とすることもできる。さらに層１
８は一層にとどまらず複数のｐｎｐｎ等の多重ブロッキ
ング層とすることもできる。Moreover, laser oscillation can be performed by forming a resonator in a direction perpendicular to the cross-sectional view. As an example, 17 is an n-type I
When NP and 18 are P-type InP and 19 is an n-type InGaAsP layer 20 and p-type InP layer, the step portion 19A of the layer 19 becomes an active region. The current 21 flowing in the step portion forms a double hetero-junction across the layer 19 having a small band gap, so that recombination can be efficiently performed in the active region 19A. Further, the refractive index is effectively confined in the vertical direction by each InP layer. Only the pn junction is provided in the step portion, but the part other than the step portion is npnp
The structure is such that the current is blocked and is squeezed only at the stepped portion. The layer 19 forming the active region 19A has a high resistance i.
It may be a layer or a quantum well type multilayer. Further layer 1
The number 8 is not limited to one layer, and may be a multiple blocking layer such as a plurality of pnpn.
第４図(b)は第４図(a)構造の層１８，１９の成長順を入
れかえたものであり、第４図(a)と同様な効果を得るこ
とができる。また、ｐ，ｎ伝導タイプを置きかえても同
様な特性を得ることができる。材料的にもInGaAsP／Ｉ
ｎＰ系のみならずAl GaAs/GaAs系や他の半導体材料にお
いても同様である。このような段差を有する基板を用い
ることによって従来得ることのできない狭いストライプ
状のレーザを作成することができるとともに、単一モー
ドの発振を得る低しきい値レーザを実現することができ
る。また、段差部として必ずしも基体面に対して垂直で
ある必要はなく、第５図(a),(b)に示すような段差形状
においても同様な構成をとることができる。FIG. 4 (b) shows the order of growth of the layers 18 and 19 in the structure of FIG. 4 (a) changed, and the same effect as in FIG. 4 (a) can be obtained. Similar characteristics can be obtained even if the p and n conduction types are replaced. InGaAsP / I in terms of material
The same applies to not only nP-based materials but also Al GaAs / GaAs-based materials and other semiconductor materials. By using a substrate having such a step, it is possible to form a narrow stripe laser that cannot be obtained in the past, and it is possible to realize a low threshold laser that obtains single mode oscillation. Further, the stepped portion does not necessarily have to be perpendicular to the substrate surface, and the same configuration can be adopted even in the stepped shape as shown in FIGS. 5 (a) and 5 (b).
また、第６図に第３の実施例の断面図を示す。活性層１
９は基体１７とＬ字状のカギ型に接しており、レーザ発
振させた場合には発振したレーザ光の偏波面は基板面に
対して垂直と水平の２方向をとることができる。Further, FIG. 6 shows a sectional view of the third embodiment. Active layer 1
Reference numeral 9 is in contact with the base 17 and an L-shaped key, and when laser oscillation is performed, the plane of polarization of the oscillated laser light can be perpendicular to the substrate surface or horizontal.
発明の効果 基体に段差を有するものを使用することによって、 （１）１回のエピタキシャル成長の工程でダブルヘテロ
の埋込み型レーザをつくることができる。EFFECTS OF THE INVENTION By using a substrate having a step, (1) a double-hetero buried type laser can be produced in one epitaxial growth step.
（２）狭いストライプ状のレーザを精度よくつくること
ができる。(2) A narrow stripe laser can be produced with high precision.
（３）段差部の距離をかえることによって任意の活性層
巾を得ることができるため、１μｍ以下の活性層巾のも
のも容易に実現できしきい値を低下させることが可能と
なる。(3) Since an arbitrary active layer width can be obtained by changing the distance of the step portion, an active layer width of 1 μm or less can be easily realized and the threshold value can be lowered.
第１図は多層液相エピタキシャル法により形成された段
部での断面図、第２図は埋込み型半導体レーザの断面構
造図、第３図(a)〜(c)は本発明を説明するための構造断
面図、第４図(a),(b)は本発明の実施例の半導体レーザ
の断面構造図、第５図(a),(b)は基体の断面図、第６図
は本発明の別の実施例を示す断面図である。 １１，１７……基体、１８……ｐ型ＩｎＰ、１９……ｎ
型InGaAsP、２０……ｐ型ＩｎＰ。FIG. 1 is a sectional view of a step portion formed by a multi-layer liquid phase epitaxial method, FIG. 2 is a sectional structural view of an embedded semiconductor laser, and FIGS. 3 (a) to 3 (c) are for explaining the present invention. 4A, 4B are sectional structural views of the semiconductor laser of the embodiment of the present invention, FIGS. 5A, 5B are sectional views of the substrate, and FIG. It is sectional drawing which shows another Example of invention. 11, 17 ... Base, 18 ... p-type InP, 19 ... n
Type InGaAsP, 20 ... p type InP.
Claims (3)
垂直な段差面を有する半導体基板に対し、前記第１及び
第２水平面上にのみ方向性を有するビーム状の分子線を
照射する非平衡な結晶成長法にて第１の半導体層を前記
第１及び第２水平面に対して垂直に結晶成長させる垂直
結晶成長工程と、方向性を有するビーム状の分子線を照
射する非平衡な結晶成長法にて前記第１の半導体層と逆
の伝導タイプの第２の半導体層を前記第１及び第２水平
面と共に前記段差面にも堆積されるように斜方に結晶成
長させる斜方結晶成長工程とを備え、前記垂直結晶工程
と前記斜方結晶成長工程の組み合せにより段差部に、表
面が前記段差部に平行なＰＮ接合を含む電流注入型発光
部を形成し、その他の部分に電流ブロッキング層を形成
することを特徴とする半導体発光装置の製造方法。1. A beam-like molecular beam having directivity only on the first and second horizontal planes is applied to a semiconductor substrate having a substantially vertical step surface between the first horizontal plane and the second horizontal plane. A vertical crystal growth step of irradiating the first semiconductor layer perpendicularly to the first and second horizontal planes by a non-equilibrium crystal growth method, and a non-irradiation of a directional beam-like molecular beam. An oblique crystal growth method in which a second semiconductor layer having a conductivity type opposite to that of the first semiconductor layer is obliquely grown by a balanced crystal growth method so that the second semiconductor layer and the first and second horizontal planes are also deposited on the step surface. A rectangular crystal growth step, and a current injection type light emitting portion including a PN junction whose surface is parallel to the stepped portion is formed in the step portion by a combination of the vertical crystal step and the orthorhombic crystal growth step. Is characterized in that a current blocking layer is formed on The method of manufacturing a semiconductor light emitting device that.
を施すこと特徴とする特許請求の範囲第１項記載の半導
体発光装置の製造方法。2. The method for manufacturing a semiconductor light emitting device according to claim 1, wherein an orthorhombic crystal growth step is performed after the vertical crystal growth step.
を施すことを特徴とする特許請求の範囲第１項記載の半
導体発光装置の製造方法。3. The method for manufacturing a semiconductor light emitting device according to claim 1, wherein a vertical crystal growth step is performed after the orthorhombic crystal growth step.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15962384A JPH0650787B2 (en) | 1984-07-30 | 1984-07-30 | Method for manufacturing semiconductor light emitting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15962384A JPH0650787B2 (en) | 1984-07-30 | 1984-07-30 | Method for manufacturing semiconductor light emitting device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6136986A JPS6136986A (en) | 1986-02-21 |
| JPH0650787B2 true JPH0650787B2 (en) | 1994-06-29 |
Family
ID=15697762
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15962384A Expired - Fee Related JPH0650787B2 (en) | 1984-07-30 | 1984-07-30 | Method for manufacturing semiconductor light emitting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0650787B2 (en) |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5635486A (en) * | 1979-08-30 | 1981-04-08 | Sony Corp | Semiconductor laser |
| JPS57132384A (en) * | 1981-02-06 | 1982-08-16 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor laser device and manufacture thereof |
| JPS5818991A (en) * | 1981-07-28 | 1983-02-03 | Fujitsu Ltd | Semiconductor light emitting device and manufacture thereof |
| JPS5834988A (en) * | 1981-08-25 | 1983-03-01 | Nec Corp | Manufacture of semiconductor laser |
| JPS58102589A (en) * | 1981-12-14 | 1983-06-18 | Fujitsu Ltd | Semiconductor light emitting device |
| US4509996A (en) * | 1982-11-05 | 1985-04-09 | International Standard Electric Corporation | Injection laser manufacture |
-
1984
- 1984-07-30 JP JP15962384A patent/JPH0650787B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6136986A (en) | 1986-02-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |