JPH0650821B2 - D / A converter - Google Patents

Description

TECHNICAL FIELD The present invention relates to a D / A converter.

2. Description of the Related Art There is a D / A converter having a predetermined number of input bits for converting an input digital signal having a digit number equal to or larger than the input bit number into an analog signal. Such an example will be described with reference to FIG.

In FIG. 2, for example, a digital audio signal such as 1
An input digital signal having 18 bits of data is supplied to the level shift circuit 1 and the controller 2.

The level shift circuit 1 shifts the input digital signal by a predetermined number of digits according to the content of the shift control signal supplied from the controller 2, and increases or decreases the value of the digital signal at a predetermined ratio to increase the D / A converter 3 Supply to. D / A converter 3
Corresponds to 16 bits, generates a voltage level signal corresponding to the value represented by the supplied digital signal, and supplies the voltage level signal to the input terminal of the gain selection switch 4 constituted by a switch element such as a transistor.

The gain selection switch 4 selects 1 of the input resistance of the input circuit 5 provided in the preceding stage of the amplifier circuit 6 according to the content of the shift control signal supplied from the controller 2 and selects the voltage level signal. Supply to one end of the resistor. The input circuit 5 includes a plurality of resistors, one end of which is connected to each output end of the gain selection switch 4 and the other end of which is commonly connected to each other. The output of the input circuit 5 is amplified by the amplifier circuit 6 including, for example, an operational amplifier and output as an output analog signal. The gain of the amplifier circuit 6 is set by the selected resistance value of the input circuit 5. Each resistance value is determined so that the gain of the D / A conversion path formed of the circuits 1, 3, 4, 5 and 6 becomes a constant value, corresponding to the increase or decrease of the data value in the level shift circuit 1.

The controller 2 monitors the input digital signal, and controls the number of shift digits of the level shift circuit 1 and the resistance selection operation of the gain selection switch 4 by, for example, the maximum value of the input digital signal within a certain period.

Next, the operation of the apparatus will be described with reference to FIGS.

FIG. 3A shows a case where the input digital signal has a positive value of 18 bits and the signal "1" exists in 17 or more digits of the data. At this time, the controller 2 causes the level shift circuit 1 to shift the input data from the higher order (MSB) to 1
6 bits are supplied to the D / A converter 3, and at the same time, the gain selection switch 4 is made to select the input resistance so that the gain of the amplifier circuit 6 becomes 1. As a result, the output of the D / A converter becomes the output analog signal level as it is.

FIG. 3B shows a case where the signal "1" does not exist in 17 digits or more of the input digital signal. At this time, the controller 2 causes the level shift circuit 1 to supply the 16th bit of the second digit to the 17th digit of the input data signal to the D / A converter 3, and at the same time, the gain of the amplifier circuit 6 is set to 1 by the gain selection switch 4. Select the input resistance that becomes / 2. As a result, the voltage level signal converted by the D / A converter 3 to a level twice as high as the value represented by the input digital signal is attenuated to 1/2 by the amplifier circuit 6, and the voltage level signal corresponding to the value represented by the input digital signal is obtained. Is converted back to a voltage level signal of a different level and becomes an output analog signal.

FIG. 3C shows a case where the signal "1" does not exist in 16 digits or more of the input digital signal. At this time, the controller 2 causes the level shift circuit 1 to supply 16 bits of the first to 16th digits of the input digital signal to the D / A converter 3, and at the same time, the gain of the amplifier circuit 6 is set to 1 by the gain selection switch 4. Select the input resistance that becomes / 4. As a result, the voltage level signal output at a quadruple value in the D / A converter 3 is attenuated to 1/4 by the amplifier circuit 6, returned to the signal level corresponding to the original input digital signal, and output analog. Become a signal.

As described above, according to the above-mentioned device, when the value of the input digital signal of 18 bits decreases, the D / A corresponding to 16 bits usually
Lower 2 of the above input digital signals that are truncated in the conversion
It has the advantage of being demodulated to bits.

By the way, in the above-mentioned device, it is necessary to select each resistance of the input circuit 5 by the gain selection switch 4 in order to change the gain of the amplifier circuit 6, but at that time, the demodulation analog signal is interrupted or the signal path is changed. There is a problem that the distortion of the output analog signal increases due to the non-linearity of the transistor switching element of the inserted gain selection switch 4.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to use a conventional D / A converter for processing a predetermined bit to widen the dynamic range of an output analog signal beyond a predetermined bit and to provide an analog switch in a transmission path. D that can suppress distortion due to
A / A converter.

In order to achieve the above object, the D / A converter of the present invention comprises:
The digit number corresponding to the digital value of the input digital signal is set as the most significant digit, and a predetermined digit number of the input digital signal is digital-analog converted, and the analog signal obtained by the conversion is converted into the digital value of the input digital signal. A D / A converter which amplifies with a corresponding gain and derives this as an output analog signal, wherein the predetermined digit of the input digital signal is the highest digit when the operation command signal is generated. A mute means for outputting a number and outputting the predetermined basic digital level signal of the predetermined number of digits when the operation command signal disappears, and D for analog-converting the digital signal of the predetermined digit of the mute means. A / A conversion means and amplification for amplifying the converted output of the D / A conversion means with a gain corresponding to a predetermined digit number in the mute means. A plurality of D / A conversion paths each having a stage, and adding means for adding the amplified outputs of the amplification means in the D / A conversion paths to each other to obtain an output analog signal; and a digital value of the input digital signal. Accordingly, there is provided a control means for issuing the operation command signal to only one of the mute means in the D / A conversion path.

Example An example of the present invention will be described below with reference to FIG. In FIG. 1, for example, an input digital signal in which one data consists of 18 bits is a mute circuit 11,
It is supplied to the level shift circuit 12 and the controller 13.

The mute circuit 11 is a third digit of the input digital signal.
16-bit D / A while the 8th digit (upper 16 digits) is supplied from the controller 13 to the first operation command signal
Although it is relayed to the converter 14, if the first operation command signal is not supplied, the zero output corresponding to the basic digital level is output to the D / A.
It is supplied to the converter 14.

The D / A converter 14 converts the supplied digital signal into an analog signal and supplies it to the amplifier circuit 16 via the mute switch 15. The D / A converter 14 generates, for example, a ground level when the zero output described above is supplied. The mute switch 15 is a first switch that is generated when the first operation command signal is absent and slightly delayed after the first operation command signal disappears.
It is closed in response to the switch control signal to forcibly bring the input signal level of the amplifier circuit 16 to the ground level. Amplifier circuit 16
Has a gain of 1, for example, and amplifies the input level signal and supplies it to one input terminal of the adder circuit 17. Circuits 11, 14-
Reference numeral 16 constitutes a first D / A conversion path.

The level shift circuit 12 extracts 16 digits from the second digit to the 17th digit of the input digital signal and supplies it to the mute circuit 18, as described above with reference to FIG. The digital signal supplied to the mute circuit is shifted one digit higher than the original input digital signal, and the value of the digital signal is twice the value of the input digital signal. Mute circuit 18
Is a 16-bit D / A converter 19 during which the digital signal is supplied from the controller 13 to the second operation command signal.
However, if the second operation command signal is not supplied, the zero output corresponding to the basic digital level is supplied to the 16-bit D / A.
It is supplied to the converter 19.

The D / A converter 19 converts the supplied digital signal into an analog signal and supplies it to the amplifier circuit 21 via the mute switch 20. When the zero output is supplied, the D / A converter 19 generates, for example, the ground level. The mute switch 20 is closed in response to a second switch control signal that is generated when the second operation command signal is absent and that is generated slightly after the disappearance of the second operation command signal, and the amplifier circuit 21 is closed.
The input signal level of is forced to the ground level. The gain of the amplifier circuit 21 is 1/2 of the gain of the amplifier circuit 16, and the input digital signal level increased by the bit shift is attenuated to the original level and supplied to the other input terminal of the adder circuit 17. The amplifier circuit 16 or 21 is provided with a level adjusting circuit for making the output signal levels of the amplifier circuits 16 and 21 equal when the output signal levels of the D / A conversion paths should be equal to each other. .
The adder circuit 17 adds the output signals of the amplifier circuits 16 and 21 to obtain an output analog signal. Circuits 12, 18-
Reference numeral 21 constitutes a second D / A conversion path.

The controller 13 monitors the input digital signal, detects the peak level of the input digital signal within a predetermined time,
Based on this, one of the first and second operation command signals is always generated. When there are two D / A conversion paths, both operation command signals can be represented by a high level and a low level of a single binary signal.

Next, the operation of the apparatus will be described with reference to FIGS.

As shown in FIG. 3 (A), when "1" is present in the upper two digits of the input digital signal within the predetermined time, the controller 13 outputs the first operation command signal in synchronization with the clock timing signal (not shown). At the same time, the output of the second operation command signal is stopped so that the mute circuit 11 relays the input digital signal to the D / A converter 14 and at the same time causes the mute circuit 18 to generate a zero output. As a result, the D / A converter 14 generates a signal level according to the input digital signal in synchronization with the clock timing signal described above, and the D / A converter 19 generates the ground level at the same clock timing. The output signal of the D / A converter 14 becomes one input of the adding circuit 17 via the amplifying circuit 16. D / A
The ground level output from the converter 19 becomes the other input of the adder circuit 17 via the amplifier circuit 21. Therefore, only the output signal of the D / A converter 14 is output through the amplifier circuit 16 and the adder circuit 17 and becomes an output analog signal.

Further, the controller 13 stops the supply of the first switch control signal to the mute switch 15 and starts the supply of the second switch control signal to the mute switch 20. As a result, the output of the D / A converter 14 is directly supplied to the amplifier circuit 16, and the zero output of the D / A converter 19 is forcibly set to the ground level. By forcibly setting the input level of the amplifier circuit 21 to the ground level, the D / A converter 1
The fluctuation of the zero output level of 9 and the noise component are prevented from being superimposed on the output analog signal.

As shown in FIG. 3B, when "1" does not exist in the upper two digits of the input digital signal within the predetermined time, the controller 13 outputs the first operation command signal in synchronization with the clock timing signal described above. At the same time, the second operation command signal output is generated to cause the mute circuit 11 to generate a zero output, and at the same time, the mute circuit 18 relays the input digital signal to the D / A converter 19. This gives D
The / A converter 14 generates a ground level in synchronization with the clock timing signal, and the D / A converter 19 generates a signal level according to the input digital signal at the same clock timing. The ground level output from the D / A converter 14 becomes one input of the adding circuit 17 via the amplifier circuit 16. D /
The signal level output from the A converter 19 becomes the other input of the adder circuit 17 via the amplifier circuit 21. Therefore, only the output signal of the D / A converter 19 is amplified by the amplifier circuit 21 and the adder circuit 17.
Is output through the output signal and becomes an output analog signal.

Further, the controller 13 starts the supply of the first switch control signal to the mute switch 15 and stops the supply of the second switch control signal to the mute switch 20. As a result, the output of the D / A converter 14 is forcibly set to the ground level, and the output of the D / A converter 19 is directly supplied to the amplifier circuit 21. By forcibly setting the input level of the amplifier circuit 16 to the ground level, fluctuations in the zero output level of the D / A converter 14 and noise components are prevented from being superimposed on the output analog signal.

In this way, since only the selected D / A converter is activated at the digital conversion timing of the D / A converter, the demodulation analog signal is not interrupted by the channel selection switch unlike the conventional device, and the demodulation analog signal is not interrupted. Since a switch using a non-linear element such as a transistor is not inserted in series in the signal path, distortion does not occur.

In the embodiment, the example of the D / A conversion of the digital signal shown in FIGS. 3A and 3B has been described.
When processing a digital signal having no "1" in the upper three digits as shown in FIG. 6C by bit shifting, a D / A converter having the same configuration as the circuits 12 and 18 to 21 is added. Then, the bit shift circuit is set to a 2-bit shift circuit, and the gain of the amplifier circuit is set to 1/4. And the third
When there is no "1" in the upper three digits of the digital signal as shown in FIG. 6C, the controller 13 activates only the additional circuit.

EFFECTS OF THE INVENTION As described above, in the D / A converter of the present invention, a plurality of Ds corresponding to the magnitude of the input digital signal level are provided.
An A / A conversion path and addition means for adding the outputs of the respective D / A conversion paths are provided, and 1 is added according to the input digital signal level.
Since only the D / A conversion path of is activated, the dynamic range, which was limited to the number of bits of the D / A converter in the conventional circuit, can be expanded to the number of bits or more and the gain selection switch is It becomes unnecessary and there is no distortion of the demodulated analog signal, which is preferable.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing an embodiment of the present invention, and FIG.
FIG. 3 is a block circuit diagram showing a conventional example, and FIG. 3 is a D / A.
It is explanatory drawing for demonstrating operation | movement of a converter. Description of symbols of main parts 1, 12 ...... Level shift circuit 3, 14, 19 ...... D / A converter 11, 18 ...... Mute circuit 13 ...... Controller 15, 20 ...... Mute switch 16, 21 ...... Amplification Circuit 17 ... Addition circuit

Claims (2)

[Claims] 1. A digit number corresponding to a digital value of an input digital signal is set as the highest digit, and a predetermined number of digits of the input digital signal are digital-analog converted, and an analog signal obtained by the conversion is converted into the input digital signal. A D / A converter which amplifies by a gain corresponding to a digital value of a signal and derives this as an output analog signal, wherein a predetermined digit number of the input digital signal is highest when an operation command signal is generated. Mute means for outputting the predetermined number of digits and outputting the predetermined basic digital level signal of the predetermined number of digits when the operation command signal disappears,
D / A conversion means for analog-converting the predetermined number of digital signals output from the mute means;
A plurality of D / A conversion paths having an amplification means for amplifying the converted output of the A / A conversion means with a gain corresponding to a predetermined digit number in the mute means, and each of the amplification means in these D / A conversion paths Adding means for adding the amplified outputs to each other to obtain an output analog signal;
According to the digital value of the input digital signal, the D
A D / A converter having a control means for issuing the operation command signal to only one of the mute means in the / A conversion path. 2. The non-occurrence period of the operation command signal, the D / A
The D / A converter according to claim 1, wherein the supply of the converted output of the converting means to the amplifying means is cut off.