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JPH0652289B2 - Method for detecting incorrect IC terminal insertion - Google Patents
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JPH0652289B2 - Method for detecting incorrect IC terminal insertion - Google Patents

Method for detecting incorrect IC terminal insertion

Info

Publication number
JPH0652289B2
JPH0652289B2 JP62327598A JP32759887A JPH0652289B2 JP H0652289 B2 JPH0652289 B2 JP H0652289B2 JP 62327598 A JP62327598 A JP 62327598A JP 32759887 A JP32759887 A JP 32759887A JP H0652289 B2 JPH0652289 B2 JP H0652289B2
Authority
JP
Japan
Prior art keywords
terminal
power supply
component
voltage
ammeter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62327598A
Other languages
Japanese (ja)
Other versions
JPH01167682A (en
Inventor
善之 西城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hioki EE Corp
Original Assignee
Hioki EE Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hioki EE Corp filed Critical Hioki EE Corp
Priority to JP62327598A priority Critical patent/JPH0652289B2/en
Publication of JPH01167682A publication Critical patent/JPH01167682A/en
Publication of JPH0652289B2 publication Critical patent/JPH0652289B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明はプリント基板のリード穴に挿入したIC部品の
各端子の誤挿入を検出する方法に関する。
Description: TECHNICAL FIELD The present invention relates to a method for detecting erroneous insertion of each terminal of an IC component inserted in a lead hole of a printed circuit board.

従来の技術 近年、IC部品を実装したプリント基板は小形化と量産
化に適するため、種々の電子装置に採用され、需要が著
しく増加している。しかし、その使用に際してはIC部
品の実装状態を常に厳しく検査する必要がある。何故な
ら、適正に実装されていないと、IC部品の単なる損傷
に止まらず、装置全体の破壊に至ったりするからであ
る。このため、IC部品の各端子をプリント基板のリー
ド穴に挿入し、半田付けして実装した後、その挿入状態
が正常か、誤りかを検査する。尤も、一般にIC部品は
その表裏を明確に区別できる形状となっており、電源端
子と接地端子とは対称の位置にある。従って、通常は電
源端子と接地端子とが逆に挿入されていないか検査すれ
ば済むことになる。例えば、インサーキットテスタを用
いる場合には、IC部品に含まれるTTL回路等に付い
ている入力クランプダイオードやトランジスタのコレク
タと接地間にあるサブストレートダイオード等が作る電
流路を利用し、プローブの接触により第15図における
(イ)、(ロ)、(ハ)、(ニ)図の少なくとも1図に
示すようにIC部品10の電源端子12又は接地端子1
4と入力端子16又は出力端子18との間に定電流源2
0を与えて定電流を流し、その端子間の電圧(電位差)
を測定して正常挿入か誤挿入かを検査する。即ち、正常
挿入時の端子間電圧を先に測定して基準にし、その基準
電圧と対応する検査による測定電圧とを比較して、両電
圧の違いから誤挿入を検出する。なお、各基準電圧と対
応する検査による測定電圧が多い程、誤挿入を検出し易
くなると一応言える。
2. Description of the Related Art In recent years, a printed circuit board on which an IC component is mounted is suitable for miniaturization and mass production, so that it has been adopted in various electronic devices and the demand has increased remarkably. However, it is necessary to strictly inspect the mounting state of the IC component when using it. This is because if not properly mounted, the IC device is not only damaged but also the entire device is destroyed. Therefore, after each terminal of the IC component is inserted into the lead hole of the printed board and soldered and mounted, it is inspected whether the inserted state is normal or incorrect. However, in general, IC parts are shaped so that the front side and the back side thereof can be clearly distinguished, and the power supply terminal and the ground terminal are in symmetrical positions. Therefore, normally, it suffices to inspect whether the power supply terminal and the ground terminal are reversely inserted. For example, in the case of using an in-circuit tester, a current path created by an input clamp diode attached to a TTL circuit included in an IC component or a substrate diode between the collector of a transistor and ground is used to connect a probe. Therefore, as shown in at least one of (a), (b), (c) and (d) in FIG. 15, the power supply terminal 12 or the ground terminal 1 of the IC component 10 is
4 and the input terminal 16 or the output terminal 18 between the constant current source 2
0 is applied to apply a constant current, and the voltage (potential difference) between its terminals
To check whether the insertion is correct or incorrect. That is, the voltage between terminals at the time of normal insertion is first measured and used as a reference, and the reference voltage is compared with the voltage measured by the corresponding test to detect erroneous insertion from the difference between the two voltages. It can be said that erroneous insertion is more likely to be detected as the number of voltages measured by the inspection corresponding to each reference voltage increases.

発明が解決しようとする問題点 しかしながら、このようなIC部品の端子誤挿入検出方
法には問題がある。何故なら、プリント基板上に実装さ
れたIC部品の場合、IC部品の端子につながっている
他の回路が影響し、正常挿入、誤挿入の電圧値に僅かの
差、例えば数mVしか差が発生しないことが多い。この
ため、インサーキットテスタを用いても、IC部品の端
子誤挿入を検出するのは容易でない。
Problems to be Solved by the Invention However, there is a problem in such a method for detecting incorrect terminal insertion of an IC component. This is because, in the case of an IC component mounted on a printed circuit board, other circuits connected to the terminals of the IC component have an influence, and a slight difference, for example, only a few mV, occurs in the voltage values of normal insertion and incorrect insertion. I often don't. Therefore, even if the in-circuit tester is used, it is not easy to detect the incorrect terminal insertion of the IC component.

本発明はこのような従来の問題点に着目してなされたも
のであり、周囲回路の影響を少なくして、プリント基板
に実装したIC部品の端子の誤挿入を正確に検出する方
法を提供することを目的とする。
The present invention has been made in view of such a conventional problem, and provides a method for accurately detecting an erroneous insertion of a terminal of an IC component mounted on a printed circuit board by reducing the influence of a peripheral circuit. The purpose is to

問題点を解決するための手段 上記目的を達成するための手段を、以下実施例に対応す
る第1図を用いて説明する。
Means for Solving the Problems Means for achieving the above object will be described below with reference to FIG. 1 corresponding to the embodiment.

このIC部品の端子誤挿入検出方法はプリント基板に実
装した電源端子24、接地端子26、入力端子28、及
び出力端子30を有するIC部品22を検査の対象に
し、両電源電圧の和はIC部品22に含まれるダイオー
ドの立ち上り電圧より大きいが、各電源電圧単独ではそ
の立ち上り電圧より小さくなる第1電源32と第2電源
34とを用い、電流計36を使用するものであり、その
第1電源電圧を電源端子24と接地端子26とに印加
し、第2電源電圧を電流計36を介して電源端子24又
は接地端子26と入力端子28又は出力端子30とに印
加し、電流計36の指示によりプリント基板に対するI
C部品22の端子の誤挿入を検出する。
This method for detecting incorrect insertion of terminals of an IC component is to inspect an IC component 22 having a power supply terminal 24, a ground terminal 26, an input terminal 28, and an output terminal 30 mounted on a printed circuit board, and the sum of the two power supply voltages is the IC component. The first power source 32 and the second power source 34 are used, and the ammeter 36 is used, which is higher than the rising voltage of the diode included in 22, but smaller than the rising voltage for each power supply voltage alone. The voltage is applied to the power supply terminal 24 and the ground terminal 26, and the second power supply voltage is applied to the power supply terminal 24 or the ground terminal 26 and the input terminal 28 or the output terminal 30 via the ammeter 36, and the instruction of the ammeter 36 is given. To the printed circuit board
The erroneous insertion of the terminal of the C component 22 is detected.

作用 上記手段は次のように作用する。Operation The above means operates as follows.

第1電源電圧を電源端子24と接地端子26とに印加
し、第2電源電圧を電流計36を介して電源端子24又
は接地端子26と入力端子28又は出力端子30とに印
加すると、両電源電圧の和はIC部品22に含まれるダ
イオードの立ち上り電圧より大きいが、各電源電圧単独
ではその立ち上り電圧より小さいため、周囲回路の影響
が少なくなり、そのダイオードの正、逆方向特性に従っ
て、電流計36に流れる電流値が大きく変化する。この
結果、IC部品22の方向性が明らかとなり、端子の誤
挿入が検出できる。
When the first power supply voltage is applied to the power supply terminal 24 and the ground terminal 26 and the second power supply voltage is applied to the power supply terminal 24 or the ground terminal 26 and the input terminal 28 or the output terminal 30 via the ammeter 36, both power supplies are supplied. The sum of the voltages is higher than the rising voltage of the diode included in the IC component 22, but is smaller than the rising voltage of each power supply voltage alone, so the influence of the surrounding circuit is reduced, and the ammeter is used according to the forward and reverse characteristics of the diode. The value of the current flowing through 36 changes greatly. As a result, the directionality of the IC component 22 becomes clear, and erroneous terminal insertion can be detected.

実施例 以下、添付図面に基づいて、本発明の実施例を説明す
る。
Embodiment An embodiment of the present invention will be described below with reference to the accompanying drawings.

第1図は本発明によるIC部品の端子誤挿入検出方法を
適用する各回路例図である。図中、22はいずれもプリ
ント基板に実装した電源端子24、接地端子26、入力
端子28、及び出力端子30を有するIC部品である。
これらのIC部品22には第2図又は第3図に示すよう
な等価回路が含まれている。なお、第2図で示したオー
プンコレクタ形TTLと第3図で示したCMOSインバ
ータはいずれもTTLとCMOSの基本的な回路例であ
る。このような回路例からも明らかであるが、全てのI
C回路は過電圧から回路を保護するために、少なくとも
入力側に入力クランプダイオードを接続するか、出力側
にサブストレートダイオードを接続する。又、IC回路
には外に回路素子を保護し、動作を安定化させるための
寄生ダイオードが存在することもある。
FIG. 1 is a diagram showing an example of each circuit to which the method for detecting incorrect insertion of an IC component terminal according to the present invention is applied. In the figure, 22 is an IC component having a power supply terminal 24, a ground terminal 26, an input terminal 28, and an output terminal 30 all mounted on a printed circuit board.
These IC parts 22 include an equivalent circuit as shown in FIG. 2 or FIG. The open collector type TTL shown in FIG. 2 and the CMOS inverter shown in FIG. 3 are both basic circuit examples of TTL and CMOS. As is clear from such a circuit example, all I
In order to protect the circuit from overvoltage, the C circuit has at least the input clamp diode connected to the input side or the substrate diode connected to the output side. In addition, the IC circuit may have a parasitic diode for protecting the circuit element and stabilizing the operation.

このようなIC部品22のプリント基板に対する各端子
24、26、28、及び30の挿入状態を検査するには
第1電源32、第2電源34、及び電流計36を用い、
第1図の各図に示すようにIC部品22の端子に接続す
る。即ち、第1電源32は電源端子24と接地端子26
とに接続し、第2電源34は電流計36を介して電源端
子24又は接地端子26と入力端子28又は出力端子3
2とに接続する。これはIC部品22の端子誤挿入、特
に電源端子24と接地端子26との逆挿入の検出に上述
したダイオードの正、逆方向特性を利用するためであ
る。このため、両電源電圧の和はダイオードの立ち上り
電圧より大きくするが、各電源電圧単独ではその立ち上
り電圧より小さくする。例えばシリコンダイオードであ
れば、その立ち上り電圧が0.6V程であるから、第1
電源32の電圧を0.4V程に、第2電源34の電圧を
0.2V程にする。
A first power supply 32, a second power supply 34, and an ammeter 36 are used to inspect the insertion state of the terminals 24, 26, 28, and 30 on the printed circuit board of the IC component 22 as described above.
It is connected to the terminals of the IC component 22 as shown in each drawing of FIG. That is, the first power supply 32 includes the power supply terminal 24 and the ground terminal 26.
The second power source 34 is connected to the power terminal 24 or the ground terminal 26 and the input terminal 28 or the output terminal 3 via the ammeter 36.
Connect to 2. This is because the above-mentioned forward and reverse characteristics of the diode are used for detecting the incorrect insertion of the IC component 22 terminal, particularly the reverse insertion of the power supply terminal 24 and the ground terminal 26. For this reason, the sum of both power supply voltages is made larger than the rising voltage of the diode, but each power supply voltage alone is made smaller than the rising voltage. For example, in the case of a silicon diode, since the rising voltage is about 0.6V, the first
The voltage of the power supply 32 is set to about 0.4V, and the voltage of the second power supply 34 is set to about 0.2V.

このようにして、第1及び第2電源32、34からそれ
ぞれ接続した各端子に電圧を印加すると、第1(イ)図
の回路構成ではオープンコレクタ形TTLの場合、第4
図に示すようにそのサブストレートダイオード38に正
方向から両電源電圧の和が加わってダイオード38が立
ち上るため、矢印方向に電流計36を通って大きな電流
が流れる。このため、電流計36の指示が大きくなり、
IC部品22の方向性、即ち電源端子24、接地端子2
6等が正常挿入であることが明らかとなる。なお、電源
端子24と接地端子26が逆挿入の場合には後述する第
10図に示す回路構成となり、ほんの僅かしか電流が流
れず、電流計36の指示はほぼ零となって端子の誤挿入
を検出できる。又、CMOSインバータの場合、同様に
正常挿入時には第5図に示すようにそのサブストレート
ダイオード40を通って矢印方向に大きな電流が流れる
が、逆挿入時には後述する第11図の回路構成となり、
ほんの僅かしか電流が流れなくなる。このため、電流計
36の指示が正常挿入時と逆挿入時で大きく変化し、端
子の誤挿入を検出できる。
In this way, when a voltage is applied to each terminal connected from the first and second power supplies 32 and 34, in the case of the open collector type TTL in the circuit configuration of FIG.
As shown in the figure, the sum of the two power supply voltages is applied to the substrate diode 38 from the positive direction and the diode 38 rises, so that a large current flows through the ammeter 36 in the arrow direction. Therefore, the indication of the ammeter 36 becomes large,
Directionality of IC component 22, that is, power supply terminal 24, ground terminal 2
It becomes clear that 6 etc. are normal insertions. When the power supply terminal 24 and the ground terminal 26 are reversely inserted, the circuit configuration shown in FIG. 10 to be described later is obtained, only a small amount of current flows, and the ammeter 36 indicates almost zero so that the terminal is erroneously inserted. Can be detected. Similarly, in the case of a CMOS inverter, a large current flows in the direction of the arrow through the substrate diode 40 at the time of normal insertion as shown in FIG. 5, but at the time of reverse insertion the circuit configuration shown in FIG.
Very little current flows. Therefore, the indication of the ammeter 36 is largely changed between the normal insertion and the reverse insertion, and the incorrect insertion of the terminal can be detected.

次に、第1(ロ)図の回路構成ではオープンコレクタ形
TTLの場合、正常挿入時には第6図に示すように今度
はその入力クランプダイオード42を通って矢印方向に
大きな電流が流れるが、逆挿入時には後述する第8図の
回路構成となり、ほんの僅かしか電流が流れなくなる。
このため、電流計36の指示が正常挿入時と逆挿入時で
大きく変化し、端子の誤挿入を検出できる。又、CMO
Sインバータの場合、同様に正常挿入時には第7図に示
すようにその入力クランプダオード44を通って矢印方
向に大きな電流が流れるが、逆挿入時には後述する第9
図の回路構成となり、ほんのわずかしか電流が流れなく
なる。このため、電流計36の指示が正常挿入時と逆挿
入時で大きく変化し、端子の誤挿入を検出できる。
Next, in the case of the open collector type TTL in the circuit configuration of FIG. 1 (b), a large current flows in the arrow direction through the input clamp diode 42 this time as shown in FIG. At the time of insertion, the circuit configuration shown in FIG. 8, which will be described later, is provided, and only a small amount of current flows.
Therefore, the indication of the ammeter 36 is largely changed between the normal insertion and the reverse insertion, and the incorrect insertion of the terminal can be detected. Also, CMO
Similarly, in the case of the S inverter, a large current flows in the direction of the arrow through the input clamp diode 44 as shown in FIG.
With the circuit configuration shown in the figure, only a small amount of current flows. Therefore, the indication of the ammeter 36 is largely changed between the normal insertion and the reverse insertion, and the incorrect insertion of the terminal can be detected.

次に、第1(ハ)図の回路構成ではオープンコレクタ形
TTLの場合、正常挿入時には第8図に示すようにその
サブストレートダイオード38に正方向から第2電源電
圧だけが加わるため、それは立ち上らず、点線に沿って
電流計36を通る電流はほんの僅かである。なお、第1
電源32はほぼオープン状態にある。このため、電流計
36の指示がほとんど零となり、IC部品22の方向
性、即ち電源端子24、接地端子26等が正常挿入であ
ることが明らかとなる。なお、電源端子24と接地端子
26が逆挿入の場合には前述した第6図に示す回路構成
となり、大きな電流が流れるため、電流計36の指示が
大きくなって端子の誤挿入を検出できる。又、CMOS
インバータの場合、同様に正常挿入時には第9図に示す
ようにそのサブストレートダイオード40を通り、点線
に沿ってほんの僅かの電流しか流れないが、逆挿入時に
は前述した第7図の回路構成となり、大きな電流が流れ
るようになる。このため、電流計36の指示が正常挿入
時と逆挿入時で大きく変化し、端子の誤挿入を検出でき
る。
Next, in the case of the open collector type TTL in the circuit configuration of FIG. 1C, only the second power supply voltage is applied to the substrate diode 38 from the positive direction at normal insertion as shown in FIG. Only a small amount of current passes through the ammeter 36 along the dotted line without climbing. The first
The power supply 32 is almost open. Therefore, the indication of the ammeter 36 becomes almost zero, and it becomes clear that the directionality of the IC component 22, that is, the power supply terminal 24, the ground terminal 26, etc. are normally inserted. When the power supply terminal 24 and the grounding terminal 26 are reversely inserted, the circuit configuration shown in FIG. 6 described above is applied, and a large current flows, so that the ammeter 36 gives a large indication and the incorrect insertion of the terminal can be detected. Also, CMOS
Similarly, in the case of an inverter, at the time of normal insertion, only a small current flows through the substrate diode 40 as shown in FIG. 9 along the dotted line, but at the time of reverse insertion, the circuit configuration shown in FIG. A large current will flow. Therefore, the indication of the ammeter 36 is largely changed between the normal insertion and the reverse insertion, and the incorrect insertion of the terminal can be detected.

次に、第1(ニ)図の回路構成ではオープンコレクタ形
TTLの場合、正常挿入時には第10図に示すようにそ
の入力クランプダイオード42を通り、点線に沿ってほ
んの僅かの電流しか流れないが、逆挿入時には前述した
第4図の回路構成となり、大きな電流が流れるようにな
る。このため、電流計36の指示が正常挿入時と逆挿入
時で大きく変化し、端子の誤挿入を検出できる。又、C
MOSインバータの場合、同様に正常挿入時には第11
図に示すようにその入力クランプダイオード44を通
り、点線に沿ってほんの僅かの電流しか流れないが、逆
挿入時には前述した第5図の回路構成となり、大きな電
流が流れるようになる。このため、電流計36の指示が
正常挿入時と逆挿入時で大きく変化し、端子の誤挿入を
検出できる。
Next, in the case of the open-collector type TTL in the circuit configuration of FIG. 1 (d), at the time of normal insertion, only a small amount of current flows through the input clamp diode 42 as shown in FIG. At the time of reverse insertion, the circuit configuration shown in FIG. 4 is provided, and a large current flows. Therefore, the indication of the ammeter 36 is largely changed between the normal insertion and the reverse insertion, and the incorrect insertion of the terminal can be detected. Also, C
Similarly, in the case of a MOS inverter, the 11th
As shown in the figure, only a small amount of current flows through the input clamp diode 44 along the dotted line, but at the time of reverse insertion, the circuit configuration shown in FIG. Therefore, the indication of the ammeter 36 is largely changed between the normal insertion and the reverse insertion, and the incorrect insertion of the terminal can be detected.

しかし、このようにプリント基板にIC部品22を単体
で実装する場合、必ずしも上記のように2電源とする必
要はない。何故なら、第12図の各(イ)、(ロ)、
(ハ)、(ニ)図に示すように両電源電圧の和に相当す
る電圧値を有する単電源46を用いて、CMOSインバ
ータの接地端子26と出力端子30との間、接地端子2
6と入力端子28との間、電源端子24と出力端子30
との間、及び電源端子24と入力端子28との間にそれ
ぞれ印加すれば、サブストレートダイオード40や入力
クランプダイオード44に加わる電圧は対応する第5
図、第7図、第9図、及び第11図とほぼ同様になるか
らである。ところが、通常プリント基板にはIC部品の
みが単体で実装されることはほとんどないため、単電源
では他の周囲回路の影響によって、入力クランプダイオ
ードやサブストレートダイオード、その他寄生ダイオー
ド等の正、逆の特性をIC部品の端子誤挿入の検出に利
用できなくなる。
However, when the IC component 22 is individually mounted on the printed circuit board as described above, it is not always necessary to use the two power sources as described above. Because, each of (a), (b) in FIG.
As shown in (c) and (d), a single power supply 46 having a voltage value corresponding to the sum of both power supply voltages is used to connect the ground terminal 2 between the ground terminal 26 and the output terminal 30 of the CMOS inverter.
6 and the input terminal 28, the power supply terminal 24 and the output terminal 30
, And between the power supply terminal 24 and the input terminal 28, the voltage applied to the substrate diode 40 and the input clamp diode 44 is the corresponding fifth voltage.
This is because it is almost the same as FIGS. 7, 7, 9 and 11. However, normally, only an IC component is rarely mounted on a printed circuit board by itself. Therefore, in a single power supply, due to the influence of other peripheral circuits, input clamp diodes, substrate diodes, other parasitic diodes, etc. The characteristic cannot be used for detecting the incorrect insertion of the terminal of the IC component.

そこで、2電源と単電源につき、CMOSインバータの
電源端子24と接地端子26との間に、セラミックコン
デンサや電解コンデンサ等のバイパスコンデンサ等が接
続された回路の場合を比較検討してみる。先ず2電源の
場合、第13図に示すように第9図の回路に更にバイパ
スコンデンサ等48を接続すると、第1電源32により
そのコンデンサ48を通って矢印方向に電流が流れるよ
うになるが、サブストレートダイオード40には依然第
2電源34の電圧しか加わらないため、点線に沿ってほ
んの僅かの電流しか流れない。他方、単電源の場合には
第14図に示すように第12(ハ)図の回路に更にバイ
パスコンデンサ等50を接続すると、単電源46により
そのコンデンサ50からサブストレートダイオード40
を通って今度は矢印方向に大きな電流が流れる。又、第
11図の回路及び第12(ニ)図の回路にそれぞれ更に
バイパスコンデンサを接続しても、電流計には2電源で
は依然ほんの僅かの電流しか流れないが、単電源ではや
はり大きな電流が流れる。因みに、第4図、第6図、第
12(イ)、(ロ)図の各回路にそれぞれバイパスコン
デンサを接続しても、いずれも電流計には依然大きな電
流が流れ、変化はない。
Therefore, for two power supplies and a single power supply, a comparative study will be made on the case of a circuit in which a bypass capacitor such as a ceramic capacitor or an electrolytic capacitor is connected between the power supply terminal 24 and the ground terminal 26 of the CMOS inverter. First, in the case of two power supplies, if a bypass capacitor or the like 48 is further connected to the circuit of FIG. 9 as shown in FIG. 13, the first power supply 32 causes a current to flow in the arrow direction through the capacitor 48, Since only the voltage of the second power supply 34 is still applied to the substrate diode 40, only a very small current flows along the dotted line. On the other hand, in the case of a single power source, if a bypass capacitor 50 or the like is further connected to the circuit of FIG. 12 (c) as shown in FIG.
This time, a large current flows in the direction of the arrow. Further, even if a bypass capacitor is further connected to each of the circuit of FIG. 11 and the circuit of FIG. 12 (d), only a very small current flows through the ammeter with the two power supplies, but a large current still flows with the single power supply. Flows. By the way, even if a bypass capacitor is connected to each of the circuits shown in FIGS. 4, 6, 12 (a), and (b), a large current still flows through the ammeter and there is no change.

このようなIC部品の端子誤挿入検出方法を実施する場
合、通常は第1(イ)、(ロ)図のような回路構成に
し、正常挿入時には電流計36の指示を大きく、誤挿入
時には小さくすると好都合になる。又、この検出方法を
インサーキットテスタに適用すれば、当然プリント基板
上のIC部品の端子誤挿入検出率が向上する。
When carrying out such a method for detecting the incorrect insertion of the terminal of the IC component, usually, the circuit configuration is as shown in FIGS. Then it becomes convenient. Further, if this detection method is applied to an in-circuit tester, the detection rate of erroneous terminal insertion of IC components on a printed circuit board is naturally improved.

発明の効果 以上説明した本発明によれば、周囲回路の影響を少なく
して、プリント基板に実装したIC部品の端子の誤挿入
を正確に検出することができる。
EFFECTS OF THE INVENTION According to the present invention described above, it is possible to accurately detect the incorrect insertion of the terminal of the IC component mounted on the printed board by reducing the influence of the peripheral circuit.

又、IC部品の欠品状態も正確に検出できる。Further, it is possible to accurately detect the missing state of IC parts.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明によるIC部品の端子誤挿入検出方法を
適用する各回路例図である。 第2図及び第3図は第1図に示した各IC部品に含まれ
る具体的な等価回路図である。 第4図及び第5図は第1(イ)図に、第6図及び第7図
は第1(ロ)図に、第8図及び第9図は第1(ハ)図
に、第10図及び第11図は第1(ニ)図にそれぞれ対
応する具体的な動作説明図である。 第12図は第5図、第7図、第9図、及び第11図にそ
れぞれ対応する単電源による具体的な動作説明図であ
る。 第13図及び第14図は第9図及び第12(ハ)図にそ
れぞれ対応する周囲回路を考慮した2電源と単電源との
具体的な動作比較説明図である。 第15図は従来におけるIC部品の端子誤挿入検出方法
を適用する各回路例図である。 22…IC部品、24電源端子、26…接地端子、28
…入力端子、30…出力端子、32…第1電源、34…
第2電源、36…電流計、38、40…サブストレート
ダイオード、42、44…入力クランプダイオード、4
8…周囲回路を構成するバイパスコンデンサ
FIG. 1 is a diagram showing an example of each circuit to which the method for detecting incorrect insertion of an IC component terminal according to the present invention is applied. 2 and 3 are specific equivalent circuit diagrams included in each IC component shown in FIG. 4 and 5 are shown in FIG. 1 (a), FIGS. 6 and 7 are shown in FIG. 1 (b), FIGS. 8 and 9 are shown in FIG. 1 (c), and FIG. FIG. 11 and FIG. 11 are specific operation explanatory diagrams corresponding to FIG. 1 (d), respectively. FIG. 12 is a specific operation explanatory diagram with a single power source corresponding to FIGS. 5, 7, 9, and 11, respectively. FIGS. 13 and 14 are specific operational comparison explanatory diagrams of a dual power source and a single power source in consideration of peripheral circuits corresponding to FIGS. 9 and 12 (c), respectively. FIG. 15 is a diagram showing an example of each circuit to which a conventional method for detecting incorrect insertion of terminals of IC parts is applied. 22 ... IC parts, 24 Power supply terminal, 26 ... Ground terminal, 28
... input terminal, 30 ... output terminal, 32 ... first power supply, 34 ...
Second power supply, 36 ... Ammeter, 38, 40 ... Substrate diode, 42, 44 ... Input clamp diode, 4
8 ... Bypass capacitor forming peripheral circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】プリント基板に実装した電源端子、接地端
子、入力端子、及び出力端子を有するIC部品の端子誤
挿入検出方法において、両電源電圧の和はIC部品に含
まれるダイオードの立ち上り電圧より大きいが、各電源
電圧単独ではその立ち上り電圧より小さくなる第1電源
と第2電源とを用い、第1電源電圧を電源端子と接地端
子とに印加し、第2電源電圧を電流計を介して電源端子
又は接地端子と入力端子又は出力端子とに印加し、電流
計の指示によりプリント基板に対するIC部品の端子の
誤挿入を検出することを特徴とするIC部品の端子誤挿
入検出方法。
1. In a method for detecting incorrect insertion of an IC component having a power supply terminal, a ground terminal, an input terminal, and an output terminal mounted on a printed circuit board, the sum of both power supply voltages is calculated from the rising voltage of a diode included in the IC component. A first power supply and a second power supply, which are large but each power supply voltage alone is smaller than its rising voltage, are used, the first power supply voltage is applied to the power supply terminal and the ground terminal, and the second power supply voltage is applied via an ammeter. A method for detecting incorrect insertion of an IC component terminal, which comprises applying a power supply terminal or a ground terminal and an input terminal or an output terminal and detecting an incorrect insertion of an IC component terminal with respect to a printed circuit board according to an instruction from an ammeter.
JP62327598A 1987-12-24 1987-12-24 Method for detecting incorrect IC terminal insertion Expired - Fee Related JPH0652289B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62327598A JPH0652289B2 (en) 1987-12-24 1987-12-24 Method for detecting incorrect IC terminal insertion

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62327598A JPH0652289B2 (en) 1987-12-24 1987-12-24 Method for detecting incorrect IC terminal insertion

Publications (2)

Publication Number Publication Date
JPH01167682A JPH01167682A (en) 1989-07-03
JPH0652289B2 true JPH0652289B2 (en) 1994-07-06

Family

ID=18200850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62327598A Expired - Fee Related JPH0652289B2 (en) 1987-12-24 1987-12-24 Method for detecting incorrect IC terminal insertion

Country Status (1)

Country Link
JP (1) JPH0652289B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100458869B1 (en) * 2002-04-17 2004-12-03 삼성전자주식회사 Semiconductor chip package that direction of attaching is free

Also Published As

Publication number Publication date
JPH01167682A (en) 1989-07-03

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