JPH0652536B2 - Recognition device - Google Patents

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to a recognition device using pattern matching,
In particular, the present invention relates to a recognition device that includes a matching control circuit to increase the processing speed.

[Background of technology]

The recognition device using pattern matching collates the recognized pattern and the dictionary pattern bit by bit while moving the cutout starting point, so the number of processing bits becomes enormous, the processing time becomes long, and high speed is required. It was difficult to apply to the recognition device.

[Conventional technology and problems]

As a method of executing the pattern matching method, there are a method of using a sequential processing type circuit and a method of using a parallel processing type circuit. There is a problem that the processing time becomes long. For the latter, a dedicated L
The use of SI becomes necessary, the scale of the equipment becomes large,
There is a problem that the price of the device becomes expensive and the versatility of the device is lost. In the sequential processing type circuit, if the resolution is lowered in order to speed up the processing, another problem that the reading accuracy is deteriorated occurs.

[Object of the Invention]

In view of the above-mentioned problems in the conventional apparatus, an object of the present invention is to provide a matching control circuit to control the number of collation bits and positions, limit the number of dictionaries, control the position of the clipping window, and control the interruption of processing. It is to obtain a recognition device that can perform high-speed processing and has high reading accuracy based on the concept of performing the above.

[Structure of Invention]

In the present invention, an imaging system, an A / D conversion circuit for converting an analog video signal from the imaging system into a digital signal, a frame memory for storing the digital signal, a dictionary memory for storing a plurality of dictionary patterns created in advance, A matching control circuit for controlling pattern matching processing in a recognition device having a pattern matching circuit for sequentially superposing the recognized pattern stored in the frame memory and the dictionary pattern one by one, and calculating the number of unmatched bits of both. The matching control circuit includes a superposition control circuit that controls the number and bit position of matching bits when superposing the dictionary pattern selected from the plurality of dictionary patterns and the recognized pattern,
A window cutout control circuit for controlling the position of the cutout window in the frame memory, and a subsequent cutout operation for the selected dictionary pattern when the number of mismatch bits at the position of the cutout window is smaller than a predetermined value. There is provided a recognition device characterized by comprising: a processing interruption circuit for stopping the dictionary pattern; and a dictionary judgment circuit for limiting the number of dictionary patterns based on the number of mismatch bits of each dictionary pattern.

Example of Invention

A block circuit diagram of a recognition apparatus as an embodiment of the present invention is shown in FIG. This apparatus stores an image pickup system 2 for picking up an image of a pattern to be recognized 1, an A / D (analog / digital) converter 3 for binarizing an analog signal (20) from the image pickup system, and a binarized signal (30). 2D frame memory 4, dictionary memory 6 that stores a dictionary pattern in advance, pattern matching that superimposes the recognized pattern stored in the frame memory 4 and the dictionary pattern stored in the dictionary memory 6, and outputs the degree of disagreement between them. A circuit 5, a control system 7 for controlling each of the above-mentioned components, an overlay control circuit 8, a dictionary determination circuit 9, a position determination circuit 10, a window cutout control circuit 11, and a processing interruption circuit 12 are provided. The difference from the conventional device is the overlay control circuit 8, the dictionary determination circuit 9, the position determination circuit 1.
0, a window cutout control circuit 11, and a processing interruption circuit 12 are provided.

FIG. 2 shows the recognized pattern stored in the frame memory 4, and FIG. 3 shows an example of the dictionary pattern.
The recognition area is larger than the dictionary pattern because the positions of the recognition target vary. Therefore, while shifting the position of the dictionary pattern in the recognition area (the area surrounded by the solid line in FIG. 2), the dictionary pattern signal (60) is superposed on the recognized pattern signal (40) and the corresponding bit disagreement occurs. Find the number of bits. At this time, in the present embodiment, the object to be recognized and the dictionary pattern are superimposed on each other, for example, every 4 bits as shown in FIG. This is performed in the pattern matching circuit 5 according to the control signal (80) from the superposition control circuit 8. FIG. 4 and FIG. 5 are diagrams for explaining a state of skipping every other bits to be collated and collated, and FIG. 4 shows a recognized pattern (numeral 0) in the frame memory. 5) shows a dictionary pattern (numerals 0 and 1) as an example. Both have an X axis (X _R axis and X _M axis respectively) and a Y axis (Y _R axis and Y _M axis respectively), and each bit at the position represented by the intersection of the vertical and horizontal solid lines in the figure is collated ( The numbers in parentheses indicate the coordinates). In this way, the dictionary pattern is replaced by 36 patterns (numerals and alphabets) in this example, and data of the number of unmatched bits as shown in the graph of FIG. 7 is obtained. A dictionary pattern (O, C, Q in this example) in which the number of non-matching bits is lower than the predetermined limit level indicated by a broken line in this graph is detected. This is the superposition control disagreement signal (52) from the pattern matching circuit 5 in the dictionary determination circuit 9.
Received. At the same time, the optimum position (point 22 in the example of FIG. 2) of the cutout starting point (for example, point 21 in FIG. 2) when matching the recognized pattern and the dictionary pattern is obtained. This is performed by controlling the position determination circuit 10 by the output (52) from the pattern matching circuit 5.

In this way, the limited dictionary and the limited cut-out start position are obtained by performing the collation by coarse scanning every 4 bits, and the one-to-one pattern matching that is normally performed is performed using these.

In the example used in this embodiment, the dictionary pattern is 64
× 64 bits, the recognition area is ± 8 bits larger than the dictionary pattern, and there are 36 dictionary patterns. Therefore, the total number of processing bits by the conventional device is 64 × 64 × 16 × 16 × 36 = 37,748,736. Assuming that the collation scanning is performed every 4 bits according to the present embodiment to limit the number of dictionary patterns to three and the extraction start point of the collation scanning can be limited, the total number of processed bits is (64/4 × 64/4 ×). 16/4
X16 / 4x36) + (64x64x4x4x3) = 344,064, which is about 1/110 of the total number of bits mentioned above. A thick solid line frame 23 in FIG. 6 shows a limited area in which a cutout starting point for matching is obtained and a dictionary pattern is overlaid. The reference numbers (51), (71) in FIG.
Reference numerals (72), (90) and (100) denote a pattern matching disagreement degree signal, a dictionary pointing signal, a recognition result output, a limited dictionary pointing signal and a limited position signal, respectively.

Next, the window cutout control circuit 11 and the processing interruption circuit 12 will be described. The window cutout position signal (110) which is the output of the window cutout control circuit 11 is added to the frame memory 4, and the processing interruption signal (120) which is the output of the processing interruption circuit 12 is supplied to the control system 7. A signal (51) is supplied to the processing interruption circuit 12.

The processing interruption circuit stops the subsequent cutting operation for the selected dictionary pattern, and continues the processing for collation with other dictionary patterns.

The above circuit will be described with reference to FIGS. 8 and 9. The points in the figure represent the starting point of the dictionary pattern, and the dictionary pattern with this point as the starting point and the pattern to be recognized are collated sequentially while changing the starting point. The recognition area of the pattern to be recognized in the frame memory 4 (the solid line block on the outside of FIGS. 8 and 9) is wide in order to compensate for the displacement of the recognition target with respect to the area of the dictionary pattern (displayed by the broken line in the figures). Has become. Therefore, it is necessary to scan the recognition area by changing the position of the cutout starting point for matching with the size of the dictionary pattern to find the cutout starting point with the smallest number of mismatch bits.

Conventionally, the application order of the above-described cutout starting point has been performed in the order from left to right and from top to bottom from the upper left corner to the lower right of the area as indicated by the arrow with respect to the black dots in FIG. That is, first, the area of the block is scanned by the broken line at the upper left corner, sequentially moves to the right, and finally, the broken block area at the lower right corner is scanned. In the figure, the difference between the size of the recognition area and the size of the dictionary pattern is exaggerated for convenience of explanation. On the other hand, in this embodiment, as shown in FIG. 9, the window cut-out control circuit 11 controls the frame memory 4 to recognize the position where the recognized pattern has the highest probability, that is, the dictionary pattern to be usually overlaid. The scanning is started so as to perform the matching between the recognized pattern and the dictionary pattern from the cutting start point where the pattern is superposed on the center position of the area. Next, the cutting start point is moved in the order of the arrows as shown by the black dots in FIG. The number of disagreement bits is calculated each time the cut-out start point is changed and collation is performed, and when the value is below the value recognized as the predetermined recognition, the processing interruption circuit 12 causes the control system 7 to output the processing interruption signal (120 ) Is output, and the subsequent window cutout and verification operations are interrupted.

In this embodiment, the window cutout position control and the process interruption described above are performed, and the processing speed of the recognition device can be further increased.

Various matching control functions described above, namely, control of the number of matching bits, limitation of the number of dictionaries, control of the position of the clipping window,
The processing interruption function and the position determination function can be applied individually or in combination of any two or more.

〔The invention's effect〕

According to the present invention, it is possible to realize a recognition device that employs a sequential processing method and that can interrupt the processing according to the recognition value, can perform high-speed processing, and has high reading accuracy.

That is, by providing the processing interruption circuit, it is not necessary to obtain all points for which the number of mismatch bits is the minimum for each dictionary pattern, and the processing for limiting the dictionary can be speeded up.

[Brief description of drawings]

FIG. 1 is a block circuit diagram of a recognition device as an embodiment of the present invention, FIG. 2 is a diagram for explaining a relationship between a recognized pattern and a dictionary pattern, FIG. 3 is a diagram for illustrating a dictionary pattern, and FIG. Is a diagram showing a recognized pattern for explaining the control of the number of matching bits in the embodiment, FIG. 5 is a diagram showing a dictionary pattern similar to FIG. 4, and FIG. 6 is a limited area similar to FIG. FIG. 7 is a graph showing the recognized pattern, FIG. 7 is a graph showing an example of the relationship between the dictionary pattern and the number of unmatched bits in the apparatus of FIG. 1, and FIG. 8 is a conventional apparatus for comparatively explaining the operation of the apparatus of FIG. FIG. 9 is a diagram showing the application order of the cutout starting points in FIG. 7, and FIG. 9 is a view for explaining the application order of the cutout starting points of the apparatus of FIG. 1 ... Recognized pattern, 2 ... Imaging system, 3 ... A / D converter, 4 ... Frame memory, 5 ... Pattern matching circuit, 6 ... Dictionary memory, 7 ... Control system, 8 ... Overlay control circuit, 9 ... Dictionary determination circuit, 10 ... Position determination circuit, 11 ... Window cutout control circuit, 12 ... Processing interruption circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Noriyuki Hiraoka, Inventor Noriyuki Hiraoka 1015 Kamiodanaka, Nakahara-ku, Kawasaki, Kanagawa, Fujitsu Limited 56) References JP-A-57-137978 (JP, A) JP-A-59-790 (JP, A) JP-A-51-122336 (JP, A) JP-B-52-14061 (JP, B1)

Claims (4)

[Claims] 1. An imaging system, an A / D conversion circuit for converting an analog video signal from the imaging system into a digital signal, a frame memory for storing the digital signal, a dictionary memory for storing a plurality of dictionary patterns created in advance, A matching control circuit for controlling a pattern matching process in a recognition device equipped with a pattern matching circuit for sequentially superposing the recognized pattern stored in the frame memory and the dictionary pattern one by one, and calculating the number of unmatched bits of both. The matching control circuit includes a superposition control circuit for controlling the number and bit position of matching bits when superposing the dictionary pattern selected from the plurality of dictionary patterns and the recognized pattern, and the frame. Window cutout control circuit for controlling the position of the cutout window in the memory, and the cutout window If the number of unmatched bits at the position is smaller than a predetermined value, a process interruption circuit for stopping the subsequent cutting operation for the selected dictionary pattern, and a dictionary pattern based on the number of unmatched bits of each dictionary pattern And a dictionary determination circuit for limiting the number of the recognition devices. 2. The matching control circuit includes a position determination circuit that uses a position where the unmatched bit after the overlay control is the lowest as a cutout start point, and performs pattern matching by cutting out using the position as a start point. The recognition device according to claim 1, wherein: 3. The recognition apparatus according to claim 1 or 2, wherein the control of the number and position of the matching bits is performed by superposing every predetermined bit. 4. The window cut-out control circuit controls the cut-out start point to be cut out from a substantially central point within a variable range of the left, right, up, and down, and to be sequentially scanned from the central point to the surroundings. The recognition device according to claim 1.