JPH0652857B2 - Auto tuning circuit - Google Patents

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to an auto-tuning circuit in a television receiver or the like.

[Prior Art and its Problems] Recently, some television receivers are provided with an auto-tuning function for automatically selecting a reception channel in response to an operation of a channel up / down key. This auto-tuning function is provided with a frequency detection circuit and a tuner tuning voltage control circuit. When the up / down key is operated, the tuner tuning voltage control circuit raises / lowers the tuning frequency of the electronic tuning tuner, When the signal is received, the received frequency is detected by the frequency detection circuit, the AFTH signal and the AFTL signal are output, and the tuner tuning frequency is adjusted to the optimum value. At this time, if you operate the up key to raise the tuner tuning frequency,
As shown in FIG. 7 (a), the frequency detection circuit starts with A
The FTH signal is output, and then AF is performed at a predetermined interval.
The TL signal is output. In this case, the AFTH signal,
The AFTL signal is counted by the AFT counter,
The tuning operation is controlled according to the count value. That is, the counter counts "1" at the trailing edge of the AFTH signal as shown in FIG.
"2" is counted at the falling edge of the TL signal. Then, when the counter counts "2", the tuning speed is reduced and the process returns to the reverse. The AFT when the count "1" is counted by the tuning.
When the H signal is output, "3" is counted at the trailing edge, and the tuning returns again here. Then, when the tuning returns to the output position of the AFTL signal at the time of counting "2" and counts "4" at the trailing edge, the tuning is stopped here. This completes the tuning operation when the channel is up.

When the down key is operated, the AFTL signal is first output from the frequency detection circuit as shown in FIG. 7 (b). Therefore, the AFT counter counts "1" at the trailing edge of the AFTL signal and then counts "2" at the trailing edge of the AFTH signal. When the counter counts "2", the tuning speed decreases and the process returns to the next step, and "3" is counted at the next trailing edge of the AFTL signal, and the tuning operation ends here.

As described above, two tuning control signals are output for one channel, namely, an AFTH signal and an AFTL signal. Conventionally, the tuning point is set at the position where the AFTL signal is output. However, the position just in the middle of the AFTH signal and the AFTL signal is the best tuning point, and the tuning position at the time of tuning in the conventional tuning circuit is slightly deviated from the best position.

[Object of the Invention] The present invention has been made in view of the above points, and an object thereof is to provide an auto-tuning circuit capable of setting a tuning position to the best point.

[Main points of the invention] The present invention switches the reference voltage of the frequency detection circuit to make the AFTH signal and the AFTL signal continuous when the AFTH signal and the AFTL signal are detected by auto-tuning, and makes the boundary point between the AFTH signal and the AFTL signal at the boundary point. The tuning position is set.

First Embodiment of the Invention An embodiment of the present invention will be described below with reference to the drawings. First, a first embodiment will be described with reference to FIGS. FIG. 1 is a block diagram showing a main part of a television receiver. In the figure, 11 is a television receiving antenna, and the electric wave received by this antenna 11 is an electronic tuning tuner 12.
Is input to. The electronic tuning tuner 12 selects a predetermined radio wave from the received radio waves according to the tuning signal Vt from the tuner tuning voltage control circuit 16, converts it into an intermediate frequency A, and inputs it to the television linear circuit 13. The television linear circuit 13 amplifies and detects the intermediate frequency A from the electronic tuning tuner 12 to separate and extract a video signal, an audio signal, and a synchronization signal, and outputs an intermediate frequency signal B. The video signal output from the television linear circuit 13 is sent to the display circuit (not shown), the audio signal is sent to the audio circuit (not shown), the intermediate frequency signal B is sent to the frequency detection circuit 14, and the synchronization signal C is sent to the control circuit 15. Sent. The frequency detection circuit 14, which will be described in detail later, detects the intermediate frequency signal B from the television linear circuit 13 to create an AFTH signal and an AFTL signal,
Output to the control circuit 15. Further, a channel up / down signal corresponding to the operation of the channel up / down key is input from the key input unit 17 to the control circuit 15. The control circuit 15 controls the sync signal C from the television linear circuit 13.
The control signal is output to the display circuit and the audio circuit in synchronism with, and the switch switching signal D is output to the frequency detection circuit 14 according to the AFTH signal and the AFTL signal. That is, the control circuit 15 internally includes an AFT counter that counts the AFTH signal and the AFTL signal, and normally holds the switch switching signal D at the "1" signal level, but the count value of the AFT counter is When it becomes "2", the tuning speed is lowered and the switch switching signal D is switched to "0" signal level. In addition, the control circuit 15 uses the key input section 17 for channel up / down.
Tuner tuning voltage control circuit 16 according to the operation of the down key
Control signal is output to.

Next, details of the frequency detection circuit 14 will be described with reference to FIG. Vcc power is supplied to the frequency detection circuit 14, and this Vcc power is divided by resistors R1 to R4.
The voltage is divided into V1, V2, and V3 by 20. The values of the resistors R1 to R4 are set to the same value, for example, V1
= (3/4) Vcc, V2 = (1/2) Vcc, V3 = (1
/ 4) Vcc. The voltages V1 and V2 divided by the voltage dividing circuit 20 are input to the + terminal of the comparator 25 via the analog switches 21 and 22 as comparison reference voltages, and the divided voltages V2 and V3 are analog switches. It is input as a comparison reference voltage to the-terminal of the comparator 26 via 23 and 24. Above analog switch
21 and 24 are on / off controlled by a switch switching signal D sent from the control circuit 15, and the analog switch 2
The switches 2 and 23 are on / off controlled by a switch switching signal D provided via an inverter 27. Further, in FIG. 2, a frequency discriminator 28 discriminates the intermediate frequency signal B supplied from the television linear circuit 13 to create an AFT signal, which is supplied to the negative terminal of the comparator 25 and the positive terminal of the comparator 26. The output of the comparator 25 is the AFTH signal, and the output of the comparator 26 is A
It is sent to the control circuit 15 as an FTL signal.

Next, the operation of the above embodiment will be described. Electronic tuning tuner 12
When the arbitrary channel is selected by, the control circuit 15 sends a "1" signal to the frequency detection circuit 14 as the switch changeover signal D. When the switch switching signal D is "1", in the frequency detection circuit 14 shown in detail in FIG. 2, the analog switches 21 and 24 are turned on and the analog switches 22 and 23 are turned off. As a result, the divided voltage V1 output from the voltage dividing circuit 20 is given as a reference voltage to the comparator 25 via the analog switch 21, and
The voltage V3 is supplied to the comparator 26 via the analog switch 24.
Given as a reference voltage. Now, assuming that the up key is operated in the key input unit 17, the control circuit 15 sends an up command to the tuner tuning voltage control circuit 16, and the tuner tuning voltage control circuit 16 outputs the tuning signal Vt. To raise the tuning frequency of the electronic tuning tuner 12. Then, when the television broadcast radio wave of the next channel is received due to the increase of the tuning frequency, this broadcast radio wave is converted into the intermediate frequency A and sent from the electronic tuning tuner 12 to the television linear circuit 13 and further this television linear circuit. It is converted into an intermediate frequency signal B by 13 and sent to the frequency detection circuit 14. This frequency detection circuit
The frequency discriminator 28 discriminates the intermediate frequency signal B from the intermediate frequency signal B and outputs an S-shaped AFT signal as shown in FIG. This AFT signal is input to the comparators 25 and 26, and when it becomes larger than the reference voltage V1 as shown in FIG. 3 (a), it is output as an AFTH signal from the comparator 25 during that time, and then becomes smaller than the reference voltage V3 from the comparator 26. It is output as an AFTH signal. When the up key is operated as described above, the AFTH signal is first output from the comparator 25, and then the comparator 26 outputs the AFTH signal at a predetermined interval, that is, when the AFT signal becomes smaller than the reference voltage V3. The AFTL signal is output and sent to the control circuit 15.

Then, the control circuit 15 controls the tuning operation by counting the AFTH signal and the AFTL signal sent from the comparators 25 and 26 by the AFT counter.
That is, as shown in FIG. 4A, the control circuit 15 first counts "1" at the trailing edge of the AFTH signal, and then counts "2" at the trailing edge of the AFTL signal. When the count value of the AFT counter becomes "2", the control circuit 15 sends a command to the tuner tuning voltage control circuit 16 to reduce the tuning speed and return to the reverse direction, and the switch switching signal D from "1" to "0". Switch to. Therefore, in the frequency detection circuit 14, the analog switch 2
When 1 and 24 are turned off, the analog switches 22 and 23 are turned on, and the voltage V2 output from the voltage dividing circuit 20 is a comparator.
It is given to 25 and 26 as a reference voltage. Therefore, the AF output from the frequency discriminator 28 as shown in FIG.
In the range where the T signal is larger than the reference voltage V2, the comparator
The AFTH signal is output from 25, and the AFTL signal is output from the comparator 26 in the range where the AFT signal is smaller than the reference voltage V2. That is, the time width of the AFTH signal and the AFTL signal becomes wider, and the output of the AFTH signal and the AFTL signal can be switched at the center point of the tuning control signal signal. Therefore, at the time when the reference voltage V2 of the comparators 25 and 26 is switched to, the AFTL signal is kept being output from the comparator 26 as shown in FIG. 4 (b). In this state, the tuning is returned to the low channel side at a low speed as described above, but it is returned to the center position of the AFT signal and the AFT signal is returned.
When the signal becomes larger than the V reference voltage V2, the comparator
At the same time that the AFTL signal output from 26 returns to the high level, the AFTH signal output from the comparator 25 falls. The fall of the AFTH signal is counted by the AFT counter, and the count value becomes "3".
When the count value of the AFT counter becomes "3", the control circuit 15 returns the switch switching signal D to the "1" signal level, and also gives a tuning stop command to the tuner tuning voltage control circuit 16 to perform tuning at that position. Stop it. As described above, the tuning position of the selected channel can be stopped at the center point of the AFT signal, that is, the best tuning point.

Further, when the down key is operated in the key input unit 17, the AFT counter in the control circuit 15 is cleared and the tuning down command is sent from the control circuit 15 to the tuner tuning voltage control circuit 16, whereby the tuning The down operation is performed. At this time, the control circuit 15
From the switch to the frequency detection circuit 14
Is a "1" signal level, the voltage V1 is applied to the comparator 25 as a reference voltage via the analog switch 21, and the voltage V3 is applied to the comparator 26 via the analog switch 24 as a reference voltage. Therefore, with the tuning down operation, the AFTL signal is first output from the comparator 26 as shown in FIG. 5 (a), and the AFT counter counts "1" at the trailing edge. At this point, the tuning down operation continues, so the comparator 25
A signal is output, and the content of the AFT counter counts up to "2" at the trailing edge. The control circuit 15 uses the AFT
When the count value of the counter becomes "2", a command is sent to the tuner tuning voltage control circuit 16 to reduce the tuning speed and return (tune up), and the switch switching signal D is switched from "1" to "0". . Therefore, in the frequency detection circuit 14, the analog switches 21 and 24 are turned off and the analog switches 22 and 23 are turned off.
Is turned on, and the voltage V2 output from the voltage dividing circuit 20 is applied to the comparators 25 and 26 as a reference voltage. As a result, the time width of the AFTH signal and the AFTL signal becomes wider as described above, and the output of the AFTH signal and the AFTL signal can be switched at the center point of the tuning control signal signal. Therefore, the reference voltage V of the comparators 25 and 26 is
At the time of switching to 2, the state in which the AFTH signal is being output from the comparator 26 is maintained as shown in FIG. 5 (b). In this state, the tuning is returned to the high channel side at a low speed as described above, but when it is returned to the center position of the AFT signal and the ATF signal becomes smaller than the reference voltage V2, the AFTH output from the comparator 25
At the same time when the signal returns to the high level, the AFTL signal output from the comparator 26 falls. The fall of the AFTL signal is counted by the AFT counter, and the count value becomes "3". When the count value of the AFT counter becomes “3”, the control circuit 15 returns the switch switching signal D to the “1” signal level, gives a tuning stop command to the tuner tuning voltage control circuit 16, and performs tuning at that position. Stop it. In this case, the switch changeover signal D is maintained in the "0" signal state as it is even after the tuning operation is completed, and the channel up / down
It is also possible to switch to the "1" signal level when the down key is operated. As described above, the tuning position is set to A on the selected channel even when the channel is down.
It is possible to stop at the center point of the FT signal, that is, the best tuning point.

Second Embodiment of the Invention Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 6 shows the configuration of the frequency detection circuit 14 in FIG. In the second embodiment, the voltage dividing circuit 20 'is composed of resistors R5, R6 and R7, and the resistor R
The divided voltage between 5 and R6 is applied to the + terminal of the comparator 25 as a reference voltage, and the divided voltage between the resistors R6 and R7 is applied to the-terminal of the comparator 26 as a reference voltage. In this case, the voltage dividing circuit 20 'is different from the voltage dividing circuit 20 (FIG. 2) in the first embodiment in that the resistors R5 to R7 are set to "R5".
= R1, R6 = R2 + R3, R7 = R4 ". An analog switch 31 is connected in parallel to the resistor R6, and a switch switching signal D from the control circuit 15 is given to the gate of the analog switch 31 via an inverter 32.

The frequency detection circuit 14 configured as described above includes the control circuit 15
When the "1" signal is given as the switch switching signal D from the analog switch 31, the analog switch 31 is turned off, and the resistors R5 and R
The divided voltage V1 between 6 and 6 is applied to the comparator 25, and the divided voltage V3 between the resistors R6 and R7 is applied. When a "0" signal is given as the switch switching signal D from the control circuit 15, the output of the inverter 32 becomes "1" and the analog switch 31 is turned on and the resistor R
Short both ends of 6. For this reason, the Vcc voltage is
The voltage is divided into two by 7 and a divided voltage V2 is generated across the resistor R6, and this voltage V2 is supplied to the comparators 25 and 26 as a reference voltage. As a result, the frequency detection circuit 14 shown in FIG. 6 can perform the same operation as that of the first embodiment with a simple circuit configuration.

As described above in detail, according to the present invention, when the AFTH signal and the AFTL signal are detected by the auto tuning, the reference voltage of the frequency detection circuit is switched to make the AFTH signal and the AFTL signal continuous, and the AFTH signal Signal and AF
Since the tuning position is set at the boundary point of the TL signal, it is possible to provide an auto-tuning circuit that can set the tuning position at the time of channel selection to the best point.

[Brief description of drawings]

1 to 5 show a first embodiment of the present invention. FIG. 1 is a block diagram showing a schematic configuration of the whole, and FIG. 2 is a diagram showing details of a frequency detection circuit in FIG. Third
The figure shows the AFTH signal and the AF signal in the frequency detection circuit.
Timing charts for explaining the output operation of the TL signal, FIGS. 4 and 5 are timing charts for explaining the operation of the same embodiment, and FIG. 6 is for the frequency detection circuit in the second embodiment of the present invention. FIG. 7 shows the details and FIG. 7 is a timing chart for explaining the operation of the conventional auto tuning circuit. 11 …… antenna, 12 …… electronic tuning tuner, 13 …… television linear circuit, 14 …… frequency detection circuit, 15 …… control circuit, 16 …… tuner tuning voltage control circuit, 17 …… key input section, 20, 20 '... Voltage divider, 21-24, 31 ... Analog switch, 25 ... Comparator, 26 ... Comparator, 28
…… A frequency discriminator.

Claims (1)

[Claims] 1. A frequency discriminator that outputs an AFT signal from an intermediate frequency signal in accordance with a tuning operation, and an AFT signal output from this frequency discriminator is compared with a reference voltage.
First and second comparators for outputting the FTH signal and the AFTL signal, a means for inverting the tuning direction by detecting the AFTH signal and the AFTL signal output from the comparator, and the above before the tuning direction is inverted. Different reference voltages are applied to the first and second comparators, respectively, and when the tuning direction is inverted, the same reference voltage is applied to the first and second comparators to make the AFTH signal and the AFTL signal continuous. An auto-tuning circuit comprising switching means and means for setting a tuning stop point at a boundary between the AFTH signal and the AFTL signal.