JPH0654417B2 - Display element - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a circuit configuration of an active matrix display device using liquid crystal.

(Prior Art) FIG. 1 shows a conventional display element, in which 1 is a MOS transistor, 2 is a liquid crystal, and 3 is a common electrode.

The liquid crystal 2 is sandwiched between two electrodes to form a capacitor. The gate of the MOS transistor 1 is connected to the gate line G _i , and the drain thereof is connected to the data line D _j . One electrode of the liquid crystal 2 is connected to the source of the MOS transistor 1, and the other electrode is connected to the common electrode 3.

The MOS transistor 1 and the liquid crystal 2 form a display cell,
The display cells are arranged in a matrix.

Next, this basic operation will be described.

First, the high voltage V _DD is applied to the gate line G _i to turn on the MOS transistor 1. Next, when a display signal is applied to the data line D _j , the display signal is applied to the liquid crystal 2 via the MOS transistor 1. Then, when the gate line G _{i is set} to the ground potential V _SS and the MOS transistor 1 is turned off, the display signal is stored in the capacitor of the liquid crystal 2. At this time, the common electrode 3 is set to the voltage Vc (Vc = (V _DD -V _SS ) / 2).

When the display signal is the voltage of V _DD or V _SS , the voltage Vc is applied between the two electrodes of the liquid crystal 2, so that the liquid crystal 2 displays bright. When the display signal is Vc, no voltage is applied between the two electrodes of the liquid crystal 2, so dark is displayed.

Similarly, a high voltage is sequentially applied to the gate lines G _{i + 1} , G _{i + 2} , ... And display signals corresponding to the positions are displayed on the data lines D ₁ , D ₂ , ..., D _j , D _{j + 1} .
The entire image is displayed by applying to.

In the conventional display element, it is necessary to periodically perform the operation of sequentially applying the display signal to the display cells as described above. The first reason is that the display signal stored in the capacitor is discharged due to leakage of the liquid crystal layer or the like. Therefore, it is necessary to rewrite periodically.

The second reason is that if a direct current voltage is applied to the liquid crystal, an irreversible electrochemical reaction occurs and the characteristics of the liquid crystal deteriorate. Therefore, it is necessary to periodically invert the polarity of the voltage applied to the liquid crystal. Therefore, in the conventional display element, a display signal for displaying light is periodically switched between V _DD and V _SS and applied.

For the above reason, the display device including the conventional display element requires the frame memory for storing the display signals for one screen or more in order to periodically apply the display signal to the display element. . Moreover, while applying the display signals sequentially read from the frame memory to the display element,
A control circuit for AC driving the liquid crystal is required. Therefore, there is a drawback in that the structure becomes complicated and the price becomes high.

(Object of the Invention) In order to solve these drawbacks, the present invention adds a reproduction circuit of a display signal stored in a capacitor to a display cell itself and also reverses the polarity of a voltage applied to a liquid crystal. It is an object of the present invention to provide a display device configured as described in 1.

(Structure and Action of the Invention) FIG. 2 shows the first embodiment of the present invention.
FIG. 2A is a circuit diagram and FIG. 2B is a diagram showing the operation timing.

In FIG. 2 (a), 10, 11, 12, and 13 are MOS transistors, 1
4 is a liquid crystal.

Here, the drain of the MOS transistor 10 is the data line D
_j , the gate is connected to the gate line G _i , the source is connected to one electrode (terminal a) of the liquid crystal 14, and the other electrode of the liquid crystal 14 is connected to the counter electrode C _i .

The MOS transistors 12 and 13 are connected in series, the source of the MOS transistor 13 is grounded, the gate is connected to the control line R _i, and the drain of the MOS transistor 12 is connected to the liquid crystal 14.

Further, the drain of the MOS transistor 11 is connected to the liquid crystal 14 via the terminal a, the source (terminal b) is connected to the gate of the MOS transistor 12, and the gate is connected to the control line S _i .

The MOS transistors 10, 11, 12, 13 and the liquid crystal 14 described above form a display cell and are arranged in a matrix.

Next, this operation will be described.

First, the operation of writing a display signal in the display cell will be described.

When the gate line G _i and the control line S _i are set to the high voltage V _DD , the MOS transistors 10 and 11 become conductive. The cover page signal is applied to the capacitor of the liquid crystal 14 via the data line D _j and the MOS transistor 10. When the gate line G _i is grounded and the MOS transistor 10 becomes non-conductive, the display signal is stored in the capacitor.

At this time, assuming that the counter electrode C _i is at the ground voltage V _SS , the liquid crystal displays bright when the display signal is the high voltage V _DD , and the low voltage V _SS
Will display darkness.

Next, the reproducing operation of the display signal will be described.

First, the control line S _i is grounded and the MOS transistor 11 is made non-conductive. At this time, the display signal is stored in the terminal b (specifically, stored in the electrostatic capacitance including the wiring capacitance of the terminal b, the gate capacitance of the MOS transistor 12, etc.). Next, when the data line D _{j is set} to the high voltage V _DD and the high voltage V _DD is applied to the gate line G _i , the MO
The S transistor 10 becomes conductive and the terminal a is precharged to V _DD . Next, after the gate line G _i is grounded and the MOS transistor 10 is made non-conductive, the control line R _{i is set} to the high voltage V _DD and the MOS transistor 13 is made conductive.

As a result, if the display signal previously stored at the terminal a is V _DD , the MOS transistor 12 becomes conductive and the terminal a is grounded. Conversely, if the display signal is V _SS , the MOS transistor 12
Is non-conductive, the terminal a maintains the precharge voltage V _DD . That is, the display signal is inverted and reproduced, and at this time, the counter electrode
Change the voltage on C _i from V _SS to V _DD . This allows the liquid crystal 14
The polarity of the voltage applied to is reversed.

If the capacitances of the terminals a and b are Ca and Cb, respectively,
By setting Ca >> Cb, the voltage change at the terminal a when the MOS transistor 11 is made conductive during the next reproducing operation can be made sufficiently small, and normal reproduction can be performed.

By periodically performing the reproducing operation, the accumulated display signal is reproduced and the polarity of the voltage applied to the liquid crystal can be inverted.

In this embodiment, all display cells can be reproduced at the same time, the efficiency of the reproducing operation can be improved, and the control can be greatly simplified. Further, in this case, all the counter electrodes (C ₁ , C ₂ , ..., C _i , C _{i + 1} ...) Can be made common.

FIG. 3 shows a second embodiment of the present invention.
(a) shows the circuit diagram and Fig. 3 (b) shows the timing diagram.
1, 22 are MOS transistors, and 23 is a liquid crystal.

Here, the drain of the MOS transistor 20 is the data line D
_j , the gate is connected to the gate line G _i , the source is connected to one electrode of the liquid crystal 23, and the other electrode of the liquid crystal 23 is connected to the counter electrode.
Connected to C _i .

The MOS transistors 21 and 22 are connected in series,
The drain of the S transistor 21 is connected to the data line D _j , the gate is connected to the control line R _i, and the gate of the MOS transistor 22 is connected to the liquid crystal 2.
Connect to 3, source grounded. These form display cells and are arranged in a matrix.

Next, the operation will be described.

To write the display signal, first, the gate line G _{i is set} to the high voltage V _DD , and the MOS transistor 20 is turned on. The display signal is applied to the liquid crystal 23 via the data line D _j and the MOS transistor 20. Next, when the gate line G _i is grounded, the MOS transistor 2
0 is non-conductive, and the display signal is the liquid crystal 2 as a capacitor.
Stored in 3. Here, assuming that the voltage of the counter electrode C _i is V _SS , the liquid crystal displays bright when the display signal is high voltage V _DD and low voltage V _{DD.
If SS} , dark is displayed.

Next, the reproducing operation will be described.

First, the data line D _j is precharged to the high voltage V _DD . Next, the control line R _{i is set} to a high voltage to turn on the MOS transistor 21.

As a result, if the display signal accumulated in the liquid crystal 23 as a capacitor is a high voltage, the MOS transistor 22 becomes conductive,
The data line D _j is grounded. On the contrary, if the display signal is low voltage, the MOS transistor 22 becomes non-conductive, and the data line D _j maintains the precharge voltage V _DD .

If the capacitance of the data line D _j is set sufficiently larger than the capacitance of the liquid crystal 23, the gate line after the control line R _i is grounded.
By setting G _i to a high voltage and turning on the MOS transistor 20, the voltage of the data line D _j is inverted and written in the liquid crystal 23 via the MOS transistor 20, and the display signal is reproduced. At this time, when the voltage of the counter electrode C _i is changed from V _SS to V _DD , the polarity of the voltage applied to the liquid crystal is reversed. By periodically performing the same operation on the display cells, the display signal is held and the polarity of the voltage applied to the liquid crystal is also periodically inverted.

In the above description, writing of the reproduced display signal was performed on the original display cell. However, by the gate line G _{i + 1} instead of the gate line G _i to a high voltage in the reproducing operation to a high voltage, a display signal is written to the display cell of the lower, the display signal is shifted downward become. Similarly, the writing of the display signal in the reproducing operation can be performed in any display cell in the vertical direction. Therefore, in the present embodiment, scrolling of the display in the vertical direction can be easily realized.

FIG. 4 shows a third embodiment of the present invention, in which MOS transistors 24 and 25 are added to the circuit shown in FIG.

Here, the source of the MOS transistor 24 is a MOS transistor
The source and drain of 21 are connected to the data line D _{j + 1} , respectively. The source of the MOS transistor 25 is the liquid crystal 23.
In addition, the drain is connected to the data line D _{j + 1} . further,
The gates of the MOS transistors 21 and 24 are control lines R _i A and R _i , respectively.
Connected to B. The gates of the MOS transistors 20 and 25 are connected to the gate lines G _i A and G _i B, respectively. The MOS transistors 20, 21, 22, 24, 25 and the liquid crystal 23 form a display cell.

In this example as well, the display cells are arranged in a matrix, as in the case shown in FIG.

R _i A and G _i B are signal lines for the display cell to write and reproduce a display signal from the left data line D _j , and R _i B, G _i B
A is a signal line for writing and reproducing a display signal from the right data line D _{j + 1} . Therefore, the display signal shifts to the right by performing the reproducing operation using R _i A and G _i B, and conversely shifts to the left by using R _i B and G _i A. Therefore, according to the present embodiment, not only scrolling in the vertical direction but also scrolling in the horizontal direction can be easily realized.

In the above description, the display signal is described as being stored in the capacitor of the liquid crystal section, but the configuration and operation are exactly the same even if a capacitor is added in parallel with the liquid crystal.

Further, in the embodiment shown in FIGS. 3 and 4 in which the display signal is once read out to the data line and reproduced, a sense amplifier is provided in the data line to detect a minute voltage change on the data line and forcibly write the data. It is also possible to improve the read speed by grounding the line.

Incidentally, in the present invention, it is possible to easily read the display signal to the outside through the data line when reproducing the display signal.

(Effect) As described above, according to the present invention, it is possible to easily reproduce the display signal in the display cell and invert the polarity of the voltage applied to the liquid crystal by applying the clock pulse to the display cell. Becomes This eliminates the need for a frame memory for storing display signals, and eliminates the need for adding a reproducing function or a polarity reversing function to a drive control circuit arranged outside the display element. There are advantages that it can be greatly simplified and the display device can be realized at low cost.

[Brief description of drawings]

FIG. 1 shows a conventional display element, FIG. 2 shows a first embodiment of the present invention, FIG. 3 shows a second embodiment of the present invention, and FIG. 4 shows the present invention. It is a figure which shows the 3rd Example of. 1,10,11,12,13,20,21,22,24,25 …… MOS transistor,
2,14,23 ...... Liquid crystal, 3 ...... Common electrode, D _j ...... Data line, G _i ...... Gate line, R _i , S _i ...... Control line, C _i ...... Counter electrode.

Claims (1)

[Claims] 1. A display element in which display cells, which hold an input display signal for a desired period, are arranged in a matrix, wherein a pixel electrode is provided inside the display cell and a liquid crystal is provided on the pixel electrode. A translucent counter electrode, a MOS transistor for applying a display signal to the pixel electrode, a gate line for selecting the MOS transistor, and a data line for transmitting a display signal to the MOS transistor, A display element comprising a plurality of MOS transistors and a control line, and a reproducing / reversing means for reversing the polarity of a voltage applied to the liquid crystal when reproducing the display signal.