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JPH0654814B2 - Method for manufacturing solar cell device - Google Patents
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JPH0654814B2 - Method for manufacturing solar cell device - Google Patents

Method for manufacturing solar cell device

Info

Publication number
JPH0654814B2
JPH0654814B2 JP1155118A JP15511889A JPH0654814B2 JP H0654814 B2 JPH0654814 B2 JP H0654814B2 JP 1155118 A JP1155118 A JP 1155118A JP 15511889 A JP15511889 A JP 15511889A JP H0654814 B2 JPH0654814 B2 JP H0654814B2
Authority
JP
Japan
Prior art keywords
substrate
solar cell
square
power generation
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1155118A
Other languages
Japanese (ja)
Other versions
JPH0284778A (en
Inventor
尚 澁谷
靖雄 岸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP1155118A priority Critical patent/JPH0654814B2/en
Publication of JPH0284778A publication Critical patent/JPH0284778A/en
Publication of JPH0654814B2 publication Critical patent/JPH0654814B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は太陽電池モジュールを複数個並置した太陽電池
装置の製造方法に関する。
The present invention relates to a method for manufacturing a solar cell device in which a plurality of solar cell modules are juxtaposed.

(ロ)従来の技術 それ自体で発電可能な太陽電池モジュールを複数個並置
し、隣り合うモジュール同士を電気的に直列及びまたは
並列に接続することによって任意の電気容量を得るよう
にした太陽電池装置は例えば特開昭57−211280
号公報に開示された如く既に知られている。斯る公開公
報に開示された太陽電池装置によると、第12図に示す
如く上記隣り合う太陽電池モジュール(30A)(30
B)同士の電気的接続は、発電膜(31)を支持する基板(3
2)の対応側面の相反する方向に、半導体光活性層(33)と
共に上記発電膜(31)を構成する一対の電極(34)(35)を延
在せしめ、互いに太陽電池モジュール(30)の近接せる側
面に延在した異極性の電極(34)(35)間に弾力性金属片(3
6)をその弾力性に抗して介在せしめることによって実現
しようとしている。
(B) Conventional technology A solar cell device in which a plurality of solar cell modules capable of generating electricity by themselves are juxtaposed and adjacent modules are electrically connected in series and / or in parallel to obtain an arbitrary electric capacity. Is, for example, JP-A-57-212280
It is already known as disclosed in the publication. According to the solar cell device disclosed in such publication, as shown in FIG. 12, the adjacent solar cell modules (30A) (30
B) are electrically connected to each other by the substrate (3) supporting the power generation film (31).
In the opposite directions of the corresponding side surface of 2), a pair of electrodes (34) (35) constituting the power generation film (31) together with the semiconductor photoactive layer (33) are extended, and the solar cell module (30) of each other. Elastic metal pieces (3
We are trying to realize 6) by interposing it against its elasticity.

然るに斯る構造によると基板(32)の相対向する側面に電
極(34)(35)を夫々延在せしめなければならず、個々の太
陽電池モジュール(30A)(30B)間の電気的接続を簡便かつ
確実に行うことができると云う反面、その実用化は難し
い。
Therefore, according to such a structure, the electrodes (34) (35) must be extended on the opposite sides of the substrate (32), respectively, and the electrical connection between the individual solar cell modules (30A) (30B) must be established. Although it can be performed simply and reliably, its practical application is difficult.

一方、特開昭56−158486号公報に開示された太
陽電池は、太陽電池ウエハを四辺形状の基板に組込んで
太陽電池モジュールを構成し、その四角に端子部を設け
ることによって、隣接する太陽電池モジュール間の電気
的接続を上記端子部同士の結合により達成している。こ
の構造によれば、複数の太陽電池モジュール間の電気的
接続が容易に行なえるという利点を持つ。
On the other hand, the solar cell disclosed in Japanese Unexamined Patent Publication No. 56-158486 has a structure in which a solar cell wafer is incorporated into a quadrilateral substrate to form a solar cell module, and a terminal portion is provided in the square, so that the adjacent solar cells are connected to each other. The electrical connection between the battery modules is achieved by coupling the terminal portions. This structure has an advantage that electrical connection between a plurality of solar cell modules can be easily performed.

(ハ)発明が解決しようとする課題 本発明は上述の如く四角に端子部を配置した太陽電池モ
ジュールは、複数の当該太陽電池モジュールの電気的接
続が実用的である点に着目し、斯る接続構造を持つ太陽
電池装置の工業的に有利な製造方法を提供することを技
術的課題とする。
(C) Problems to be Solved by the Invention The present invention focuses on the fact that the solar cell module in which the terminal portions are arranged in a square as described above has a practical electrical connection between the plurality of solar cell modules. It is a technical object to provide an industrially advantageous manufacturing method of a solar cell device having a connection structure.

(ニ)課題を解決するための手段 本発明はこのような課題を解決するために為されたもの
であって、四辺形状基板に端子部を配置した太陽電池モ
ジュールを複数個並置し、それらの太陽電池モジュール
を互いに近接する少なくとも一辺の両端に配置された端
子部同士を電気的に接続する太陽電池装置の製造方法に
おいて、上記太陽電池モジュールは、上記基板の一辺か
ら、該辺と対向する他の辺へと配列された複数個の短冊
状発電膜から成り、該発電膜は、上記基板の主面に形成
された、第1電極膜と、上記主面にデポアップ方式を用
いて原料ガスの分解によって形成された半導体光活性層
と、該活性層を挟んで上記第1電極膜と対向するように
設けられた第2電極膜とから成り、これら発電膜は当該
発電膜間の隣接間隔部に於て、隣接する一方の第1電極
膜と他方の第2電極膜とを重畳せしめることに因り直列
接続とすると共に、上記各辺の各々の両端には上記発電
膜の第1電極膜、又は第2電極膜と連なって形成された
同一極性の上記端子部が設けられており、上記半導体光
活性層をデポアップ方式にて被着する際に用いるトレイ
の開口部の四角に上記四辺形状基板が落下するのを防止
する落下防止片を設け、その落下防止片にて該基板の四
角を被覆して半導体光活性層を被着する際の、該四角へ
の上記半導体光活性層の被着を防止すると共に、その落
下防止片にて被覆された四辺形状基板の四角に上記端子
部を設けたことを特徴とする。
(D) Means for solving the problem The present invention has been made to solve such a problem, a plurality of solar cell modules having terminal portions arranged on a quadrilateral substrate are juxtaposed, and In a method for manufacturing a solar cell device, in which solar cell modules are electrically connected to terminal portions arranged at both ends of at least one side close to each other, the solar cell module is arranged such that one side of the substrate faces the side. Of a plurality of strip-shaped power generation films arranged on the sides of the substrate. The power generation film includes a first electrode film formed on the main surface of the substrate and a source gas of a source gas formed on the main surface by a deposition method. A semiconductor photoactive layer formed by decomposition, and a second electrode film provided so as to face the first electrode film with the active layer sandwiched therebetween, and these power generation films are adjacent gaps between the power generation films. The adjacent one Of the first electrode film and the second electrode film of the other side are connected in series, and both ends of each side are connected to the first electrode film or the second electrode film of the power generation film. The terminal portion having the same polarity formed as described above is provided to prevent the quadrilateral substrate from dropping in the square of the opening of the tray used when the semiconductor photoactive layer is deposited by the depot-up method. A drop prevention piece is provided, and when the semiconductor photoactive layer is deposited by covering the square of the substrate with the fall prevention piece, the semiconductor photoactive layer is prevented from being attached to the square and the fall It is characterized in that the terminal portion is provided in a square of a quadrilateral substrate covered with the prevention piece.

(ホ)作用 本発明においては、半導体光活性層をデポアップ方式に
て形成するに際して、基板が落下するのを防止するため
にトレイの開口部に設けた落下防止片にて被覆された基
板の四角に電極部を設けているので、基板の四角を除く
全表面にピンホールなどのない良質な半導体光活性層を
形成することができる。
(E) Action In the present invention, when the semiconductor photoactive layer is formed by the depot-up method, the square of the substrate covered with the fall prevention piece provided in the opening of the tray to prevent the substrate from falling. Since the electrode portion is provided on the substrate, it is possible to form a good-quality semiconductor photoactive layer without pinholes on the entire surface of the substrate except the square.

また、そもそも光電変換機能を担わない、電気取り出し
のための端子部を、発電膜が形成されている基板の中央
に配置することは、光電変換効率向上の面で好ましくな
い。これに対して、本発明で用いる太陽電池モジュール
は、複数の短冊状の発電膜を基板表面に沿って配列し形
成するものであることから、その端子部は構造上、基板
の周辺近傍に容易に配置させることができる。このた
め、本発明では良質な半導体光活性層の得にくい基板の
四角を上記端子部として利用することができ、活性層と
して良好な膜質が形成される部分を発電膜として利用す
ることができることとなる。
Further, it is not preferable from the viewpoint of improving the photoelectric conversion efficiency to dispose the terminal portion for taking out electricity, which does not originally have a photoelectric conversion function, at the center of the substrate on which the power generation film is formed. On the other hand, since the solar cell module used in the present invention is formed by arranging a plurality of strip-shaped power generation films along the surface of the substrate, its terminal portion is structurally easy to be formed near the periphery of the substrate. Can be placed at. Therefore, in the present invention, it is possible to use the square of the substrate in which it is difficult to obtain a good-quality semiconductor photoactive layer as the terminal portion, and to use the portion where a good film quality is formed as the active layer as the power generation film. Become.

(ヘ)実施例 第1図は本発明により製造される太陽電池装置を構成す
る太陽電池モジュール(1)を示し、該太陽電池モジュー
ル(1)はそれ自体で光照射を受けると電子及び又は正孔
のキャリアを発生する発電機能を有する。
(F) Example FIG. 1 shows a solar cell module (1) which constitutes a solar cell device manufactured according to the present invention. The solar cell module (1) itself receives an electron and / or positive light when irradiated with light. It has a power generation function to generate holes carriers.

第2図及び第3図は第1図に於けるII−II′線及びIII
−III′線断面を示している。上記第1図乃至第3図に
於いて、(2)は透孔性且つ絶縁性の例えばガラス製四辺
形状のこの実施例では正方形状の基板、(3a)〜(3
b)は該基板(2)上に離間配置された短冊状の発電膜
で、該発電膜(3a)〜(3d)の各々は、基板(2)側
からのSnO、ITO等の透孔性導電酸化物(TC
O)の第1電極膜(4a)〜(4d)と、半導体接合を
備え後述するデボアップ方式によるプラズマ分解法によ
り皮膜されるアモルファスシリコン等の半導体光活性層
(5a)〜(5d)と、好ましくはアルミニウム、チタ
ン銀合金及びアルミニウムの三層構造から成る第2電極
膜(6a)〜(6d)と、を順次積層せしめた積層構造
を持つ。上記積層構造にある短冊状の発電膜(3a)〜
(3d)の総合膜厚は光活性層(5a)〜(5d)を構
成する半導体材料に依存し、上述の如きアモルファスシ
リコンによりpinの各層を構成する単独構造或いはp
層をアモルファスシリコンカーバイトで構成し、i層n
層をアモルファスシリコンとしたヘテロ接合構造、更に
は両者を積層せしめたタンデム構造等の如くアモルファ
スシリコンを主体とする場合数ミクロンオーダであり、
またCdS系であっても高々10ミクロンオーダ止りで
あって、それ等は基板(2)の厚みに比してほとんど無視
し得る程度である。そして、4つに離間配置された短冊
状発電膜(3a)〜(3d)はその隣接間隔部の発電に
寄与しない無効領域に於いて、左隣りの第2電極膜(6
a)〜(6d)と右隣りの第1電極膜(4b)〜(4
d)とが、チタン銀合金或いはチタン銀合金、アルミニ
ウム、チタン銀合金の積層体からなるストライブ状結合
電極膜(7ab)(7bc)(7cd)の被着により電
気的に直列接続されている。
2 and 3 are II-II 'line and III in FIG.
-III 'line sectional drawing is shown. In FIG. 1 to FIG. 3, (2) is a permeable and insulative, for example, glass quadrilateral substrate having a square shape in this embodiment, (3a) to (3)
b) is a strip-shaped power generation film spaced apart on the substrate (2), and each of the power generation films (3a) to (3d) is a through hole of SnO 2 , ITO or the like from the substrate (2) side. Conductive oxide (TC
O) of the first electrode films (4a) to (4d) and semiconductor photoactive layers (5a) to (5d) such as amorphous silicon having a semiconductor junction and coated by a plasma decomposition method by a devoup method described later, preferably Has a laminated structure in which second electrode films (6a) to (6d) having a three-layer structure of aluminum, a titanium-silver alloy and aluminum are sequentially laminated. Strip-shaped power generation film (3a) having the above-mentioned laminated structure
The total film thickness of (3d) depends on the semiconductor material forming the photoactive layers (5a) to (5d), and has a single structure or p forming each layer of pin by amorphous silicon as described above.
Layer is composed of amorphous silicon carbide, i layer n
It is on the order of a few microns when mainly composed of amorphous silicon such as a heterojunction structure in which layers are amorphous silicon, and further, a tandem structure in which both layers are laminated,
Moreover, even CdS-based alloys have a stop of at most 10 μm, which is almost negligible compared to the thickness of the substrate (2). Then, the four strip-shaped power generation films (3a) to (3d) spaced apart from each other are provided in the ineffective region which does not contribute to power generation in the adjacent space portions thereof, and the second electrode film (6) adjacent to the left side is formed.
a) to (6d) and right adjacent first electrode films (4b) to (4)
and d) are electrically connected in series by depositing striped coupling electrode films (7ab) (7bc) (7cd) made of a titanium silver alloy or a laminate of titanium silver alloy, aluminum and titanium silver alloy. .

(8)は最左端の発電膜(3a)から基板(2)の側辺(2▲
▼)に向って露出した第1電極膜(4a)の露出部
分(4a′)に重畳被着されたストライプ状の端子電極
膜で、結合電極膜(7ab)〜(7cd)と同一工程に
より形成され、その基板側辺(2▲▼)に沿った両
端、即ち基板(2)の角(2A)、(2B)に2等辺三角
形状の端子部(8A)(8B)を備えている。上記端子
電極膜(8)は基本的には不用であるが、第1電極膜(4
a)がTCOから形成されている場合、該TCOはシー
ト抵抗地が高いために発電膜(3a)〜(3d)にて発
電した電力を外部に取り出すための端子部(8A)(8
B)を上述の如く基板(2)の角(2A)(2B)に配置
すると、斯る端子部(8A)(8B)に到達するまでに
高抵抗値の第1電極膜(4a)の長手方向に露出した露
出部(4a′)に於ける電力損失を、端子電極膜(8)の
重畳被着による低抵抗化によって抑圧せしめている。
(8) is the side (2 ▲) of the substrate (2) from the leftmost power generation film (3a).
▼) is a stripe-shaped terminal electrode film that is superposed on the exposed portion (4a ′) of the first electrode film (4a) exposed in the same process as the coupling electrode films (7ab) to (7cd). The terminals (8A) and (8B) having an isosceles triangular shape are provided at both ends along the side (2) of the board, that is, the corners (2A) and (2B) of the board (2). The terminal electrode film (8) is basically unnecessary, but the first electrode film (4)
When a) is formed of TCO, since the TCO has a high sheet resistance, the terminal portions (8A) (8A) (8A) (8) for extracting the power generated by the power generation films (3a) to (3d) to the outside.
When B) is arranged on the corners (2A) and (2B) of the substrate (2) as described above, the longitudinal length of the first electrode film (4a) having a high resistance value is reached before reaching the terminal portions (8A) and (8B). The power loss in the exposed portion (4a ') exposed in the direction is suppressed by the low resistance due to the superposed deposition of the terminal electrode film (8).

(9)は最右端の発電膜(3d)の第2電極膜(6c)か
ら基板(2)の側辺(2▲▼)に向ってストライプ状
に延在した逆極性の端子電極膜で、該端子電極膜(9)は
上記端子電極膜(8)及び結合電極膜(7ab)〜(7c
d)と同じ工程を経て基板側辺(2▲▼)に沿って
予め形成されていた第1電極膜(4a)〜(4d)と同
一材料製の固着電極膜(10)上に重畳被着されている。
(9C)(9D)は上記逆極性の端子電極膜(9)の両端
である基板(2)の角(2C)、(2D)に配置された1/4
円形状の端子部で、該端子部(9C)(9D)は上記端
子電極膜(9)と同一工程により形成され該電極膜(9)と1/
4円弧状スリット(11C)(11D)によって切離さ
れてはいるものの、上記固着電極膜(10)の介在により電
気的には連なっている。
(9) is a reverse polarity terminal electrode film extending in stripes from the second electrode film (6c) of the rightmost power generation film (3d) toward the side (2 ▲ ▼) of the substrate (2), The terminal electrode film (9) includes the terminal electrode film (8) and the coupling electrode films (7ab) to (7c).
Through the same process as in (d), the first electrode films (4a) to (4d) previously formed along the substrate side (2 ▲ ▼) are superposed and deposited on the fixed electrode film (10) made of the same material. Has been done.
(9C) and (9D) are 1/4 placed on the corners (2C) and (2D) of the substrate (2) which are both ends of the terminal electrode film (9) of the opposite polarity.
The terminal portions (9C) and (9D) have a circular shape and are formed in the same step as the above-mentioned terminal electrode film (9).
Although they are separated by the four arc-shaped slits (11C) and (11D), they are electrically connected by the interposition of the fixed electrode film (10).

この様にして四角(2A)〜(2D)に配置された端子
部(9A)〜(9D)は第4図の如く発電膜(3a)〜
(3d)を保護すべくパッシベーション膜(12)が被着さ
れた状態に於いても露出し、その形状が直角3角形状と
1/4円形状と相違することによって基板(2)の形状が対称
的な正方形状であってもその極性識別を可能ならしめて
いる。
The terminal portions (9A) to (9D) arranged in the squares (2A) to (2D) in this manner are the power generation films (3a) to (9a) as shown in FIG.
Even when the passivation film (12) is applied to protect (3d), it is exposed and its shape is a right angled triangular shape.
The difference from the 1/4 circular shape makes it possible to identify the polarity even if the substrate (2) has a symmetrical square shape.

第5図は第4図に示した樹脂系のパッシベーション膜(1
2)が例えばスクリーン印刷により塗布された太陽電池モ
ジュール(1A)〜(1D)を4個田の字状に基板(2)
の側面を当接せしめて並置した状態であり、太陽電池モ
ジュール(1A)〜(1D)の端子部(8A)(8B)
(9C)(9D)は互いに当接した側辺(2▲▼)
〜(2▲▼)の両端に於いて近接する。
FIG. 5 shows the resin-based passivation film (1
2) is a solar cell module (1A) to (1D) coated by, for example, screen printing in a square-shaped substrate (2)
Of the solar cell modules (1A) to (1D) are in a state of being juxtaposed by abutting the side surfaces of the solar cell modules (1A) to (1D).
(9C) and (9D) are sides (2 ▲ ▼) that are in contact with each other.
They come close to each other at both ends of (2 ▲ ▼).

而して、各太陽電池モジュール(1A)〜(1D)の基
板(2)の四角(2A)〜(2D)に於いてパッシベーシ
ョン膜(12)から露出した端子部(8A)(8B)(9
C)(9D)は、第5図のように例えば4個田の字状に
当接並置すると、当接した側辺(2▲▼)〜(2▲
▼)の両端に於いて相隣合うモジュール(1A)〜
(1D)の端子部(8A)(8B)(9C)(9D)と
近接する結果、上記先行技術と同じく直並列接続せしめ
ようとすれば第6図の如く近接する端子部(8A)(8
B)(9C)(9D)及びそれ等と同一行方向の側辺
(2▲▼)(2▲▼)及び(2▲▼)(2
▲▼)に沿って位置する端子部(8A)(8B)
(9C)(9D)とを連結すべくストライプ状第1〜第
3金属箔(13i)〜(13iii)が配線され、各端
子部(8A)(8B)(9C)(9D)を跨ぐ箇所にあ
っては両者は半田付けされている。
Thus, the terminals (8A) (8B) (9) exposed from the passivation film (12) in the squares (2A) to (2D) of the substrate (2) of each solar cell module (1A) to (1D).
C) and (9D) are abutted side by side, for example, in the shape of a four-piece field as shown in FIG.
Modules (1A) adjacent to each other at both ends of ▼)
As a result of being close to the terminal parts (8A), (8B), (9C), and (9D) of (1D), if an attempt is made to make a serial / parallel connection as in the above-mentioned prior art, the adjacent terminal parts (8A) (8A) (8A)
B) (9C) (9D) and side edges (2 ▲ ▼) (2 ▲ ▼) and (2 ▲ ▼) (2) in the same row direction as them.
Terminal part (8A) (8B) located along (▲ ▼)
Stripe-shaped first to third metal foils (13i) to (13iii) are wired so as to connect with (9C) and (9D), and at locations where they straddle each terminal portion (8A) (8B) (9C) (9D). If so, both are soldered.

第7図はアモルファスシリコン系の光活性層(5)をRF
プラズマ分解法により形成するための原理図を示してお
り、13.56MHzのRF電源(14)に連なりプラズマ
を励起すべく対向配置された一対の対向電極(15i)
(15ii)間に、第8図に分解して示す如く4枚の基
板(2i)〜(2iv)を同時に共通のトレイ(16)に被
着面が底面となるようにして各開口部(17i)〜(1
7iv)に収納し一方の主面のみを均熱板(18)によって
覆蓋したものを配置した状態で、一方の対向電極(15
i)の対向面に多数穿たれた吐出孔(19)…からシラン
(SiH)等の反応ガスをプラズマ領域に均一に吐出
せしめることによって、アモルファスシリコン系の光活
性層(5)がトレイ(16)の底面に於いて露出した基板(2
i)〜(2iv)の他方の主面に被着形成される。
Figure 7 shows the amorphous silicon photoactive layer (5)
The principle diagram for forming by the plasma decomposition method is shown, and a pair of opposed electrodes (15i) are connected to the RF power source (14) of 13.56 MHz and are opposed to each other to excite plasma.
During (15ii), four substrates (2i) to (2iv) are simultaneously placed on the common tray (16) so that the adherend faces the bottom as shown in exploded view in FIG. ) ~ (1
7 iv) and one main surface of which is covered with a heat equalizing plate (18) is placed, and one counter electrode (15)
i) The reaction gas such as silane (SiH 4 ) is uniformly discharged into the plasma region from a large number of discharge holes (19) ... 16) exposed substrate on the bottom surface (2
i) to (2iv) on the other main surface.

尚、第7図に於いて、(20)は他方の対向電極(15i
i)内に設けられたヒータで、ヒータ電源(21)と連なり
光活性層(5)の形成時、発熱して基板(2i)〜(2i
v)を一方の主面側から均熱板(18)を介して均一に加熱
している。
Incidentally, in FIG. 7, (20) is the other counter electrode (15i
When a photoactive layer (5) is connected to a heater power source (21) by a heater provided in i), heat is generated and the substrates (2i) to (2i) are heated.
v) is uniformly heated from one main surface side through the soaking plate (18).

この様に光活性層(5)はトレイ(16)の底面に於いて露出
した基板(2i)〜(2iv)の他方の主面に被着形成
される所謂デポアップ方式を採用することによって、基
板(2i)〜(2iv)の被着面に例えば前回までの反
応により反応炉内壁に固着していたフレークが落下付着
することがなくピンホールのない良質な膜が得られる。
In this way, the photoactive layer (5) is formed by depositing on the other main surface of the substrates (2i) to (2iv) exposed on the bottom surface of the tray (16) by using a so-called deposition method. For example, flakes adhered to the inner wall of the reactor due to the reaction up to the previous time do not drop and adhere to the adherend surfaces (2i) to (2iv), and a high-quality film without pinholes can be obtained.

然し乍ら、デポアップ方式を採るために基板(2i)〜
(2iv)の被着面を下方に向けなければならず、トレ
イ(16)の開口部(17i)〜(17iv)が基板(2
i)〜(2iv)と同一形状であれば基板(2i)〜
(2iv)はトレイ(16)から落下するための、第9図の
如く各開口部(17i)〜(17iv)の四角(17
a)〜(17d)に落下防止片(22a)〜(22d)
が設けられている。そのために、光活性層(5)が被着可
能な最大領域は第10図に於いてハッチングで示す範囲
の通り、基板(2i)〜(2iv)の四角(2A)〜
(2D)が上記落下防止片(22a)〜(22d)によ
り被覆状態にある結果この四角(2A)〜(2D)には
被着されない。このような落下防止のための手段はデポ
アップ方式を採用する限りどこかに設けなければならな
い。そこで、本発明では、上述の如く四角(2A)〜
(2D)にそれらを設けた。本発明の如く基板(2)の四
角(2A)〜(2D)に外部取り出し用の端子部(8
A)(8B)(9C)(9D)を配置せしめたからと云
って、発電に寄与する有効面積の減少とはならない。即
ち上述の如く斯る基板(2)の四角(2A)〜(2D)は
デポアップ方式を採用する限り光活性層(5)が被着しな
い箇所、即ち発電膜(3a)〜(3d)を形成すること
のできない無効領域であり必ず発生する。従って、四角
を無効領域とし、これを端子部(8A)(8B)(9
C)(9D)として有効利用することによって、当該端
子部を基板(2)の発電膜(3a)〜(3d)を形成する
主面に設けたにも拘らず有効領域の面積減少の原因とは
ならないのである。
However, in order to adopt the depot-up method, the substrate (2i) ~
The adherend surface of (2iv) must be directed downwards, and the openings (17i) to (17iv) of the tray (16) must be connected to the substrate (2iv).
i) to (2iv) have the same shape, the substrates (2i) to
(2iv) is the square (17) of each opening (17i) to (17iv) for dropping from the tray (16) as shown in FIG.
a) to (17d) fall prevention pieces (22a) to (22d)
Is provided. Therefore, the maximum area to which the photoactive layer (5) can be applied is as shown by the hatched area in FIG. 10, and the squares (2A) to (2A) of the substrates (2i) to (2iv)
As a result of (2D) being covered by the fall prevention pieces (22a) to (22d), the squares (2A) to (2D) are not attached. Means for preventing such drop must be provided somewhere as long as the depot-up method is adopted. Therefore, in the present invention, as described above, the square (2A) to
They were provided in (2D). As in the present invention, the terminals (8) for external extraction are provided on the squares (2A) to (2D) of the substrate (2).
The arrangement of (A), (8B), (9C), and (9D) does not mean that the effective area contributing to power generation is reduced. That is, as described above, the squares (2A) to (2D) of the substrate (2) form the portions where the photoactive layer (5) does not adhere, that is, the power generation films (3a) to (3d) as long as the depot-up method is adopted. This is an invalid area that cannot be processed and always occurs. Therefore, the square is defined as an invalid area, and this is defined as the terminal portions (8A) (8B) (9
C) By effectively utilizing as terminal (9D), even though the terminal portion is provided on the main surface of the substrate (2) forming the power generation films (3a) to (3d), the area of the effective area is reduced. It must not happen.

第11図は本発明により製造される他の実施例を示し、
第6図の実施例と異なるところは太陽電池モジュール
(1A)〜(1D)の接続形態にある。即ち、第6図の
実施例は4個の太陽電池モジュール(1A)〜(1D)
を直並列接続せしめていたが、この実施例にあっては4
個の太陽電池モジュール(1A)〜(1D)が同じく田
の字状に配置されているものの全てを直列に接続すべ
く、第1行及び第2行に配線されたストライプ状金属箔
(13ia)(13id)(13iib)(13ii
c)がその中央に於いて分断される。
FIG. 11 shows another embodiment manufactured according to the present invention,
The difference from the embodiment of FIG. 6 lies in the connection form of the solar cell modules (1A) to (1D). That is, the embodiment of FIG. 6 has four solar cell modules (1A) to (1D).
Were connected in series and parallel, but in this embodiment, 4
Striped metal foils (13ia) wired in the first and second rows to connect all of the solar cell modules (1A) to (1D), which are also arranged in the shape of a square, in series. (13id) (13iib) (13ii
c) is divided at its center.

尚、以上の実施例に於いては太陽電池モジュール(1)の
数は4個を例にとって説明したが、本発明の適用可能な
太陽電池モジュール(1)の数は2個以上の整数であれば
良く、また接続形態も種々の組合せを施し得る。
In the above embodiments, the number of solar cell modules (1) is four, but the number of solar cell modules (1) to which the present invention is applicable may be an integer of two or more. In addition, various combinations of connection forms may be applied.

(ヘ)発明の効果 本発明は以上の説明から明らかなように、デポアップ方
式にて半導体光活性層を形成する際に、基板が落下する
のを防止するためのトレイの開口部の四角に設けた落下
防止片にて被覆された基板の四角に電極部を設けている
ので、即ち、落下防止片にて被覆されることによって半
導体光活性層が形成されない個所を電極部としているの
で、半導体光活性層を四角を除く基板のほぼ全域に被着
せしめることができ、太陽光発電に寄与する有効面積を
最大とすることができる。
(F) Effect of the Invention As is clear from the above description, the present invention is provided in the square of the opening of the tray for preventing the substrate from dropping when the semiconductor photoactive layer is formed by the depot-up method. Since the electrode portion is provided in the square of the substrate covered with the fall prevention piece, that is, the portion where the semiconductor photoactive layer is not formed by the fall prevention piece is used as the electrode portion. The active layer can be applied to almost the entire area of the substrate except the square, and the effective area contributing to solar power generation can be maximized.

更に、通常光電変換効率向上のためには、光電変換に寄
与しない端子部はできるだけ基板の周辺近傍に配置させ
る必要がある。これに対し、本発明は複数の発電膜を基
板表面に沿って配列し、これら発電膜を直列接続したも
のであることから、基板の四角にその端子部を配置させ
ることが容易となり、光電変換効率の向上を図る得る配
置とすることが可能となる。
Furthermore, in order to improve the photoelectric conversion efficiency, it is usually necessary to arrange the terminal portion that does not contribute to photoelectric conversion as close to the periphery of the substrate as possible. On the other hand, according to the present invention, since a plurality of power generation films are arranged along the substrate surface and these power generation films are connected in series, it becomes easy to arrange the terminal portions in the squares of the substrate, and photoelectric conversion is performed. It is possible to make an arrangement that can improve efficiency.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明太陽電池装置の製造方法に用いられる太
陽電池モジュールのパッシベーション処理前の状態を示
す平面図、第2図は第1図のII−II′線断面図、第3図
は第1図のIII−III’線断面図、第4図は第1図に示し
た太陽電池モジュールのパッシベーション処理後の状態
を示す平面図、第5図は本により製造される太陽電池装
置の太陽電池モジュール配列の一実施例を示す平面図、
第6図は本発明により製造される太陽電池装置の一実施
例を示す平面図、第7図乃至第10図は本発明の要部の
製造方法を示し、第7図は原理図、第8図は分解斜視
図、第9図は部分拡大平面図、第10図は平面図、第1
1図は本発明により製造される他の実施例を示す平面
図、第12図は従来例を示す断面図、である。 (1)(1A)〜(1D)……太陽電池モジュール、(2)
(2i)〜(2iv)……基板、(2A)〜(2D)…
…角、(3a)〜(3d)……発電膜、(8A)(8B)(9
C)(9D)……端子部、(15i)(15ii)……
対向電極、(16)……トレイ、(17i)(17iv)…
…開口部、(22a)〜(22d)……落下防止片。
FIG. 1 is a plan view showing a state of a solar cell module used in a method for manufacturing a solar cell device of the present invention before passivation treatment, FIG. 2 is a sectional view taken along line II-II ′ of FIG. 1, and FIG. 1 is a cross-sectional view taken along the line III-III 'in FIG. 1, FIG. 4 is a plan view showing a state of the solar cell module shown in FIG. 1 after passivation treatment, and FIG. 5 is a solar cell of a solar cell device manufactured by a book. A plan view showing an example of a module arrangement,
FIG. 6 is a plan view showing an embodiment of a solar cell device manufactured according to the present invention, FIGS. 7 to 10 show a manufacturing method of an essential part of the present invention, FIG. 7 is a principle view, and FIG. The figure is an exploded perspective view, FIG. 9 is a partially enlarged plan view, FIG. 10 is a plan view, and FIG.
FIG. 1 is a plan view showing another embodiment manufactured by the present invention, and FIG. 12 is a sectional view showing a conventional example. (1) (1A) to (1D) …… Solar cell module, (2)
(2i) to (2iv) ... substrate, (2A) to (2D) ...
… Corner, (3a) to (3d) …… Power generation film, (8A) (8B) (9
C) (9D) …… Terminal part, (15i) (15ii) ……
Counter electrode, (16) ... Tray, (17i) (17iv) ...
... Openings, (22a) to (22d) ... Fall prevention pieces.

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭57−211280(JP,A) 特開 昭56−158486(JP,A) 特開 昭56−105627(JP,A) ─────────────────────────────────────────────────── ─── Continuation of front page (56) Reference JP-A-57-211280 (JP, A) JP-A-56-158486 (JP, A) JP-A-56-105627 (JP, A)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】四辺形状基板に端子部を配置した太陽電池
モジュールを複数個並置し、それらの太陽電池モジュー
ルを互いに近接する少なくとも一辺の両端に配置された
端子部同士を電気的に接続する太陽電池装置の製造方法
において、 上記太陽電池モジュールは、上記基板の一辺から、該辺
と対向する他の辺へと配列された複数個の短冊状発電膜
から成り、該発電膜は、上記基板の主面に形成された、
第1電極膜と、上記主面にデポアップ方式を用いて原料
ガスの分解によって形成された半導体光活性層と、該活
性層を挟んで上記第1電極膜と対向するように設けられ
た第2電極膜とから成り、これら発電膜は当該発電膜間
の隣接間隔部に於て、隣接する一方の第1電極膜と他方
の第2電極膜とを重畳せしめることに因り直列接続とす
ると共に、上記各辺の各々の両端には上記発電膜の第1
電極膜、又は第2電極膜と連なって形成された同一極性
の上記端子部が設けられており、 上記半導体光活性層をデポアップ方式にて被着する際に
用いるトレイの開口部の四角に上記四辺形状基板が落下
するのを防止する落下防止片を設け、その落下防止片に
て該基板の四角を被覆して半導体光活性層を被着する際
の、該四角への上記半導体光活性層の被着を防止すると
共に、その落下防止片にて被覆された四辺形状基板の四
角に上記端子部を設けたことを特徴とする太陽電池装置
の製造方法。
1. A solar system in which a plurality of solar cell modules having terminal portions arranged on a quadrilateral substrate are juxtaposed, and the solar cell modules electrically connect the terminal portions arranged at both ends of at least one side close to each other. In the method for manufacturing a battery device, the solar cell module includes a plurality of strip-shaped power generation films arranged from one side of the substrate to another side opposite to the side, and the power generation film is formed on the substrate. Formed on the main surface,
A first electrode film, a semiconductor photoactive layer formed on the main surface by decomposing a raw material gas by using a deposition method, and a second electrode provided so as to face the first electrode film with the active layer interposed therebetween. And a series connection due to the adjoining one of the first electrode films and the other of the second electrode films being overlapped with each other in the adjacent space portion between the power generating films. The first side of the power generation film is provided on both ends of each side.
The electrode film or the second electrode film is formed so as to be continuous with the terminal part of the same polarity, and the square of the opening part of the tray used when the semiconductor photoactive layer is deposited by the deposition method. The semiconductor photoactive layer is provided on the square when a drop prevention piece for preventing the quadrilateral substrate from falling is provided and the square of the substrate is covered with the drop prevention piece to apply the semiconductor photoactive layer. The method for manufacturing a solar cell device, characterized in that the terminal portion is provided in a square of a quadrilateral substrate which is covered with the fall prevention piece while being prevented from being attached.
JP1155118A 1989-06-16 1989-06-16 Method for manufacturing solar cell device Expired - Fee Related JPH0654814B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1155118A JPH0654814B2 (en) 1989-06-16 1989-06-16 Method for manufacturing solar cell device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1155118A JPH0654814B2 (en) 1989-06-16 1989-06-16 Method for manufacturing solar cell device

Publications (2)

Publication Number Publication Date
JPH0284778A JPH0284778A (en) 1990-03-26
JPH0654814B2 true JPH0654814B2 (en) 1994-07-20

Family

ID=15598971

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1155118A Expired - Fee Related JPH0654814B2 (en) 1989-06-16 1989-06-16 Method for manufacturing solar cell device

Country Status (1)

Country Link
JP (1) JPH0654814B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2024662A1 (en) * 1989-09-08 1991-03-09 Robert Oswald Monolithic series and parallel connected photovoltaic module
JP5977540B2 (en) * 2012-03-05 2016-08-24 シャープ株式会社 Solar cell manufacturing method, manufacturing apparatus, and solar cell
JP7287356B2 (en) * 2020-07-03 2023-06-06 株式会社村田製作所 Film formation mask jig and film formation equipment

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5447576A (en) * 1977-09-22 1979-04-14 Hitachi Ltd Plasma cvd apparatus
JPS5667751U (en) * 1979-10-29 1981-06-05
JPS56105627A (en) * 1980-01-28 1981-08-22 Fuji Photo Film Co Ltd Manufacture of amorphous semiconductor
JPS56158486A (en) * 1980-05-12 1981-12-07 Hitachi Ltd High-power solar-light electric power generating device
JPS5948138B2 (en) * 1980-05-28 1984-11-24 三洋電機株式会社 Method for manufacturing amorphous semiconductor film
JPS57211280A (en) * 1981-06-22 1982-12-25 Mitsubishi Electric Corp Assembling structure of solar cell

Also Published As

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