JPH0656936B2 - Programmable gain amplifier - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a programmable gain amplifier for digitally controlling a gain, and more particularly to a programmable pull amplifier capable of obtaining a decibel linear characteristic with a simple circuit configuration, for example, facsimile reception. When applied to the automatic gain control circuit in the circuit, it is possible to effectively prevent the output from varying due to the different attenuation amount in each circuit connection.

[Prior Art] For example, a digital control type variable gain control circuit (hereinafter referred to as a programmable gain amplifier) having a dynamic range of 51 dB and a resolution of 0.2 dB is configured by a one-stage amplification circuit including 256 switches and resistors. However, since the number of parts is very large, 16 stages per stage are generally used.
An amplifier circuit with individual switches and resistors
The number of parts is reduced by dividing into two stages.

However, even with this configuration, the number of components is still large, and it is necessary to devise a circuit.

Therefore, conventionally, there has been a solution to the above-mentioned problems by adopting a circuit system in which the entire transfer function is an approximate expression of logarithm as disclosed in Japanese Patent Laid-Open No. 55-25209. That is, as shown in FIG. 4, with respect to the transfer function V = Y ^U (1) shown by the solid line, the transfer function shown by the dotted line which is approximate to this Is used to realize a circuit having a decibel linear characteristic by varying G, as shown in FIG.

Incidentally, if the combined resistance is R _B within the chain line of the circuit, the transfer function V is However, therefore, And it can be seen that it is equal to equation (2).

The circuit shown in Fig. 5, because it is considered as to vary the predetermined gain control range 2 ⁴ stages, which if used in a subsequent stage of the amplifier circuit, and 16 a switch which have conventionally been required The resistance is 1/4 for the switch and 2 for the resistance.
It can be reduced to 1.

By the way, since the above-mentioned circuit adopts a circuit system in which the entire transfer function is an approximate expression of logarithm as described above, the resistance R
Besides _A , R _B , R _S , and R _F , a resistor R _{I provided} between the input terminal and the inverting input terminal was required.

[Problems to be Solved by the Invention] As described above, in the conventional circuit, the resistor R is provided on the input side of the amplifier.
_{Since I} is required, there is a problem that the circuit is still complicated.

Therefore, an object of the present invention is to solve the above-mentioned problems of the prior art and provide a programmable gain amplifier capable of obtaining a decibel linear characteristic while having a simple circuit configuration that does not require the resistor R _I. Especially.

[Means for Solving Problems] A programmable gain amplifier of the present invention is a variable resistance circuit including an amplifier having a constant gain between input and output terminals, a plurality of resistors, and a plurality of switches for selectively switching the resistors. It is composed of a net.

The programmable gain amplifier configured in this way is
The transfer function between the input and output terminals, that is, between the input and output terminals of the amplifier is set as in the following equation.

Here, R _B is the resistance of the variable resistance network obtained by switching the switch by the digital code signal.

Further, the transfer function change region between the input and output obtained by changing the resistance R _B is a linear region in which the difference between the linear characteristic of the ideal transfer function and the decibel linear characteristic by the logarithmic display is small. Each value in the above formula is set.

Here, the ideal transfer function is, for example, in the case of a 4-bit configuration, the transfer function of an amplifier circuit having a resistance network composed of 16 switches and resistors.

It is possible to make R _f / R _s variable depending on the higher-order digital code signal to expand the transfer function change region.

[Operation] In Fig. 4, if an attempt is made to cover a range (0 to 10 times) in which the change (gain change) of the ideal transfer function V is large, the entire transfer function becomes a logarithmic approximation formula. The circuit method must be adopted, but in the linear range of a small gain change of about 1 to 1.4 times, the difference between the decibel linear characteristic and the linear characteristic is small. However, the gain in the above range can be obtained by the decibel linear approximation by approximating a part thereof by a linear circuit system.

Therefore, by limiting the maximum gain to be obtained from a one-stage circuit to the above range, it is possible to adopt a circuit method that is a linear approximation formula by combining resistors, and that circuit requires a logarithmic approximation circuit method. Resistor R _I (connected between the input terminal and the inverting input terminal of the amplifier) can be removed and the transfer function With such a setting, by linearly varying R _B , the transfer function can be linearly varied, but the logarithmic transfer function can also be linearly varied.

[Embodiment] The embodiment of the present invention will be described below with reference to Figs.

FIG. 1 shows an overall configuration diagram of a programmable gain amplifier having a two-stage configuration in which the programmable gain amplifier of the present invention is applied in a subsequent stage.

The circuit configurations of the former stage and the latter stage are different because the dynamic range of the latter stage is reduced and the decibel linear is approximated by a combination of resistors to reduce the number of parts.

FIG. 2 is a concrete circuit example of FIG. 1, showing a programmable gain amplifier having a dynamic range of 51 dB and a resolution of 0.2 dB. It is characterized by a wide dynamic range and high resolution for each set value.

The input signal is guided to the A / D converter 1 and A / D converted to the CPU.
Make the error calculation in 2, set the required gain, and
U2 outputs AGC control signals b0 to b7 as 8-bit digital code signals to control the analog switches SW0 to SW5 of the programmable gain amplifier 10. As a result, the output level is always constant even if the input level fluctuates.

Table 1 shows the relationship between the 8-bit control signal from the CPU2 and the gain.

It is conceivable that the rear stage 3 of the programmable gain amplifier 10 has 6 bits, but in order to reduce the dynamic range and error, it has a 5-bit configuration, and the front stage 4 has a 3-bit configuration.

In the latter stage 3, the gain between input and output is 0 to 6.2 [dB] at 0.2 dB intervals.
Change between. That is, it is variable in 2 ⁵ = 32 steps.
The gain of the latter stage 3 mainly composed of the amplifier 5 and the variable resistance network 6 can be expressed as follows.

Here, if 20Log ₁₀ G = LG [dB] is set, the equation (1) can be expressed as LG _S = LG _B + LG ₄ [dB].

The gain change G _B corresponding to the lower 4 bits (b3 to b0) in the latter stage is controlled within a range of 0 dB to 3.0 dB = 1 to 1.43 times, and the resistance R _B is made variable. Resistance R _{B
Are the} four resistors R _{B0 to} R that will be connected in parallel with R _Bg.
B3 and 4 switches S to select these resistors
It is a resistance value indicated by the variable resistance network 6 composed of W0 to SW3.

Further, the gain change G ₄ corresponding to the remaining 1 bit (b4) in the subsequent stage is performed by making R _f / R _S variable, and therefore R _f + R _S = R ₁ + R ₂ + R ₃ S
By switching W4, the resistor R ₂ can be _installed on the R _f side (R
_f = R ₂ + R ₃ ), or incorporated on the R _S side (R _S = R ₁
+ R ₂ ).

Needless to say, if both the rear stage 3 and the front stage 4 have a 4-bit configuration, the resistor R ₂ and the switch SW 4 are unnecessary.

The method of calculating the circuit constants for making a decibel linear gain change (0 dB to 3.0 dB) by combining the above four resistors and switches is as follows.

First, Table 2 shows the relationship between the states of bits 3 to 0 necessary for calculating the constant and the gain.

Therefore, Is obtained. Here, when R _A = 2 KΩ and R _{B3 to} R _B0 are calculated for the above state, it is as shown in Table 3.

R _{B3 to} R _B0 and R _Bg obtained here are input to the personal computer as initial values, and all states (00H to FFH)
Is calculated and compared with an ideal value obtained by a 16-resistor switching system consisting of 16 resistors and switches to obtain R _{B3 to} R _B0 close to the ideal value.

The gain characteristic comparing the ideal value and the calculated value is as shown in FIG. The solid line is an ideal value corresponding to a decibel linear line of 0 to 3.0 dB (1 to 1.43 times), which is realized by 16 resistors at 0.2 dB intervals, but it is shown as a mark because it is almost a straight line. As can be seen from the calculated values, a combination of four resistors can be used to approximate sufficiently. Also, the error that essentially occurs due to the approximation is 0.01 [times], 0.1 [dB]
Very small in degree.

The front stage 4 has a rate of expanding the dynamic range of 0 to 6.2 [dB] obtained in the rear stage 3 to 0 to 51 [dB]. That is, the gain setting is changed in 2 ³ = 8 steps.

The gain can be expressed as follows.

The gain change G _F corresponding to the upper 3 bits (b7 to b5) of the preceding stage 4 is performed by making the resistance R _D variable. The resistor R _D includes seven series resistors R _{D1 to} R _D7 (R _D0 = 0k).
Ω), and the selection is made by switching the switch SW5 controlled by the switch control signal obtained by once converting the 3-bit control signal by the decoder 7.

As described above, according to the programmable gain amplifier of the present embodiment, since the linear circuit system in which the dynamic range of the subsequent stage is reduced and the error is suppressed to the minimum in the subsequent stage is adopted, the input resistance R required for the logarithmic circuit system is adopted. _{Since I} is unnecessary and the gain of the latter stage is supplemented in the former stage, a good decibel linear characteristic with a dynamic range of 51 dB and a separability of 0.2 dB can be obtained with a circuit configuration having a small number of parts.

[Effects of the Invention] In summary, according to the present invention, since a part of the ideal transfer function exhibiting a linear change is configured to be approximated by a linear circuit system, the entire ideal transfer function becomes a logarithmic approximation formula. Unlike the conventional circuit configuration, the input resistance R _{I of the} amplifier can be omitted and a decibel linear characteristic can be obtained with a simple circuit configuration.

[Brief description of drawings]

FIG. 1 is an overall configuration diagram of a programmable gain amplifier incorporating a programmable gain amplifier according to an embodiment of the present invention in a subsequent stage, FIG. 2 is a detailed diagram of the programmable gain amplifier shown in FIG. 1, and FIG. FIG. 4 is a gain characteristic diagram showing an error of the gain control circuit in the subsequent stage shown in FIG. 4, and FIG. 4 is a gain characteristic diagram showing an error of a conventional circuit example adopting the logarithmic approximation method.
FIG. 5 is a conventional circuit configuration diagram adopting a logarithmic circuit system. In the figure, 5 is an amplifier, 6 variable resistance network, R _{B0 to} R _B3 and R _Bg are a plurality of resistors, and SW0 to SW3 are switches.

Claims (1)

[Claims] 1. An amplifier and a variable resistance circuit network comprising a plurality of resistors and a plurality of switches for selectively switching the resistors, and the switch between the input and output terminals of the amplifier is switched by a digital code signal. In a programmable gain amplifier whose transfer function is variable, when the resistance of the variable resistance network is R _B , the transfer function is represented by the following equation, Also, the above-mentioned equation is adopted so that the transfer function change region between the input and output by changing the resistance R _B is a linear region in which the difference between the linear characteristic of the ideal transfer function and the decibel linear characteristic by its logarithmic display is small. A programmable gain amplifier characterized by setting each value inside.