JPH065701B2 - Lead frame and method of manufacturing semiconductor device using the same - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a lead frame and a method for manufacturing a semiconductor device using the same.

[Background technology]

A member called a lead frame is used in the manufacture of a resin package type semiconductor device. This lead frame is, for example, “Monthly Semiconductor W” published by Press Journal, Inc.
orld ”May 1984 issue, issued July 15, 1984, P111 to P115, as described in P111 to P115, formed by etching or punching a thin metal plate such as copper or iron-nickel alloy. It has a pattern member that constitutes a lead frame pattern such as a tab for attaching to a chip and a lead for connecting a wire.
In addition, the tabs and the bonding portions of the leads for mounting the chips and wires are designed to improve the reliability of the connection.
Gold, silver, etc. are plated.

By the way, the lead frame is formed by utilizing the conductivity and excellent workability of metal, but on the other hand, the inconvenience due to the metal is inevitable. For example, to give an example, it is difficult to improve the efficiency of work such as characteristic selection. That is, since the lead frame is manufactured from a conductive metal plate, the semiconductor devices formed on the lead frame are in an electrically conductive state with each other, and therefore, must be separated from the lead frame. The electrical characteristics of each semiconductor device cannot be inspected. Therefore, the method of performing the characteristic inspection and the attendant selection work, marking work, and the like on a single semiconductor device is one of the causes that hinder the reduction of the manufacturing cost due to the reduction of the manufacturing process of the semiconductor device. There is.

[Object of the Invention]

An object of the present invention is to provide an inexpensive semiconductor device by providing a lead frame capable of reducing the number of manufacturing steps of the semiconductor device.

Another object of the present invention is to provide a highly integrated semiconductor device.

The above and other objects and novel characteristics of the present invention are
It will be apparent from the description of the present specification and the accompanying drawings.

[Outline of Invention]

The outline of a typical one of the inventions disclosed in the present application will be briefly described as follows.

That is, in the present invention, the lead frame formed of the plurality of pattern members is composed of the plastic base material made of an insulator and the conductor layer partially adhered to the surface of the base material. The semiconductor device formed on each lead frame can be inspected for characteristics without being divided into lead frames. As a result, not only the efficiency of the characteristic inspection work is improved, but also the marking work for displaying the grade such as the quality based on the characteristic inspection result can be performed in the state of the lead frame, which reduces the number of manufacturing steps of the semiconductor device. It is possible to reduce the manufacturing cost of the device. Further, since the lead frame is made of plastic as a base material, the semiconductor device can be easily cut from the lead frame, so that the user can easily separate the semiconductor device. Therefore, the semiconductor device can be shipped while being attached to the lead frame, and the work accompanying shipping can be facilitated.

〔Example〕

1 is a sectional view of a resin package type transistor according to an embodiment of the present invention, FIG. 2 is a plan view of the same, FIG. 3 is a partial sectional view of the same, and FIG. 4 is a manufacturing process of a transistor of the present invention. 5 is a plan view showing a part of a lead frame used for manufacturing the transistor of the present invention, and FIG. 6 is a plan view showing a state of the lead frame similarly subjected to chip bonding and wire bonding. FIG. 7 is a plan view showing a state of the lead frame similarly subjected to the resin molding, and FIG. 8 is a plan view showing a state of the lead frame similarly subjected to the characteristic inspection and marking.

As shown in FIGS. 1 and 2, the transistor of this embodiment comprises three leads 1 extending in parallel and a package 2 made of a resin covering the leads 1 on the same end side. . A wide tab 3 is formed at an inner end of the central lead 1 extending into the package 2, and a chip 4 made of a transistor element is formed on the main surface thereof with a silver paste or Au.
It is fixed via a bonding material 5 made of —Si eutectic or the like. Further, the inner ends of the leads 1 on both sides extending into the package 2 are also widened to form the pads 6 for wire bonding. The pad 6 and an electrode (not shown) of the chip 4 are connected by a conductive wire 7. The widening of the portion of the lead 1 located in the package 2 facilitates chip bonding and wire bonding, and the lead 1 is packaged in the package 2.
It will not come off, and the adhesion between the lead 1 and the package 2 will not be damaged easily.

On the other hand, each of the leads 1 is composed of a plastic base material 8 and a conductor layer 9 adhered to the surface of the base material 8. The plastic forming the base material 8 is not particularly limited in the kind of resin, but 300 to 350 added during chip bonding, wire bonding and molding.
Those that are not deformed or deteriorated at a temperature of about ℃ and have high mechanical strength are selected. The surface of the transistor of this embodiment except the outer end surface of the lead 1 protruding from the package 2 is covered with a conductor layer 9 (see FIGS. 1 and 2).

Next, a method of manufacturing a transistor will be described with reference to FIGS.

When manufacturing a transistor, first lead frame 1
0 is prepared. This lead frame 10 is several hundred μ
It is formed by patterning a plastic film having a thickness of m to several mm as shown in FIG. The patterning is performed by punching with a press. The lead frame 10 includes a first frame 11a and a second frame 11b extending in parallel with each other, and a pair of these frames 11a and 11b.
It has a tie bar 12 connecting a and 11b. Further, three leads 1 extend from the inside of one frame 11a in parallel with the tie bar 12. In these leads 1, the lead 1 at the center has a wide tab 3 at its tip (inner end), and the leads 1 on both sides have a wide pad 6 at its tip (inner end). Further, the leads 1 and the leads 1 and the tie bars 12 are connected by dams 13. Further, guide holes 14 are provided in the first and second frames 11a and 11b. The guide hole 14 is used as a guide for automatic conveyance during assembly of the lead frame 10 or a guide for positioning.

Next, the lead frame 10 is plated with a conductor layer 9 on a necessary surface portion of the base material 8. That is, the portions that need to be plated are the areas where chip bonding and wire bonding are performed, and the areas that project from the package 2 and that solder is attached during mounting. The plating is a dip method and is applied with a thickness of several thousand Å to several μm. The conductor layer 9 is
Although not particularly limited, for example, when the lower layer is nickel (N
In i), the upper layer is copper (Cu) or the like. In FIGS. 5 to 8, the plated areas are shown by dots.

Next, in such a lead frame 10, as shown in FIG. 6, a chip 4 is bonded onto the tab 3, and the electrodes (not shown) of the chip 4 and the inner ends of the leads 1 on both sides are wired. Connected at 7.

Thereafter, the lead frame 10 is resin-molded, and as shown in FIG. 7, the tip portion of the lead 1 is covered with the package 2 made of an insulating resin.

Next, in the lead frame 10, as shown in FIG. 8, the dams 13 that connect the leads 1 and the leads 1 and the tie bars 12 are cut and removed. In this state,
Each lead 1 is physically connected by the first frame 11a on which the package 2 and the conductor layer 9 are not provided. The package 2 is an insulator, and the lead 1
The lead 13 is electrically independent from each other because the dam 13 connecting the leads does not have the conductor layer 9 on its surface. Therefore, in this state, it is possible to inspect the electrical characteristics of each molded transistor 15 even when it is connected to the lead frame 10. Therefore, the characteristic inspection is executed in this state, and the grade (grade) display based on the characteristic inspection result is performed in the state of the lead frame.

As a result, the mark 16 is printed on the main surface of the package 2. In the embodiment, the grade is displayed by the letters 2A and 2B.

Even if such a transistor 15 is shipped attached to the lead frame 10, since the main constituent material of the lead 1 is plastic, the lead 1 can be framed by a cutting machine or a sandwiching mechanism having a simple mechanism. Since it can be cut and separated from 11a and 11b, even a user can use it without any trouble.

On the other hand, when the transistor 15 is shipped as a single product, if the lead 1 is cut near the frames 11a and 11b, the transistor 15 as shown in FIG.
Therefore, the transistor 15 can be shipped as a single item.

〔effect〕

(1) In the transistor 15 of the present invention, since the main constituent materials of the package 2 and the lead 1 which are sealing materials are both plastic, thermal stress is less likely to occur between them,
The close contact state between the lead 1 and the package 2 can always be maintained in good condition, and high moisture resistance can be maintained.

(2) From the above (1), the transistor 15 of the present invention has the lead 1
Since the heat stress of the package 2 is small, the wire 7 is not broken due to the heat stress, and the reliability is improved.

(3) In the transistor 15 of the present invention, the main constituent material of the lead 1 is formed of plastic which is cheaper than metal, and the conductor layer 9 on the surface of the lead 1 is formed by a plating method which is low in manufacturing cost. Therefore, the effect that the manufacturing cost becomes low can be obtained.

(4) Since the lead frame 10 of the present invention is made of plastic as the main constituent material, the manufacturing cost thereof is low, and the fluctuation of the material cost due to the market fluctuation such as metal is small, so that the manufacturing cost is stable. The effect is obtained.

(5) In the lead frame 10 of the present invention, when the dam 13 which is one of the pattern members is cut and removed, the leads 1 are electrically insulated from each other.
It is possible to obtain the effect that the electrical characteristics can be inspected while the plurality of transistors 15 manufactured to 0 are supported by the lead frame 10.

(6) From the above (5), according to the present invention, the marking operation based on the characteristic inspection can be performed in the state of the lead frame 10, so that the effect of reducing the number of manufacturing steps of the transistor can be obtained.

(7) From the above (5) and (6), according to the present invention, even if the transistors 15 are shipped while the transistors 15 are supported by the lead frame 10, the main constituent material of the lead 1 is plastic. Therefore, since the lead 1 can be cut and separated from the frame 11 by a cutting machine having a simple mechanism, the effect that even the user can use the transistor 15 without any trouble is obtained.

(8) When the transistor 15 is manufactured by using the lead frame 10 of the present invention from the above (5) to (7), the workability is always handled in each process and in the process in the state of the lead frame 10. It is possible to obtain the effect that the number of manufacturing steps is improved and the number of manufacturing steps can be reduced.

(9) The lead frame 10 of the present invention comprises a plastic base material 8 and a conductor layer 9 partially provided on the surface of the base material 8.
Since it is formed by, its weight is light. Therefore, the lead frame 10 can be easily transported and the transportation efficiency can be improved. Therefore, the lead frame 10
The effect is that the transportation cost can be reduced.

(10) The lead frame 10 of the present invention is always stored in the plastic base material 8 as it is, and the conductor layer 9 is plated on the surface of the base material 8 at the time of use.
Since no deterioration such as oxidization does not occur, it is more effective than the conventional metal lead frame in which the surface is oxidized.

(11) Due to the above (1) to (10), according to the present invention, a transistor can be manufactured using the inexpensive lead frame 10 with a small number of steps, so that a synergistic effect of providing an inexpensive transistor can be obtained. To be

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments and various modifications can be made without departing from the scope of the invention. For example, if the lead frame 10 is patterned after plating a predetermined portion of the base material 8, the conductor layers 9 on the front and back surfaces of the base material 8 will be interconnected as shown in FIGS. 9 and 11. It becomes electrically independent. Therefore, the chips 4 are fixed to the main surface side and the back surface side of the lead frame 10, respectively, and the electrodes of the chip 4 and the corresponding inner ends of the leads 1 are connected by the wires 7, so that the lead frame 10 is provided on the front and back sides. If independent semiconductor devices are manufactured, higher integration can be achieved. In this case, when the lead 1 is inserted into the insertion hole of the wiring board at the time of mounting the product semiconductor device,
Since the conductor layer portion forming the hole of the wiring board brings the conductor layers 9 on the front and back sides of the lead 1 into a conductive state,
In a portion where it is difficult to establish a conductive state, the wire 7 may be connected to only one of the front and back surfaces of the lead 1. In addition, when it is necessary to electrically connect specific leads 1 of the semiconductor device on the front and back sides of the lead 1,
As shown in FIG. 0, if the wires 7 are placed on both the front and back surfaces of the lead 1, the leads 1 are brought into conduction by mounting.
In FIG. 10, a lead 1 having a hatched outer end of the lead 1 shows a lead 1 having a wire 7 connected to the back surface thereof. Further, in this case, when the lead frame 10 is standardized, the wires 7 are not always connected to all the leads 1. That is, it is only necessary to wire bond the required leads 1.

[Field of application]

In the above description, the case where the invention made by the present inventor is mainly applied to the manufacturing technology of a transistor, which is the field of application of the background, has been described, but the invention is not limited thereto and, for example, a semiconductor device such as an IC. Can be applied to the manufacturing technology of.

INDUSTRIAL APPLICABILITY The present invention can be applied to at least a manufacturing technique of electronic parts and the like.

[Brief description of drawings]

1 is a sectional view of a resin package type transistor according to an embodiment of the present invention, FIG. 2 is a plan view of the same, FIG. 3 is a partial sectional view of the same, and FIG. 4 is a manufacturing process of a transistor of the present invention. 5 is a plan view showing a part of a lead frame used for manufacturing the transistor of the present invention, FIG. 6 is a plan view showing a state of the lead frame similarly subjected to chip bonding and wire bonding, FIG. FIG. 7 is a plan view showing a state of a lead frame similarly subjected to resin molding, FIG. 8 is a plan view showing a state of a lead frame similarly subjected to characteristic inspection and marking, and FIG. 9 is a plan view of the present invention. 10 is a sectional view of a semiconductor device according to another embodiment, FIG. 10 is a plan view of the same conceptual semiconductor device, and FIG. 11 is a sectional view of a lead 1. 1 ... Lead, 2 ... Package, 3 ... Tab,
4 ... Chip, 5 ... Bonding material, 6 ... Pad, 7
... Wire, 8 ... Base material, 9 ... Conductor layer, 10 ...
..Lead frames, 11a, 11b ... Frames, 12 ...
..Tie bars, 13 ... dams, 14 ... guide holes,
15 ... Transistor, 16 ... Mark.

 ─────────────────────────────────────────────────── ─── Continuation of front page (56) Reference JP-A-57-88752 (JP, A) JP-A-59-148354 (JP, A) JP-A-51-40869 (JP, A) JP-A-55- 110060 (JP, A)

Claims (4)

[Claims] 1. A first frame and a second frame extending in parallel to each other, a tie bar connecting the first frame and the second frame, and a second frame integrally formed with the first frame. A lead frame having a plurality of leads extending toward each other, the lead frame having a base material made of insulating plastic, and the base material of the second frame, the tie bar, and the lead. A conductor layer is formed by the dip method on the first frame, and the conductor layers of the lead can be electrically independent from each other in the portion of the first frame where the conductor layer is not adhered. Characteristic lead frame. 2. A first frame and a second frame extending in parallel with each other, a tie bar connecting the first frame and the second frame extending in the lateral direction, and a tie bar integrally formed with the first frame. A lead frame having a plurality of leads extending toward the second frame and a dam extending in parallel to the frame and connecting the leads to each other and the leads and the tie bar is formed of a base material of an insulating plastic. A step of depositing a conductor layer on the base material of the second frame, the tie bar, the lead and the tab by leaving the first frame by a dip method, and a chip on the lead frame. Fixing step to connect the chip and the lead with a wire, a molding step of covering the tip of the lead and the chip with a package, and removing the dam portion from the lead frame. A method of manufacturing a semiconductor device, comprising: a dam cutting step for performing a dam cutting; and a characteristic inspection step for conducting an electrical characteristic inspection of the chip in a state where the chip is attached to the lead frame. 3. A semiconductor device according to claim 2, wherein the chips are fixed on both front and back surfaces of the lead frame, and the electrodes of the chips and the leads corresponding thereto are connected by wires. Production method. 4. A method of manufacturing a semiconductor device according to claim 3, wherein the wire is connected to only one of the front and the back of the lead.