JPH065786B2 - Semiconductor device - Google Patents

Description

The present invention relates to a reverse bias operation semiconductor device, and
In particular, the present invention relates to a structure of a photodiode (hereinafter referred to as PD) or an avalanche photodiode (hereinafter referred to as APD) having high speed, high sensitivity, low noise and high reliability as a photodetector.

(Prior art and its problems) Among the semiconductor photodetectors, PD or APD is important as a photodetector in an optical communication system with high speed and high sensitivity, and its development is actively promoted along with the plateau semiconductor laser. Has been.

As for the oscillation wavelength of semiconductor lasers, a wide wavelength range from the visible region to the infrared region is being obtained.
Practical application of PDs or APDs over a wide wavelength range is expected by using -V compound semiconductors. In particular, a PD or APD having a low dark current and a small excess noise cannot cover a wide oscillation wavelength range of a semiconductor laser only by relying on Si or Ge. Here is the reason why the III-V compound semiconductor APD is required. However, in compound semiconductor materials, crystal growth, or development of process technology and surface stabilization technology is immature, and it is difficult to perform stable avalanche operation by applying high reverse bias.

Under these circumstances, an APD structure has been proposed that is capable of performing a high reverse bias operation with a low noise.

The first is the specification of Japanese Patent Application No. 53-87850 or Japanese Patent Laid-Open No.
As described in the specification of 3-87358, it is due to a hetero kid having a window for light transmission formed on a light absorption layer, and the second is a multiplication region which is at least separated from the light absorption layer. It was proposed in Japanese Patent Application No. 54-39169.

FIG. 1 is a sectional view of the structure shown in the "semiconductor device" of Japanese Patent Application No. 54-39169, which is an example manufactured using an InP-InGaAsP-based material. First n ⁺ on the -InP base 11 of several μm by liquid phase epitaxial (LPE) method, the thickness of the n ⁺ InP
A layer 12 is formed, and then a film thickness is 5 μm and an impurity concentration is 2 × 10.
¹⁶ cm ^-3 n-type In _0.79 Ga _0.21 As _0.47 Po _0.53 layer 13 (below
Abbreviated as InGaAsP. ) Further, the impurity concentration is 1 × 10 ¹⁶ c
The m ₋₃ n-type Inp layer 14 is epitaxially grown. Then Si
By attaching a selective diffusion mask 15 such as ₃ N ₄ or SiO ₂ , Cd diffusion is performed and a P-type region 16 and a pn junction surface 17 are obtained. Further, the insulating Si ₃ N ₄ or SiO ₂ film 151 is formed again, the electrode lead-out window is patterned, and then the p-type electrode 19 is formed. Further, the n-type electrode 20 is formed on the back surface of the Inp substrate 11. Reference numeral 21 indicates a lead wire.

The structural feature of the APD manufactured in this way is the pn junction 17
Exists in the Inp layer 14 and is located such that the depletion layer spreads in the InGaAsP layer 13 only when the reverse bias is applied.

It is described in Japanese Patent Application No. 54-39169 that the APD having excellent breakdown characteristics can be obtained by doing so. In summary, Inp has a larger forbidden band width than InGaAsP and the periphery of the pn junction 17. Of the depletion layer having a curvature at the time of applying a reverse bias to the Inp
This occurs in the layer 14 to increase the breakdown voltage, while the InGaAs is removed in the portion excluding the peripheral portion of the pn junction 17.
The reason is that the depletion layer reaches P13 and a breakdown of a low voltage occurs as the band gap is narrow, that is, the guard ring effect is obtained by the structure of FIG.

However, the manufacturing yield of the APD having the structure shown in FIG. 1 is extremely poor. This is because the hetero interface 1 between the pn junction surface 17, the Inp layer 14 and the InGaAsP layer 13 shown by d in FIG.
This is because the breakdown characteristic greatly depends on the distance of 8, and d must be about 0.8 μm to about 0.4 μm in order to obtain a high multiplication factor of more than 10 ³ times during APD operation. This means that when d is 0.8 μm or more, breakdown occurs in the peripheral portion of the pn junction surface 17 prior to the central portion, and when d is 0.3 μm or less, InGaA also occurs in the peripheral portion.
This is because the depletion layer significantly spreads in the sP layer 13 and the guard ring effect cannot be provided. Therefore, in order for this APD to exhibit excellent characteristics, it is extremely strongly required to control the depth of the pn junction.

(Object of the Invention) An object of the present invention is to provide a structure of a PD and an APD which can achieve a very stable operation and can significantly improve the manufacturing yield. It is shown below that the control of the pn junction depth is not important.

According to the present invention, the effective forbidden band width is larger than the forbidden band width of the first semiconductor layer and has the same conductivity as that of the first semiconductor layer at a desired position on the first semiconductor layer. A semiconductor superlattice layer having a shape is provided, and the semiconductor superlattice layer has a composition almost the same as that of the superlattice layer, and the band gap is larger than the effective band gap of the superlattice layer. A mixed crystal layer is provided, and a region having a conductivity type opposite to that of the first semiconductor layer and the semiconductor superlattice layer has a depth that does not reach an interface between the first semiconductor layer and the superlattice layer. A semiconductor device is obtained in which the pn junction including the lattice layer is formed so as to terminate at the surface of the surrounding mixed crystal layer.

(Detailed Description of Configuration) Next, the present invention will be described based on an embodiment. FIG. 2 is a structural sectional view of the APD showing the basic structure of the present invention.

On the n ⁺ GaAs substrate 221, an n ⁺ GaAs layer 222, an n ^{− type} GaAs layer 223, and an n ^{− type} GaAs / AlAs superlattice layer 224 are formed. The GaAs / AlAs superlattice layer 224 in the embodiment is composed of 900 layers in which GaAs layers 20Å and AlAs 13Å are alternately laminated, and the total layer thickness is about 1.5 μm.

Next, a SiO ₂ or Si ₃ N ₄ film or the like is applied to the GaAS / AlAs superlattice layer 22.
The surface of No. 4 was formed at a low temperature of about 300 ° C. by using the plasma CVD method. After that, an argon laser beam focused on a spot diameter of 5 μm was scanned over the entire peripheral region excluding the 200 μm-diameter island region in an alternate pattern at a pitch of 500 μm in the wafer surface. The output of the argon laser is 4W,
The interval between scanning lines is 5 μm, and a programmable automatic scanning mechanism is used for scanning. Next, the above-mentioned SiO ₂ film or Si ₃ N ₄
A photoresist is applied on the film, and a diffusion window having a diameter of 250 μm is formed so as to concentrically include the island-shaped region having a diameter of 200 μm. Furthermore, GaAs: Zn pseudo-binary diffusion from the 250 μm diffusion window (Proceedings of the 25th Joint Lecture on Applied Physics 2
7a-S-9, P419, 1978), Zn was diffused from the surface to a depth of 1 μm at 530 ° C. to obtain a p region 225.
By the way, in the above-mentioned argon laser scanning part, the superlattice structure is changed to the mixed crystal part 2241, which means that GaAs / AlAs
The photoluminescence peak wavelength of the superlattice layer 224 is 70
It was confirmed that it was 6500Å in the mixed crystal part 2241 while it was 00Å. The exposed portion 227 to the surface of the pn junction 226 is therefore in the mixed crystal portion 2241 and has a wider forbidden band width than the effective forbidden band width of the island-shaped superlattice layer 2242 which is a superlattice layer. It terminates in section 2241.

Therefore, now, the mixed crystal portion 2241, the island-shaped superlattice layer 224, and n ⁻
The forbidden band width changes from large to small in the order of the GaAs layer 223, and the pn junction has an intermediate forbidden band width inside the crystal wafer. Will have a structure formed in the large mixed crystal part 2241. The electron concentration of the n ^- GaAs / AlAs superlattice layer 224 is set to 10
In the case of cm ^-3 , p formed in the island superlattice layer 2242
The breakdown voltage of the pn junction terminated on the surface of the mixed crystal portion 2241 could be considered to be 105 V, while the reverse breakdown voltage of the -n junction was 90 V. Therefore mixed crystal part
The 2241 has given a very stable guard ring structure, and an element having a sharp reverse breakdown characteristic and a stable avalanche operation supported by it can be obtained.

The present invention has been described below with reference to the embodiments of the semiconductor device made of a GaAs / AlAs system material. However, the present invention is not effective in improving the breakdown characteristics for all semiconductor devices having a heterojunction that operates in reverse bias. Obviously, it can also be applied to compound semiconductor crystals such as InP-InGaAs.

Further, in the above-mentioned invention, it is clear that the same effect can be obtained by converting p at the p region and n at the n region.

Although laser annealing is used in the above-mentioned embodiment, electron beam annealing may be used, or ion beams of He, H, O, etc., neutral particles such as atoms (for example, first ions are generated and neutralized by giving electric charges on the way). It may be irradiated with particles) or neutrons.

Further, in the process of mixing crystals, due to fluctuations in laser output, etc., the superlattice layer 224 does not mix so as to reach the lower n ⁻ GaAs layer 223, or conversely, part of the n ^{− −} GaAs layer 223 is mixed. However, the object of the present invention can still be achieved.

(Effects of the Invention) As described above, according to the present invention, a uniform breakdown occurs over the entire pn junction surface, a dark current is small, a reverse direction characteristic and a multiplication characteristic are excellent. A structure that can achieve a significant improvement in This is based on the guard ring effect due to the termination of the exposed surface of the pn junction in the layer with the widest forbidden band. Moreover, as the manufacturing process, the beam annealing process may be added as described in the detailed description of the configuration, and since there is no large change in the process, the manufacturing reproducibility is excellent.

[Brief description of drawings]

1 and 2 are sectional views showing the structures of a conventional APD and an APD of the present invention, respectively. In each figure, 11 is n ⁺ -type Inp substrate 12 is n ⁺ type InP layer 13 is the n ^- type InGaAsP layer 14 is the n ^- type InP layer 15 is SiO ₂ or Si ₃ N ₄ film 151 is Si ₃ N ₄ or SiO ₂ film 16 is p-type region 17 is pn junction 18 is interface between InP and InGaAsP layer 19 is p-type electrode 20 is n-type electrode 21 is lead wire 221 is n ⁺ GaAs substrate 222 is n ⁺ GaAs layer 223 is n ^- GaAs layer 224 is n ^- GaAs / AlAs superlattice layer 2241 is disordering portion 2242 of the superlattice layer island superlattice layer 225 is Zn diffusion p-type region 226 is p-n junction 227 p-n junction surface Represents an exposed area.

Claims (1)

[Claims] 1. A semiconductor superconductor having an effective forbidden band width larger than a forbidden band width of the first semiconductor layer and having the same conductivity type as that of the first semiconductor layer at a desired position on the first semiconductor layer. A lattice layer is provided, and a mixed crystal layer having the same composition as that of the superlattice layer and having a forbidden band width larger than the effective forbidden band width of the superlattice layer is provided around the semiconductor superlattice layer. First,
Of the semiconductor layer and the semiconductor superlattice layer having a conductivity type opposite to that of the semiconductor layer and the superlattice layer have a depth not reaching the interface between the first semiconductor layer and the superlattice layer. The semiconductor device is formed so as to terminate at the surface of the mixed crystal layer.