JPH0658489B2 - camera - Google Patents

Description

The present invention relates to a camera that prohibits rewinding during exposure.

Conventionally, the hoisting and rewinding of the camera have been manually performed, but recently, many electric hoists have been used to hoist and rewind the camera. However, as the rewinding is automated, the rewinding operation can now be done in one touch.
I accidentally performed a rewind operation during shooting, and film rewind was performed while the shutter was open, and the film that was already photographed was exposed to meaninglessness, and it was released during rewind. There was an accident in which the film was exposed after the operation.

In the case of such an accident, when manually hoisting and rewinding the camera, two operations had to be performed at the same time, but there was no such thing. However, with the automation of the camera, the operation can be done in one touch. It is something that occurs in the.

In order to solve this problem, Japanese Patent Laid-Open No. 55-120021 proposes a release prohibition during rewinding. However, these prohibit the release during rewinding, and only rewind during release. The problem with was left unsolved.

The present invention has been made in view of the above circumstances, and in a camera in which a motor rewinds a film, even if a rewind switch is operated by operating an operating member, the rewind drive is prohibited while the film is being exposed. It is characterized by having done.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows the overall structure of the electric drive camera.
Is a camera body, and 2 is a release button, and the switch SW ₂ is turned on by pressing it down. 3 is a take-up spool, 4 is a sprocket, 5 is a film, 6 is an aperture, 7 is a film cartridge, and it has an engaging portion 7a with a rewinding member.
A winding connection member 8 is connected to a winding mechanism (not shown). Reference numeral 9 is a winding gear train, and 10 is a clutch mechanism, which transmits the driving force to the winding side by the forward rotation of the motor M and transmits the driving force to the rewinding side by the reverse rotation. Reference numeral 11 is a rewinding operation lever.
Reference numeral 12 denotes a cam that lifts a rewind shaft described later by operating the rewind operation lever 11, and the rewind switch SWR is turned on by the movement of the cam 12.

A rewinding coupler 13 engages with the engaging portion 7a to rewind. A rewinding shaft 14 is inserted into the helical gear 16 so as to be vertically movable, and has a claw portion 14a. 1
Numeral 5 is a worm gear which meshes with the helical gear 16, and the helical gear 16 integrally has a claw portion 16a.
The driving force of the motor is transmitted to the rewinding coupler 13 by engaging with 4a. Reference numeral 17 is a rewinding gear train. M is the motor and CL ₁ is an electromagnetic clutch that controls the transmission of the output of the motor M. Mg is a release magnet, and 18 is a mode dial, which is linked with a frame speed switching switch SWM (not shown). 1
Reference numeral 9 is a spring for urging the rewinding shaft 14 downward.

FIG. 2 shows the control circuit of the electric drive camera shown in FIG. 1. SW ₂ , SWR are the switches shown in FIG. 1, and Mg, M, CL ₁ are the release shown in FIG. ₁ , respectively. These are magnets, motors and electromagnetic clutches.

DF _{0 to} DF ₂ are D-type flip flops. The flip-flops DF _{0 to} DF ₂ are connected to the input terminal D of respective switches SW ₂ , SW ₅ , SW.
The connection point between R and the resistors R ₃ , R ₄ , and R ₅ is connected. A _{0 to} A
₇ is an AND gate, and O _{0 to} O ₄ are OR gates.

The output at the output of the flip-flop DF ₀ is AND gate A.
_Entered in ₀ . The output of the output terminal Q of the flip-flop DF ₁ is input to the AND gate A ₁ and the output of the output terminal is input to the AND gate A ₃ . Flip Flop DF ₂
The output of the output terminal Q is input to the AND gate A ₇ , and the output of the output terminal is input to the AND gates A ₂ , A ₅ , and A ₆ . FF ₀ , FF ₁ and FF ₂ are SR type flip flops, and DF ₃ is a D type flip flop. The output of the AND gate A ₀ is input to the set end S of the flip-flop FF ₀ . The outputs of the AND gates A ₁ and A ₂ are input to the reset end R of the flip-flop FF ₀ via the OR gate O ₀ , and the AND gate A 1
The output of ₂ is inputted to the OR gate O _1, O _2. And gate
The output of A ₃ is input to the set end S of the flip-flop FF ₁ . The outputs of the AND gates A ₄ and A ₅ are applied to the reset end R of the flip-flop FF ₁ via the OR gate O ₁ , and the outputs of the AND gates A ₅ and A ₆ are set via the OR gate O ₂ to the set end S of the flip-flop FF ₂ . Added to Andgate A
The output of ₇ is applied to the reset end R of flip-flop FF ₂ .

DEC is a decoder, and flip-flops FF ₀ , FF ₁ and FF ₂ are provided at the input terminals A, B and C of the decoder DEC, respectively.
The output of the output terminal Q is added. Flip Flop FF ₀ ,
The outputs of FF ₁ and FF ₂ are applied to the input terminal D of the flip-flop DF ₃ via the OR gate O ₃ . This flip flop D
The output of the output terminal Q of F ₃ is applied to the input terminal St of the decoder DEC and the CL terminal of the counter COU. Decoder DEC output
CC ₀ is applied to AND gates A ₀ , A ₆ , and output CC ₁ is applied to AND gate A ₃ and via resistor R ₁₅ to the base of transistor T ₀ . This transistor
A resistor R _{6 and a} release magnet Mg are connected in series to T ₀ . D ₁ is a diode connected in parallel with the magnet Mg, and C ₂ is a capacitor connected in parallel with the series circuit of the magnet Mg and the transistor T ₀ . Decoder DE
The output CC ₂ of C is applied to the AND gates A ₁ and A _2, and is also applied to the base of the transistor T ₂ via the OR gate O ₄ and the resistor R ₉ . The transistor T ₂ has resistors R ₇ and R ₈ connected in series, and the base of the transistor T ₁ in which the electromagnetic clutch CL ₁ is connected in series is connected to the connection point of the resistors R ₇ and R ₈ . The output CC _{2 of the} decoder DEC is connected to the base of the transistor T ₃ via the resistor R ₁₂ , and the resistors R ₁₀ and R ₁₁ are connected in series to the transistor T ₃ . The base of the transistor T ₄ is connected to the connection point of the resistors R ₁₀ and R ₁₁ , and the collector is connected to the resistor R ₁₃ . T ₅ and T ₆ are resistance
Transistors connected in series with R ₁₄ , the bases of these transistors T ₅ , T ₆ are connected to the collector of transistor T ₄ . A motor M is connected between the connection point of these transistors T ₅ and T ₆ and the switching switch SWR _{1 in} which the switch SWR is interlocked. T ₇ is a transistor.

The output CC _{3 of the} decoder DEC is applied to AND gates A ₄ and A ₅ , and the output CC ₄ is AND gate A _{7 and} OR gate O ₄
Added to. SWM is the mode selector 1 shown in Fig. 1.
A switching switch that can be switched by 8. This switching switch SWM has fixed contacts HML. These fixed contacts HM
Each L. is connected to a counter COU. The movable contact of this switch SWM is connected to the input end of the AND gate A ₄ . The power-up clear circuit is composed of a capacitor C _{0 in} which a diode D ₀ is connected in parallel, a resistor R ₀ and an inverter N ₀ connected to the connection point, and is the output of this power-up clear circuit (hereinafter referred to as PUC circuit). Inverter N ₀
Is input to the CL terminals of the flip-flops DF _{0 to} DF ₃ and FF _{0 to} FF ₂ . R _{1 and} R ₂ are resistors connected in parallel, and an inverter N ₂ is connected between them.
A capacitor C ₁ is connected in parallel to the resistor R ₁ , and an inverter N ₁ is connected between them. These resistors R ₁ ,
An oscillator circuit is formed by R ₂ , capacitor C ₁ , and inverters N ₁ , N ₂ . The output of this oscillator is flip-flop DF ₀
To DF ₃ , FF _{0 to} FF ₂ CK terminals and counters.

Next, the operation of the above configuration will be described with reference to FIG.

When a power switch (not shown) is turned on, a signal is output from the PUC circuit and applied to each flip-flop, each flip-flop is set to an initial value, and a basic clock is applied to each flip-flop and the CK terminal of the counter by the oscillator circuit. . Now, according to the PUC signal, the Q outputs of the flip-flops FF _{0 to} FF ₂ are "0", and the decoder DE
CC ₀ is selected as the output of C. Therefore, flip-flop FF
_Since each SR terminal of _{0 to} FF ₂ is “0”, the output of CC ₀ is maintained. When the release switch SW ₂ is turned on, the output at the output end of the flip-flop DF ₀ becomes "1" and the output of the AND gate A ₀ becomes "1". Therefore, the input terminals A, B and C of the decoder DEC become 1, 0 and 0, respectively, and the CC ₁ output is selected. This decoder D
The transistor T ₀ is turned on by the CC ₁ output of the EC, the release magnet Mg is driven, and the release is started.

After the completion of the traveling of the shutter, the hoisting switch SW ₅ is turned on, the output of the flip-flop DF ₁ becomes “1”, and the output of the AND gate A ₃ becomes “1”. Therefore, the input terminals A, B, C of the decoder DEC are 1, 1, 0, respectively, and CC ₂ is output from the decoder DEC. Decoder DE
CC ₂ output from C turns on the transistor T ₃ to rotate the winding motor M, and turns on the transistor T ₂ to activate the electromagnetic clutch CL ₁ . As a result, film winding is started. When film winding is completed, switch SW ₅ is turned off, so the Q output of flip-flop DF ₁ changes from “0” to “1”.
Change to. As a result, the output of the AND gate A ₁ becomes "1" and is input through the OR gate O ₀ , so that the inputs A, B, C of the DEC become 0, 1, 0, respectively, and the decoder DEC
CC ₃ output is selected. If the piece speed switching switch SWM is tilted to the H side on the high speed side, the output from the AND gate A ₄ becomes “1” because it is output immediately from the counter COU, and the reset end of the flip-flop FF ₁ via the OR gate O _1. Added to R. Therefore, the Q output of the flip-flop FF ₁ becomes "0", and the inputs A, B, C of the decoder DEC become 0, 0, 0, respectively. This causes the decoder DEC to be CC _0.
The output is selected and returns to the initial state. If switch SW ₂ is still on, the above operation is repeated.

Next, a case where the rewind switch is turned on during release will be described.

Now, the release switch SW ₂ is turned on, the magnet Mg is driven by the CC ₁ output from the decoder DEC, and the release is started. If the rewinding switch SWR is turned on at this time, the interlocking switch SWR ₁ is switched to the fixed contact RW side, the motor M is connected to the power supply, and the transistors T ₆ , T
Since the motor ₇ is turned on, the motor M is driven. However, when the switch SWR is turned on, the output end Q of the flip-flop DF ₂
Be varied with the output of "0" to "1", the output of the AND gate A _2, A _5, A ₆ is a state of so remains CC ₁ output is selected from "0" to the decoder DEC. Therefore, electromagnetic clutch
No rewind operation is performed because CL ₁ is not driven.

Then, after the exposure is completed, when the switch SW ₅ is turned on and the CC ₂ output is selected from the decoder DEC, the output of the AND gate A ₅ becomes “1” and the inputs A, B and C of the decoder DEC become 0 respectively. , 0, 1 and the decoder DEC selects the CC ₄ output to drive the clutch CL _{1 and} start rewinding.

If the switch SWR is turned on when the CC ₀ output or the CC ₃ output is selected from the decoder DEC, the outputs of the AND gates A ₆ and A ₂ are set to "1", and the CC ₄ output is selected. Rewinding is started.

Even if the release operation is performed during rewinding, the decoder DEC outputs CC ₄ during rewinding, and the output of the AND gate A ₀ is "1" even if the release switch SW ₂ is closed.
I cannot accept it. Then, when the rewinding is completed, the rewinding switch SWR is turned off, and the output of the decoder DEC returns to CC ₀ , the release becomes possible.

Although the camera and the electric drive device are integrated in the above embodiments, they may be provided separately.

As described above in detail, according to the present invention, rewinding by the motor is prohibited even if the operation member for rewinding is operated during exposure, so that it does not affect the shooting scene during exposure. In addition, even if the operation member for rewinding is mistakenly operated during slow shutter seconds or bulb exposure, it is possible to prevent re-exposure of not only that frame but also the frame that has been shot so far. It was

Further, as in the embodiment, the output of the motor is configured to be switched to the film rewinding transmission system by operating the clutch, and rewinding is prohibited during the exposure without operating the clutch. I was able to get the movement.

[Brief description of drawings]

1 is a block diagram of an electric drive camera showing an embodiment of the present invention, FIG. 2 is a control circuit diagram of the electric drive camera shown in FIG. 1, and FIG. 3 is a flow chart of FIG. 1 ... Camera body, 3 ... Take-up spool, 4 ... Sprocket, 7 ... Film cartridge, 11 ... Rewind operation lever, 13 ... Rewind coupler, CL ... Electromagnetic clutch, M ... Motor, SW ₂ ...... Release switch, SWR ……
Rewind switch, SW ₅ …… switch, DF _{0 to} DF ₃ …… flip flop, FF _{0 to} FF ₂ …… flip flop, DEC…
… Decoder, COU …… Counter, A _{0 to} A ₇ …… AND gate, O _{0 to} O ₃ …… or gate

Front page continued (72) Inventor Masahisa Fujino 770 Shimonoge, Takatsu-ku, Kawasaki-shi, Kanagawa Canon Inc. Tamagawa Plant (56) References

Claims (1)

[Claims] 1. In a camera for rewinding a film by a motor, a rewind switch for outputting a first signal by operating an operating member, and a rewind switch for outputting the first signal, Rewinding means for rewinding and driving the film by using the motor as a drive source, and detecting the exposure operation of the film, outputting a second signal at the start of release, and a third signal when the exposure operation is completed. Even when the first signal is output from the rewind switch by the operation of the operation member, the detection means outputs the second signal, and then the detection means outputs the second signal. A control means for prohibiting the rewinding drive by the rewinding means when the output of the third signal is not detected.