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JPH065918B2 - Video mixing amplifier - Google Patents
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JPH065918B2 - Video mixing amplifier - Google Patents

Video mixing amplifier

Info

Publication number
JPH065918B2
JPH065918B2 JP4854786A JP4854786A JPH065918B2 JP H065918 B2 JPH065918 B2 JP H065918B2 JP 4854786 A JP4854786 A JP 4854786A JP 4854786 A JP4854786 A JP 4854786A JP H065918 B2 JPH065918 B2 JP H065918B2
Authority
JP
Japan
Prior art keywords
signal
circuit
wipe
border
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP4854786A
Other languages
Japanese (ja)
Other versions
JPS62207074A (en
Inventor
裕一 小山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP4854786A priority Critical patent/JPH065918B2/en
Publication of JPS62207074A publication Critical patent/JPS62207074A/en
Publication of JPH065918B2 publication Critical patent/JPH065918B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はテレビジョン映像混合増幅器に係り、特にワイ
プおよびボーダーワイプを行う場合の映像混合増幅器に
関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television video mixing amplifier, and more particularly to a video mixing amplifier for performing wipe and border wipe.

〔従来の技術〕[Conventional technology]

従来のこの種の映像混合増幅器の一例を第4図に示し説
明すると、図において、A,B,BCは映像信号である入力信
号、S1はワイプ信号、S2はボーダー信号、S4は出力
映像信号である。
An example of a conventional video mixing amplifier of this type is shown in FIG. 4 and explained. In the figure, A, B and BC are input signals which are video signals, S 1 is a wipe signal, S 2 is a border signal, and S 4 is It is an output video signal.

そして、11はワイプ信号S1およびボーダー信号S2
入力としキー信号の処理を行うキー信号処理回路、12,1
3,14は入力信号A,B,BCを入力とし乗算を行う第1、第
2、第3の乗算回路で、上記キー信号処理回路11で処
理されたキー信号によって第1、第2、第3の乗算回路
12,13,14でキーイングし、加算回路15でこれら第1〜
第3の乗算回路12〜14の3つの出力を合成すること
でワイプおよびボーダーワイプを行い、加算回路15の
出力側に出力映像信号S4を得るように構成されてい
る。
Reference numeral 11 denotes a key signal processing circuit that receives the wipe signal S 1 and the border signal S 2 and processes the key signal.
Reference numerals 3 and 14 denote first, second, and third multiplication circuits that receive the input signals A, B, and BC and perform multiplication. The first, second, and third multiplication circuits perform the key signals processed by the key signal processing circuit 11. 3 multiplication circuit
Keying is performed with 12, 13, and 14, and the first to
Wiping and border wiping are performed by synthesizing the three outputs of the third multiplication circuits 12 to 14, and the output video signal S 4 is obtained at the output side of the addition circuit 15.

このキー信号処理回路11の出力キー信号の波形および
入力ワイプ信号、入力ボーダー信号の波形を第5図、第
6図に示す。
The waveforms of the output key signal, the input wipe signal, and the input border signal of the key signal processing circuit 11 are shown in FIGS. 5 and 6.

この第5図はボーダーワイプ時を示したものであり、第
6図はワイプ時を示したものである。
FIG. 5 shows the case of border wipe, and FIG. 6 shows the case of wipe.

そして、それぞれ(イ)は入力ワイプ信号を示し、(ロ)は入
力ボーダー信号、(ハ)は第1の乗算回路12用キー信
号、(ニ)は第2の乗算回路13キー信号、(ホ)は第3の乗
算回路14用キー信号をそれそれ示す。
Then, (a) shows an input wipe signal, (b) an input border signal, (c) a key signal for the first multiplication circuit 12, (d) a key signal for the second multiplication circuit 13, and (e) ) Indicates the key signal for the third multiplication circuit 14, respectively.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

上述した従来の映像混合増幅器では、ワイプ時には第3
の乗算回路は使用しているという問題点があり、また、
第1および第2の乗算回路用のキー信号を得る場合に
は、キー信号処理回路でワイプ信号とボーダー信号の演
算が必要であるという問題点があった。
In the above-mentioned conventional video mixing amplifier, the third video amplifier is used for wiping.
There is a problem that I am using the multiplication circuit of
When obtaining the key signals for the first and second multiplication circuits, there is a problem that the key signal processing circuit needs to calculate the wipe signal and the border signal.

〔問題点を解決するための手段〕[Means for solving problems]

本発明による映像混合増幅器は、複数の映像信号を入力
としてこれらの切替を行なう切替回路と、ワイプ信号と
ボーダー信号およびボーダーワイプ制御信号を入力とし
て上記切替回路の制御を行うと共にキー信号の処理を行
うキー信号処理回路と、上記切替回路およびキー信号処
理回路からの信号を受け乗算を行う第1の乗算回路およ
び第2の乗算回路と、この第1および第2の乗算回路の
出力を加算し出力映像信号を得る加算回路とを備えてな
るようにしたものである。
The video mixing amplifier according to the present invention controls a switching circuit which receives a plurality of video signals as input and switches these signals, and a wipe signal, a border signal and a border wipe control signal as input and performs processing of a key signal. The key signal processing circuit for performing, the first multiplication circuit and the second multiplication circuit for receiving and multiplying the signals from the switching circuit and the key signal processing circuit, and the outputs of the first and second multiplication circuits are added. And an adder circuit for obtaining an output video signal.

〔作用〕[Action]

本発明においては、ボーダーワイプ時にはワイプ境界は
ボーダー信号によってキーイングされて画面上現われな
いという点に着目し、ワイプ時には乗算回路を用いて2
つの画面の合成を行い、ボーダーワイプ時には切替回路
で2つの画面の合成をし、乗算回路でボーダー部分の処
理を行う。
In the present invention, attention is paid to the fact that the wipe boundary is keyed by the border signal and does not appear on the screen when the border wipe is performed.
Two screens are combined, and at the time of border wipe, the switching circuit combines the two screens, and the multiplication circuit processes the border portion.

〔実施例〕〔Example〕

以下、図面に基づき本発明の実施例を詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

第1図は本発明による映像混合増幅器の一実施例を示す
ブロック図である。
FIG. 1 is a block diagram showing an embodiment of a video mixing amplifier according to the present invention.

この第1図において第4図と同一符号のものは相当部分
を示し、1は複数の映像信号である入力信号A,B,BCを入
力としてこれらの切替を行う切替回路、2はワイプ信号
1とボーダー信号S2およびボーダーワイプ制御信号S
2を入力として上記切替回路1の制御を行うと共にキー
信号の処理を行うキー信号処理回路、3および4は上記
切替回路1およびキー信号処理回路2からの信号を受け
乗算を行う第1の乗算回路および第2の乗算回路、5は
この第1および第2の乗算回路3,4の出力を加算し出
力映像信号S4を得る加算回路である。
In FIG. 1, the same reference numerals as those in FIG. 4 indicate corresponding parts, and 1 is a switching circuit for inputting a plurality of input signals A, B and BC which are video signals and switching them, and 2 is a wipe signal S. 1 and border signal S 2 and border wipe control signal S
A key signal processing circuit for controlling the switching circuit 1 with 2 as an input and for processing a key signal, and 3 and 4 are first multiplications for receiving and multiplying signals from the switching circuit 1 and the key signal processing circuit 2. The circuit and the second multiplication circuit 5 are addition circuits for adding the outputs of the first and second multiplication circuits 3 and 4 to obtain an output video signal S 4 .

つぎにこの第1図に示す実施例の動作を第2図、第3図
を参照して説明する。
The operation of the embodiment shown in FIG. 1 will be described below with reference to FIGS.

この第2図、第3図は第1図の動作説明に供する各部の
信号波形を示した図である。第2図はワイプ時を示した
ものであり、第3図はボーダーワイプ時を示したもので
ある。そして、第2図おいて(イ)は入力ワイプ信号を示
し、(ロ)は入力ボーダー信号、(ハ)は第1の乗算回路3用
キー信号、(ニ)は第2の乗算回路4用キー信号を示し、
第3図において(イ)は入力ワイプ信号、(ロ)は入力ボーダ
ー信号、(ハ)は第1の乗算回路3に入力する映像信号を
切替えるための切替信号、(ニ)は第1の乗算回路3用キ
ー信号、(ホ)は第2の乗算回路4用キー信号をそれぞれ
示す。
FIG. 2 and FIG. 3 are diagrams showing signal waveforms of respective parts used in the explanation of the operation of FIG. FIG. 2 shows a wipe operation, and FIG. 3 shows a border wipe operation. In FIG. 2, (a) shows an input wipe signal, (b) an input border signal, (c) a key signal for the first multiplication circuit 3, and (d) a second multiplication circuit 4. Shows key signal,
In FIG. 3, (a) is an input wipe signal, (b) is an input border signal, (c) is a switching signal for switching the video signal input to the first multiplication circuit 3, and (d) is the first multiplication signal. The key signal for the circuit 3 and (e) show the key signal for the second multiplication circuit 4, respectively.

まず、初めに、ワイプを行う場合の各部の動作を第2図
を参照して説明する。
First, the operation of each part when performing a wipe will be described with reference to FIG.

ボーダーワイプ制御信号S3はボーダーワイプOFFという
制御をキー信号処理回路2にあたえ、このキー信号処理
回路2より切替回路1を制御して、第1の乗算回路3に
入力信号Aおよび第2の乗算回路4に入力信号Bをそれ
ぞれ出力するように制御を行う。また、キー信号処理回
路2ではワイプ信号S1を入力として第1の乗算回路3
にワイプ信号、第2の乗算回路4にそのワイプ信号の反
転を与える(第2図(ハ)、(ニ)参照)。そして、この第1
および第2の乗算回路3,4では、これらキー信号によ
ってキーイングを行い、加算回路5で加算することによ
り、入力信号Aと入力信号Bのワイプが行なえる(第2
図参照)。
The border wipe control signal S 3 is given to the key signal processing circuit 2 to control the border wipe OFF, and the key signal processing circuit 2 controls the switching circuit 1 to input the input signal A and the second signal to the first multiplication circuit 3. Control is performed so that the input signal B is output to each of the multiplication circuits 4. The key signal processing circuit 2 receives the wipe signal S 1 as an input and outputs the first multiplication circuit 3
To the second multiplying circuit 4 and the inversion of the wipe signal to the second multiplying circuit 4 (see FIGS. 2C and 2D). And this first
In the second multiplication circuits 3 and 4, keying is performed with these key signals, and the addition circuit 5 adds the signals to wipe the input signal A and the input signal B (second).
See figure).

つぎに、ボーダーワイプ時の動作を第3図を参照して説
明する。
Next, the operation at the time of border wipe will be described with reference to FIG.

まず、ボーダーワイプONという制御によりキー信号処
理回路2でワイプ信号S1を用いて乗算回路に入力され
る映像信号の切替を行う切替信号を発生する。すなわ
ち、第1の乗算回路3の入力映像信号は、ワイプ信号S
1の境界で入力信号Aと入力信号Bが切替られた信号と
なり、第2の乗算回路4の入力映像信号は、入力信号B
C(ボーダーカラー信号)となる。
First, under the control of border wipe ON, the key signal processing circuit 2 uses the wipe signal S 1 to generate a switching signal for switching the video signal input to the multiplication circuit. That is, the input video signal of the first multiplication circuit 3 is the wipe signal S
The input signal A and the input signal B are switched at the boundary of 1 , and the input video signal of the second multiplication circuit 4 is the input signal B.
It becomes C (border color signal).

つぎに、第1の乗算回路3では、上記入力信号Aと入力
信号Bが切替えられた映像信号とボーダー信号を反転し
たキー信号が乗算される。そして、第2の乗算回路4で
はボーダーカラー信号(入力信号BC)とボーダー信号
2が乗算される。そして、これら2つの結果を加算回
路5で加算することによって、入力信号Aと入力信号B
をボーダーワイプした画面が得られる。
Next, in the first multiplication circuit 3, the video signal in which the input signal A and the input signal B are switched and the key signal obtained by inverting the border signal are multiplied. Then, in the second multiplication circuit 4, the border color signal (input signal BC) is multiplied by the border signal S 2 . Then, by adding these two results in the adder circuit 5, the input signal A and the input signal B are added.
You can get a screen with border wipe.

なお、上記実施例においては、入力信号Aと入力信号B
の2入力の切替を行う場合を例にとって説明したが、本
発明はこれに限定されるものではなく、切替を行うため
のワイプ信号をキー信号処理回路2に追加すると共に、
切替回路1に入力信号を追加することによって、複数の
映像信号である入力信号を切替えて、これにボーダーを
付けることもできる。
In the above embodiment, the input signal A and the input signal B are
However, the present invention is not limited to this, and a wipe signal for switching is added to the key signal processing circuit 2 and
By adding an input signal to the switching circuit 1, it is possible to switch the input signals, which are a plurality of video signals, and add a border thereto.

〔発明の効果〕〔The invention's effect〕

以上説明したように、本発明によれば、ワイプ時には乗
算回路を用いて2つの画面の行うため、ソフトワイプも
可能であり、また、ボーダーワイプ時には切替回路で2
つの画面の合成をし、乗算回路でボーダー部分の処理を
行うことにより、乗算回路が2回路で、かつ加算回路も
2入力加算でボーダーワイプができるので、実用上の効
果は極めて大である。
As described above, according to the present invention, since two screens are performed by using the multiplication circuit at the time of wiping, soft wiping is also possible, and at the time of border wiping, it is possible to perform two screens by the switching circuit.
By combining two screens and processing the border portion by the multiplication circuit, the multiplication circuit can perform two circuits, and the addition circuit can perform border wipe by two-input addition. Therefore, the practical effect is extremely large.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明による映像混合増幅器の一実施例を示す
ブロック図、第2図、第3図は第1図の動作説明に供す
る各部信号の波形を示す波形図、第4図は従来の映像混
合増幅器の一例を示すブロック図、第5図、第6図は第
4図の動作説明に供する各部信号の波形を示す波形図で
ある。 1……切替回路、2……キー信号処理回路、3,4……
乗算回路、5……加算回路。
FIG. 1 is a block diagram showing an embodiment of a video mixing amplifier according to the present invention, FIGS. 2 and 3 are waveform diagrams showing waveforms of signals of respective parts used for explanation of operation of FIG. 1, and FIG. FIG. 5 is a block diagram showing an example of a video mixing amplifier, and FIG. 5 and FIG. 6 are waveform diagrams showing waveforms of signals of respective parts used in the explanation of the operation in FIG. 1 ... Switching circuit, 2 ... Key signal processing circuit, 3, 4 ...
Multiplier circuit, 5 ... Adder circuit.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】複数の映像信号を入力としてこれらの切替
を行う切替回路と、ワイプ信号とボーダー信号およびボ
ーダーワイプ信号を入力として前記切替回路の制御を行
うと共にキー信号の処理を行うキー信号処理回路と、前
記切替回路およびキー信号処理回路からの信号を受け乗
算を行う第1の乗算回路および第2の乗算回路と、この
第1および第2の乗算回路の各出力を加算し出力映像信
号を得る加算回路とを備えてなることを特徴とする映像
混合増幅器。
1. A switching circuit for inputting a plurality of video signals and switching these signals, and a key signal processing for controlling the switching circuit by inputting a wipe signal, a border signal and a border wipe signal and processing a key signal. A circuit, a first multiplication circuit and a second multiplication circuit for receiving and multiplying signals from the switching circuit and the key signal processing circuit, and outputs of the first and second multiplication circuits and output video signal An image mixing amplifier comprising:
JP4854786A 1986-03-07 1986-03-07 Video mixing amplifier Expired - Fee Related JPH065918B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4854786A JPH065918B2 (en) 1986-03-07 1986-03-07 Video mixing amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4854786A JPH065918B2 (en) 1986-03-07 1986-03-07 Video mixing amplifier

Publications (2)

Publication Number Publication Date
JPS62207074A JPS62207074A (en) 1987-09-11
JPH065918B2 true JPH065918B2 (en) 1994-01-19

Family

ID=12806394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4854786A Expired - Fee Related JPH065918B2 (en) 1986-03-07 1986-03-07 Video mixing amplifier

Country Status (1)

Country Link
JP (1) JPH065918B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5157494A (en) * 1991-03-29 1992-10-20 The Grass Valley Group, Inc. Apparatus and method for combining video signals to provide an output signal with full field coverage

Also Published As

Publication number Publication date
JPS62207074A (en) 1987-09-11

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