JPH0667193B2 - Controller for single-phase bridge inverter - Google Patents

Description

The present invention relates to a control device for a single-phase bridge inverter capable of high-speed response to load and power supply voltage fluctuations.

[Conventional technology]

In general, the current instantaneous value control method has a faster response to load and power supply voltage fluctuations than the average value control method. However, this method uses DC-DC with a transformer interposed.
When applied to a converter, the on-off frequency is not constant with respect to the load, which causes problems such as transformer saturation and magnetic bias.

Therefore, as an instantaneous value control method for a DC-DC converter with a transformer interposed in consideration of these problems, conventionally, for example, the Institute of Electrical Engineers of Japan, Semiconductor Power Conversion Workshop Material SPC-86-1.
3 "Problems and Countermeasures Related to High Speed Control of Welding Power Source"
1-33) (issued February 1, 1986). FIG. 4 is a block diagram showing an example of a conventional controller for a single-phase bridge inverter, in which FIG.
Transistors 3, 4 and 5 respectively connect the transistor 2 and the transistor 3 and the transistor 4 and the transistor 5 in series, and the transistors 2, 3 and 4, 5 connected in series are parallel to the DC voltage source 1. To form a bridge circuit. 6 is a transformer, 7 is a rectifier, 8 is a coil, 9 is a resistor, 10 is a current detector, 11,
12, 13, 14 are bass amplifiers, 15 are switches, 1
6 is an AND gate, 17 is a basic pulse generator, 18 is J
-K flip-flop, 19 is a comparator, and 20 is a current reference setting device.

Next, the operation will be described.

FIG. 5 is a diagram showing operation waveforms at various points in FIG. 4. The control device shown in FIG. 4 controls the output of the basic pulse from the basic pulse generator 17 in order to control the current of the load resistor 9 to be constant. Whether or not it is determined is determined by comparing the current detected by the current detector 10 with the reference current from the current reference setting device 20, and the inversion time of the Q output of the JK flip-flop 18 is determined by the basic pulse from the basic pulse generator 17. The AND gate 16 outputs a pulse having a constant width and adjusts the off time.

Then, the ignition timing of the transistors 2 to 5 and AN
In FIG. 5 showing the relationship of signals after the D gate 16,
The pulse 101 from the AND gate 16 has a constant on-time and an off-time that changes to control the current. The pulse signal 101 is input to the switch 15. The switch 15 operates so as to alternately distribute the pulse 101 from the AND gate 16 to the transistors 2 and 5 and the transistors 3 and 4, so that the pulse 101 is distributed to one terminal and the other terminal of the switch 15. And appear as pulse 111 and pulse 112. Now, when the switch 15 is connected in the illustrated state, the transistors 2 and 5 are driven by the pulse 112, and the switch 1
When 5 is switched from the illustrated state and connected, the transistors 3 and 4 are driven by the pulse 111,
As a result of alternately driving the transistors 2 and 5 and the transistors 3 and 4, the AC waveform V ₁ shown in the figure is obtained as the input voltage of the transformer 6.

[Problems to be solved by the invention]

Since the conventional controller for the single-phase bridge inverter is configured as described above, for example, the pulse 112 of the same signal is
If the on / off time of one transistor 2 of the transistors 2 and 5 driven by is shorter than the on / off time of the other transistor 5 and both on and off are faster, all switching losses occur in the transistor 2. One side of the switching loss will occur. In this case, if the switching frequency is high, it is necessary to match the thermal design to the transistor 2 which generates a large amount of heat, which causes a problem that the cooler becomes large.

The present invention has been made to solve the above-mentioned problems, and uniformizes the generation of switching loss and disperses heat to reduce the size of a cooler, thereby reducing the overall price as an inexpensive one. An object is to obtain a control device for a single-phase bridge inverter that can perform

[Means for solving problems]

A control device for a single-phase bridge inverter according to the present invention,
In order to form a pair of opposing sides of a bridge circuit in which electric valves with a self-extinguishing function are connected to four sides, and to have a time difference in at least one of on-timing and off-timing of the electric valve with self-extinguishing function of the set Between the control pulse generating means for detecting the electric quantity of the load to obtain the control pulse and the switch circuit for alternately and repeatedly supplying the control pulse to each electric valve with a self-extinguishing function forming a pair, the control pulse generating means A time difference generating means for generating a time difference in a part of the control pulse is provided.

[Action]

The control device for a single-phase bridge inverter according to the present invention has a time difference in at least one of on-timing and off-timing of the self-extinguishing electric valve provided on each of the four sides of the bridge circuit. Therefore, the amount of electricity of the load is detected, a control pulse is generated based on this detected value, and the control pulse is supplied to the switch circuit through the time difference generating means and directly to the switch circuit, and each self-extinguishing function of the pair is formed. Alternately drive the attached electric valve alternately.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. First
In the figure, the same components as those in FIG. 4 are designated by the same reference numerals, and the description thereof will be omitted. In FIG. 1, 21 is a delay element, 22 is an OR gate that takes the logical sum of the output of the delay element 21 and the output of the AND gate 16, and 23 is the OR gate 22.
A switch connected to the output terminal of the AND gate 24 is an AND gate 1
These switches are connected to the output terminals of 6
3 and 24 operate in synchronization, and change the connection point for each pulse. Then, the switches 23 and 24 form a switch circuit 25. A switch circuit 26 is composed of switches 27 and 28 and has the same function as the switch circuit 25. These switches 27 and 28 operate in synchronization with each other.
And the connection point is changed for each pulse. 29 is a switch 30
And 31 and having the same function as the switch circuit 25, these switches 30 and 31 operate in synchronization, and change the connection point for each pulse.

Next, the operation will be described with reference to FIG. AND gate 16
The output of the control pulse 101 whose off time is controlled is the same as the example shown in FIG. In the circuit of FIG. 1, the control pulse 101 is input to the delay element 21 and is delayed by a fixed time Δt, and the output from the delay element 21 and the control pulse 101 which is the original signal are combined with the OR gate 2
When it is input to 2, the signal 102 whose off timing is delayed by Δt to the output of the OR gate 22 is obtained as a control pulse. Now, when the control pulse 101 from the AND gate 16 is input to the switch 24 and the pulse 102 from the OR gate 22 is input to the switch 23, the switch circuit 2
The connection points of the switches 23, 24, 27 and 28 of 5, 26 are switched from the state shown in the figure, and the pulse signal 101 is transmitted through the signal line 10.
4 is input to one switch 28 of the switch circuit 26, and then is input to the transistor 3 via the signal line 108 to drive it. At the same time, pulse signal 1
02 is input to the other switch 27 of the switch circuit 26 through the signal line 103, and then input to the transistor 4 through the signal line 107 to drive it. Next, A
The pulse signal 101 from the ND gate 16 is switched by the switch 24.
Is input to the switch 23 and the pulse signal 102 from the OR gate 22 is input to the switch 23.
5, the connection points of the switches 23 and 24 of FIG. 5 are switched to the illustrated state, the connection points of the switches 30 and 31 of the switch circuit 29 are switched from the illustrated state, and the pulse signal 101 becomes the signal line 10.
It is inputted to one switch 31 of the switch circuit 29 through 6 and then inputted to the transistor 5 through the signal line 110 to drive it. At the same time, pulse signal 1
02 is input to the other switch 30 of the switch circuit 29 through the signal line 105 and then to the transistor 2 through the signal line 109 to drive it. Thus, the switch 23 alternately distributes the input pulse signal 102 to the signal lines 103 and 105, and the switch 24 alternately distributes the input pulse signal 101 to the signal lines 104 and 106. In addition, the switch circuits 26 and 29 also include the signal line 103.
Pulse signals coming through the signal lines 107 and 10
8 and the signal lines 109 and 110 are alternately distributed, so that the off timings of the ignition signals of the transistors 2 to 5 are sequentially delayed. Therefore, since the switching loss at the time of turning off occurs in the transistor that turns off earlier, the switching loss occurs in the order of transistor 3 → transistor 5 → transistor 4 → transistor 2, and the loss is dispersed.

Further, FIG. 3 shows an embodiment for performing voltage control, in which 40 is a capacitor, 41 is a voltage detector, 42 is a voltage controller, and 43 is a PWM control circuit.

In this embodiment, the voltage of the load resistor 9 is detected by the voltage detector 41, the voltage controller 42 takes the difference from the reference voltage, and the PWM control circuit 43 controls the pulse width.

In the above-described embodiments, only the off timing is delayed, but the on timing may be delayed, and by delaying the on timing, the switching loss at the time of on can be made uniform. Further, although the bridge circuit is constituted by the transistor, it is not limited to the transistor as long as it is an electric valve having a self-extinguishing function.

〔The invention's effect〕

As described above, according to the present invention, the controller of the single-phase bridge inverter is composed of four sides of opposite sides of the bridge circuit to which the electric valve with the self-extinguishing function is connected, and the set is provided with the self-extinction function. A control pulse is applied to each electric valve with a self-extinguishing function that forms a control pulse by detecting the amount of electricity in the load so that at least one of the ON timing and the OFF timing of the electric valve has a time difference. Since the time difference generating means for generating a time difference in a part of the control pulse from the control pulse generating means is provided between the switch circuit and the switch circuit which is repeatedly supplied alternately, the generation of the switching loss can be dispersed. Therefore, the heat generated by the electric valve with self-extinguishing function can be dissipated, the reliability can be improved, and the cooler can be downsized and the price can be reduced. There is.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing a control device for a single-phase bridge inverter according to an embodiment of the present invention, FIG. 2 is an operation explanatory diagram showing operation waveforms of main parts of FIG. 1, and FIG. FIG. 4 is a circuit configuration diagram showing a control device for a single-phase bridge inverter showing another embodiment of the present invention, FIG. 4 is a circuit configuration diagram showing an example of a control device for a conventional single-phase bridge inverter, and FIG. FIG. 7 is an operation explanatory diagram showing operation waveforms of a main part of FIG. 1 is a DC voltage source, 2, 3, 4, 5 are transistors, 16
Is an AND gate, 21 is a delay element, 22 is an OR gate,
23, 24, 27, 28, 30, 31 are switches, 2
Switch circuits 5, 26 and 29 are provided.

Claims (1)

[Claims] 1. A bridge circuit is formed by connecting two series circuits in which two electric valves with a self-extinguishing function are connected in series to a DC power source in parallel, and connected to one opposite side of the bridge circuit. Each of the electric valves with self-extinguishing function and the electric valves with self-extinguishing function connected to the other side of the other side are alternately driven repeatedly by the control pulse supplied from the control pulse generating means through the switch circuit, and the load is applied. In a controller for a single-phase bridge inverter configured to control a constant amount of electricity, the control pulse is supplied to the control pulse generating means, and the on-timing and off-timing of the electric valve with self-extinguishing function are supplied. A time difference generating means for generating a time difference between one or both of the control pulse generating means and the control pulse having a time difference from the time difference generating means. Control device for single-phase yellowtail Tsuji inverter comprising the switching circuit to alternately repeatedly output to the self-turn-off function with an electric valve which constitutes the set receives a control pulse at the same time.