JPH0671008B2 - diode - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to diodes particularly suitable for incorporation in integrated circuit devices.

[Conventional technology]

Diodes incorporated in semiconductor integrated circuits, especially bipolar and BiMOS type integrated circuits, are connected to various potential points in the circuit or used with various voltages applied, so the potential of other parts of the circuit is as high as possible. It is desirable to fabricate the semiconductor device in a semiconductor region such as an epitaxial layer having a conductivity type opposite to that of the semiconductor substrate which is junction-separated from the semiconductor substrate, either alone or together with related circuit elements. . FIG. 3 shows the simplest conventional example in which a high withstand voltage diode is built in such a semiconductor region in a single form.

In the example of FIG. 3, first, strong n-type diffusion is performed for the buried layer 2 at a predetermined position on the surface of the p-type substrate 1, and then,
Growing an n-type epitaxial layer for the semiconductor region 3,
The separation layer 4 is deeply diffused from the surface so as to reach the substrate 1 with a strong p-type, so that the epitaxial layer is formed into the substrate 1.
To the semiconductor region 3 which is junction-separated from. The diode is built into this semiconductor region 3 and for this reason diffuses the p-type layer 7 and the n-type layer 8 from its surface, through the windows opened in the oxide film 20 above them. And 8 are provided with connection films 41 and 42 which are in conductive contact with each other to form electrodes for the diode.

In the diode shown in FIG. 3, by appropriately selecting the impurity concentration and thickness of the epitaxial layer as the semiconductor region 3 and by diffusing the p-type layer 7 and the n-type layer 8 with appropriate impurity concentration and depth, The withstand voltage value of can be obtained. However, since the pnp type parasitic transistor Tr as shown in the figure having the p type layer 7 as the emitter, the n type semiconductor region 3 as the base, the p type isolation layer 4 and the substrate 1 as the collector is simultaneously formed, the p type layer 7 is formed. In addition to the regular diode current flowing from the layer 7 to the n-type layer 8, a large amount of leakage current flows from the p-type layer 7 to the substrate 1 through this parasitic transistor. If the current amplification factor of the parasitic transistor is h _FE and the ratio of this leakage current to the total current flowing into the p-type layer 7 is k, then k = h _FE / (1 + h _FE ) and the current amplification of the parasitic transistor is Since the rate h _FE is usually around 10, the value of k is about 0.9. That is, in this conventional example, the p-type layer 7
Only 10% of the current flowing in will be available as diode current.

FIG. 4 is a modification of this point, in which instead of the previous n-type layer, a wall layer which surrounds the p-type layer 7 as shown and which is deeply diffused to reach the buried layer 2 has a high impurity concentration. 5 is provided, and the connection layer 6 is diffused to the surface portion thereof in a strong n-type for connection with the connection film 42. As a result, the impurity concentration in the base region of the parasitic transistor rises and the current amplification factor decreases, but the current amplification factor of the parasitic transistor is still about 0.5. 1 flows out toward the substrate 1.

FIG. 5 is a further improvement of this, and is the p-type layer 7 of FIG.
Instead, a lateral transistor is built in, and the leakage current is reduced while utilizing the current amplification factor. Therefore, the emitter layer 11 and the collector layer 12 surrounding it are diffused as p-type from the surface of the semiconductor region 3 to form a lateral pnp transistor having the n-type semiconductor region 3 as a base region as shown in the figure. Further, the collector layer 12 is short-circuited to the aforementioned connection layer 6 or the base region by the connection film 42, and the transistor current flowing from the emitter layer 11 to the collector layer 12 is used as a diode current.

In this example, the current amplification factor of the lateral transistor and h _FE t, when the current amplification factor of the parasitic transistor and h _FE, the ratio k mentioned above to the total current of the leakage current _{h FE / (1 + h FE} + h
_FE t). Now, the current amplification factor of the horizontal transistor is about 20 and the current amplification factor of the parasitic transistor is
If the value of 0.5 is included in the above equation, the value of the ratio k becomes about 1/40, and it can be seen that the leakage current component is significantly reduced by using the lateral transistor.

FIG. 6 shows the results of actual measurement of the above-mentioned ratio k for the diode shown in FIGS. 4 and 5 with respect to a diode current Id in a considerably wide range. It can be seen that line A is for the diode of FIG. 5 utilizing a lateral transistor and that the leakage current is much less than that for the diode of line B of FIG. The present invention relates to a diode using such a lateral transistor.

[Problems to be Solved by the Invention]

As described above, the diode using the lateral transistor is very advantageous in reducing the leakage current, but has a drawback that the reverse breakdown voltage is low as it is. As shown in FIG. 5, when a reverse voltage is applied to the diode, that is, when a negative voltage is applied to the connection film 41 connected to the emitter layer 11 which is the positive electrode of the diode, the oxidation underneath is performed. On the surface of the n-type semiconductor region 3 facing the film 20 through the film 20, p
This is because the shaped channel Ch is easily induced. For example,
Semiconductor region 3 has a specific resistance of 2.5 Ωc for bipolar integrated circuits
This is an epitaxial region of m and the thickness of the oxide film 20 is 1μ.
Even if the thickness is considerably thicker than m, if a reverse voltage of about 15 V is applied to the crest 41, this channel Ch will be induced and the withstand voltage value of the diode will be restricted by this. I can't get the diode.
If the semiconductor region is an epitaxial layer with a specific resistance of 3.0 Ωcm for BiCMOS integrated circuits, the thickness of the oxide film is 1.5 μm.
The threshold for channel induction is 15
It is about V.

Therefore, it has been conventionally practiced to form the planar pattern of the diode having the structure shown in FIG. 5 as shown in FIG. As you can see, in this example the connection film
The collector layer 12 under 41 is cut out, and even if a channel is induced on the surface of the semiconductor region 3 under the connection film 41 by this, the emitter layer 11 and the collector layer 12 do not immediately conduct. It was done like this. However, in this means, the current amplification factor of the lateral transistor is reduced to about 5 due to the cutout of a part of the collector layer, and the value of the ratio k is increased to leak about 8% of the total current. become.

FIG. 8 is also an improved structure known from the past, and as can be seen from the figure, the collector layer of the diode having the structure shown in FIG.
An n-type layer 13 is annularly added inside 12 as a kind of channel stopper. However, as can be easily understood, in this structure, the current amplification factor of the lateral transistor is considerably reduced to about 2, for example, and about 15% of the total current is leaked. Most of the meaning used is lost. Moreover, the chip area required for forming the diode is naturally increased just by adding the n-type layer 13.

Another troublesome problem related to this is that when a voltage is applied at a high temperature, the state of the oxide film changes and a channel is easily formed under the temperature even when the temperature is returned to room temperature.
During this so-called high temperature application test, the distribution of mobile ions in the oxide film is likely to change due to thermal diffusion under an electric field, and that state is likely to be fixed.Therefore, if a reverse voltage is applied even after returning to room temperature, It becomes easier for leakage current of another meaning to flow. The conventional structure of the diode described so far is
In any case, the characteristics are easily affected by the voltage application at such a high temperature. Regarding the state of the change in the state of the oxide film, another application of the applicant (Japanese Patent Application No. 62-297950).
No.) for more details, please refer to it.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above problems of the prior art, and to obtain a diode which has a small leakage current flowing to the substrate side and is advantageous in improving the withstand voltage value.

[Means for Solving the Problems]

According to the invention, the object is according to the invention between the emitter of a lateral transistor and the collector and the base short-circuited to each other, which are built up from the surface of the semiconductor region, which is junction-separated from the substrate as described at the beginning. An electrode film is provided on the surface of the semiconductor region between the emitter layer and the collector layer of the transistor through an insulating film for the diode formed in, and the electrode film is connected to the semiconductor region at a predetermined potential. It is achieved by

The emitter layer and the collector layer for the lateral transistor having the above structure are formed by diffusion from the surface thereof with the same conductivity type as the semiconductor region, which is opposite to that of the semiconductor region. In order to increase the current amplification factor of this lateral transistor and reduce the amount of leakage current, it is desirable that the emitter layer is formed in an island pattern and the collector layer is formed in an annular pattern surrounding it. The insulating film under the electrode film in the present invention may be a normal oxide film, for example, a so-called steam oxide film, and the thickness thereof may be a normal degree, for example, about 1 μm.

In principle, the electrode film provided on this insulating film is formed only in the vicinity of the lower side where the connection film connected to the emitter layer crosses over the surface of the semiconductor region between the emitter layer and the collector layer. It may be provided in a state of being insulated from the film, but since a connection for applying a predetermined potential to this electrode film is required, the pattern is formed in an annular or semi-annular shape surrounding the emitter layer also for this connection. It is practical to do. For this electrode film, it is preferable to use conductive or semi-conductive aluminum or polycrystalline silicon. The electric potential applied to the electrode film is the simplest and sufficient to be the same electric potential as the semiconductor region thereunder, that is, the base region of the lateral transistor, but a channel opposite to that is formed on the surface of the semiconductor region below the electrode film. A potential having a polarity capable of preventing the induction may be applied, for example, when the semiconductor region is n-type, a potential slightly more positive than that may be applied.

In the present invention as well, it is desirable to provide the wall layer also as the base connection layer as in the conventional case. Of course, this wall layer is provided between the collector layer and the separation layer for junction separation of the semiconductor region, and the collector layer is When it is formed in a ring shape, it is better to make it in a ring pattern surrounding it from the outside.

[Action]

In any of the above-mentioned conventional examples, the surface of the semiconductor region in which the diode is formed is exposed to the outside in a barely exposed state, and the influence of an electric field from the outside affects the influence. In particular, in a diode using a lateral transistor, this semiconductor region serves as the base region of the transistor, so that its characteristics are likely to change even by a slight influence of an external electric field.

The present invention has been made paying attention to the fact that there is a problem in this respect, and the electrode film referred to in the above-mentioned configuration is used for the main part of the surface of the semiconductor region between the emitter layer and the collector layer of the lateral transistor or its It is provided so as to cover almost the front surface, and by connecting this electrode film to a predetermined potential point, most preferably the same potential point as the semiconductor region, the semiconductor region below is shielded by the electrode film and the surface potential is stabilized. It is something that is made to change.

This eliminates the possibility of forming a channel for conducting between the emitter layer and the collector layer on the surface of the semiconductor region due to the influence of an external electric field, and the withstand voltage value of the diode is remarkably improved as compared with the conventional case. Further, the electrode film only stabilizes the potential on the surface of the semiconductor region and does not have any influence on the action as the base region thereof. Therefore, the current amplification factor of the lateral transistor is kept high and stable,
The leakage current flowing from the diode to the substrate can be suppressed to a very small value. Furthermore, if the potential of the electrode film is set to the same potential as that of the semiconductor region as described above, no voltage is applied to the insulating film between the electrode film and the semiconductor region even during a voltage application test under high temperature. As described above, there is no possibility of irreversibly changing the distribution state of mobile ions in the insulating film.

In this way, the present invention succeeds in solving the intended problem by achieving both suppression of leakage current and improvement of withstand voltage value.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. In these figures, the same parts as those shown in FIG. 3 and subsequent figures described above are designated by the same reference numerals, and in order to avoid redundancy, the overlapping description will be omitted.

FIG. 1 shows an embodiment of the present invention in which polycrystalline silicon is used for the electrode film. FIG. 1 (a) shows a cross section of FIG. 1 (b).
The respective plan views are shown in FIG. The diode in this embodiment is suitable for being incorporated in a BiCMOS integrated circuit, and the n-type epitaxial layer as the semiconductor region 3 has a resistivity of about 3 Ωcm and is grown to a thickness of about 10 μm. The p-type separation layer 4 has 10 ¹⁸ to 10 ¹⁹ atoms
The impurity concentration of / cm ³ is deeply diffused until it reaches the substrate 1 of the same conductivity type, so that the semiconductor region 3 is separated from the p-type substrate 1 by the island-shaped n-type semiconductor region 3 as shown in FIG. Joined and separated. The n-type wall layer 5 is provided in an annular pattern along the outer periphery of the semiconductor region 3 as shown in FIG. 3B, and has a similar impurity concentration to that of the isolation layer until reaching the upper surface of the buried layer 2, for example, 8 μm. It is spread to the depth of the degree.

The lateral transistor as a diode is formed in the semiconductor region 3
Of the p-type emitter layer 11 and the collector layer 12 are formed in the area surrounded by the wall layer 5 of the semiconductor region 3 in the range of 10 ¹⁹ to 10 ²⁰ atoms / cm ³ from the surface of the semiconductor region ^3.
The impurity concentration of 2 is simultaneously diffused to a depth of about 2 μm. In this embodiment, as can be seen from FIG.
11 is an island pattern, and the collector layer 12 is diffused in an annular pattern surrounding it. The distance between the emitter layer 11 and the collector layer 12 is preferably about 10 μm in this example, which is similar to the thickness of the semiconductor region 3. Further, in the wall layer 5, the connection layer 6 is diffused in a circular pattern to a depth of 1 to 1.5 μm with a strong n-type having an impurity concentration of about 10 ²⁰ atoms / cm ³ .

With the above, the diffusion process is completed, and then, for example, a steam oxide film having a thickness of about 1 μm is formed as the insulating film 21, and then polycrystalline silicon is grown to a thickness of about 0.5 μm on the insulating film 21.
At the same time when the gate is formed in the MOS portion in the integrated circuit, the electrode film 31 for the diode according to the present invention is formed. It is most desirable that the electrode film 31 is provided so as to cover almost the entire surface of the semiconductor region 3 between the emitter layer 11 and the collector layer 12, as shown by hatching in FIG. . After forming this electrode film 31, another insulating film 22 is formed by CVD.
A connection film 41 made of aluminum or the like having a thickness of 0.5 to 1 μm is formed so that an oxide film is grown to a thickness of about 0.5 μm by the method and conductively contacts a predetermined place through a window opened therein.
And 42 are provided as shown. As can be seen from FIG. 9A, the electrode film 31 is insulated from the connection film 41 thereon by the insulating film 22.

The connection film 41, which serves as a regular electrode of the diode, is connected to the emitter layer 11 through the window 41a at the left end portion thereof as shown in FIG. The connection layer 42, which is the negative electrode of the diode, is in conductive contact with the connection layer 6 and the collector layer 12 of the wall layer 5 through the window 42a in the central portion thereof to be connected to both, thereby connecting to the collector of the lateral transistor. The base is short-circuited. The right end of this connection layer 42 is the window 42.
It is in conductive contact with the electrode film 31 via b, which places the electrode film 31 at the same potential as the shorted collector and base of the lateral transistor, ie at the same potential as the semiconductor region 3.

FIG. 2 shows a different embodiment of the present invention. In this embodiment, the arrangement and pattern of each semiconductor layer are the same as in the previous embodiment, but the electrode film is formed integrally with the connection film, The two-layer wiring is adopted in. Therefore, as shown in FIG. 3A, the first connection film 41, 42,
43 and the electrode film 32 are simultaneously formed of the same aluminum or the like, and the connection film 42 and the annular electrode film 32 therein are integrally formed as shown in FIG. The connection film 42, which is the negative electrode of the diode, is in conductive contact with the connection layer 6 of the collector layer 12 and the wall layer 5 as in the previous embodiment, and shorts the collector and base of the lateral transistor. Connection layers 41 and 43 are for the positive electrode of the diode, of which connection layer 41 is in conductive contact with emitter layer 11 as shown. Second connection film 44
Is the connecting film 41 and 43 of the first layer, as can be seen from FIG.
Windows 44a and 4 which are provided on another insulating film 22 for interconnection with the insulating film 22 and which are opened in this insulating film as shown in FIG.
It is connected to the connection films 41 and 43 thereunder via 4b, respectively.

In any of the above-described embodiments, the electrode films 31 to 32 are placed at the same potential as the semiconductor region 3 and electrostatically effectively shield the semiconductor region from the voltage of the connecting film or the like on the semiconductor film 3. A channel is not formed on the surface of the semiconductor region 3 between the layer 11 and the collector layer 12, and the withstand voltage value of the diode formed as a lateral transistor can be increased to a value of at least several tens V or more. .
In addition, since the diode-connected lateral transistor can be constructed in a completely normal structure, it is possible to obtain a high value of several tens of current amplification factor, and thereby the leakage current to the substrate side of the diode is 2 to 3%. It can be suppressed to the following low values.

〔The invention's effect〕

As described above, in the present invention, in forming a diode between the emitter and the collector and the base short-circuited to each other of the lateral transistor formed from the surface of the semiconductor region which is junction-separated from the substrate, Since the electrode film is provided on the surface of the semiconductor region between the emitter layer and the collector layer of the transistor via the insulating film, the electrode film is applied to the semiconductor region at a predetermined potential, for example, the same potential. , The surface potential of the semiconductor region between the emitter layer and the collector layer is effectively protected by the electrode film against the intrusion of an electric field from the outside, and a channel is induced between these layers when a reverse voltage is applied to the diode. Therefore, according to the present invention, the withstand voltage value of the diode can be improved more than several times of the conventional value. In order to prevent this channel induction by the electrode film of the present invention, it is not necessary to make any changes to the structure of the semiconductor region or semiconductor layer for the lateral transistor, so the current amplification factor of the lateral transistor is always kept at a high value. According to the present invention, the ratio of the dripping, and hence the diode current leaking to the substrate side can be suppressed to a low value of several percent or less.

The present invention has a feature that both the suppression of the leakage current of the diode using the lateral transistor and the improvement of the withstand voltage are compatible as described above, and even under the condition of high voltage application under high temperature, in the insulating film on the surface of the semiconductor region. It also has the effect of effectively preventing undesired movement or change of the distribution state of mobile ions that may occur in the above, and remarkably stabilizing the characteristics of the diode.

The above-mentioned effects of the present invention are obtained by using the bipolar type or BiMO type.
It is particularly effective for S-type integrated circuit devices, and by incorporating the diode according to the present invention therein, it is possible to contribute to the improvement of the performance and operational reliability of the integrated circuit device.

[Brief description of drawings]

1 and 2 relate to the present invention, which are sectional and plan views of different embodiments of the diode according to the present invention. 3 and subsequent figures relate to the prior art, and FIGS. 3 to 5 are cross-sectional views of conventional diodes having different structures, FIG. 6 is a characteristic diagram of their leakage currents, and FIG. 7 uses lateral transistors. FIG. 8 is a plan view of a conventional improved structure of the diode, and FIG. 8 is a sectional view of another improved structure.
In the figure, 1: semiconductor substrate, 2: buried layer, 3: semiconductor region or epitaxial layer, 4: isolation layer, 5: wall layer, 6: connection layer, 7: p-type layer of conventional structure, 8: conventional structure N-type layer, 11: emitter layer, 12: collector layer, 13: n-type layer of conventional structure, 20: oxide film, 21: insulating film or oxide film, 22: another insulating film or oxide film, 31, 32 : Electrode film, 41, 42, 43, 44: Connection film, 41a, 42a,
42b, 44a, 44b: connection layer window, Ch: channel, Id: diode current, k: ratio of leakage current to diode current, Tr: parasitic transistor.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical indication location H01L 23/60 23/62 29/08 29/73 29/91 H01L 29/91 L

Claims (1)

[Claims] 1. A diode formed between a semiconductor region junction-separated from a substrate as a base region and a collector formed between the emitter and a collector and a base short-circuited to each other, which is formed from the surface thereof. A diode characterized in that an electrode film is provided on the surface of a semiconductor region between an emitter layer and a collector layer via an insulating film, and the electrode film is connected to a predetermined potential with respect to the semiconductor region.