JPH0671133B2 - Method for forming solder layer on printed wiring board - Google Patents

Description

The present invention relates to a method for forming a solder layer used when mounting an electronic component such as a surface mount component on a conductor circuit formed on a printed wiring board. It is about.

(Prior Art) When an electronic component such as a surface mount component is mounted on a conductor circuit formed on a printed wiring board, a solder layer formed on the surface of a predetermined portion of the conductor circuit is used. This solder layer makes it possible to mount the electronic component very easily by mounting the connection terminal of the electronic component on the solder layer and heating and melting it.

Conventionally, the following two methods are typical as methods for forming this type of solder layer.

In the first method, as shown in (a) to (c) of FIG. 5, first, a solder resist is formed on a conductor circuit formed on a substrate except a necessary portion of a solder layer ( I). Then, solder paste is printed on the exposed conductor circuit (b). The solder paste printed in this way is heated to form a predetermined surface shape (C). Instead of printing the solder paste, a method of immersing the printed wiring board in the molten solder is also used.

The second method is as shown in FIGS. 6 and 7,
It uses a plating lead electrically integrated with the conductor circuit on the substrate. That is, in this method, plating with solder is performed to form a solder layer at a predetermined location, but for that purpose, a predetermined location of the conductor circuit is energized.
It is necessary to form the plating lead electrically integrated with the conductor circuit. Specifically, prior to forming the conductor circuit on the substrate, as shown in FIG. 6, a conductor pattern is arranged so as to be connected to the plating leads for all the conductor circuits on which the solder layer is to be formed, Accordingly, each conductor circuit (often a pad) is formed as shown in FIG. Then, as shown in FIG. 7, a plating resist is formed so as to expose only the portion where the solder layer is to be formed, and solder plating is performed while supplying electricity from the current supply portion of the plating lead. After completion of this solder plating, the plating resist is removed to expose the conductor circuit generally formed of copper, and the selective etching of copper and solder forming this conductor circuit is performed.
Alternatively, a predetermined lead cut is performed by external processing. Since the lead for plating is a completely unnecessary part in the product, it is cut by performing an outer shape process at a position shown by a dotted line in FIG. 6 after a predetermined process.

By the way, in recent years, it has become necessary to densify a conductor circuit formed on a printed wiring board, regardless of the type of the printed wiring board, as the electronic components themselves are densified. There is. This is not an exception even in a printed wiring board in which a solder layer is formed, and in reality, the distance between the conductor circuits is becoming smaller and smaller. When attempting to form a solder layer under such an actual condition, the above two methods include problems that must be solved respectively.

The problem that occurs in the first conventional method is that it is difficult to accurately form a solder layer on a densified conductor circuit. That is, in the case of the representative example shown in FIG. 5 in which the solder paste is used, in the space portion existing between each conductor circuit and the solder resist when the solder paste is printed, as shown in (b) of FIG. As shown, air bubbles are often left behind. If air bubbles remain in this way, as shown in FIG. 5C, when the solder paste is heated, the solder enters the space and the amount of solder on the conductor circuit decreases. When mounting electronic parts, the amount of solder tends to be insufficient, which is prone to occur. If the amount of the solder paste is increased in order to avoid this, the solder pastes located on the left and right with the plating resist in between may contact each other during printing or melting. This becomes more remarkable as the density of the conductor circuit becomes higher.

The problem that occurs in the second conventional method is that the plating lead must be formed with a conductor pattern, and that each pad and the plating lead must be connected with different conductor patterns. The formation of circuits is very limited. That is, if the second method is adopted, it is difficult to achieve a sufficient density of the conductor circuit.

(Problems to be Solved by the Invention) Therefore, the inventor of the present invention sufficiently achieves a high density of the conductor circuit in the above-described conventional method when the solder layer necessary for mounting components is formed. I have been devoting myself to the research that I cannot do it.

As a result, a good result is that chemical plating is applied to the entire surface before forming the plating resist, and this chemical plating is used as a plating lead, which eliminates the need for a plating lead with a conductor pattern that has been adopted in the conventional method. The present invention has been completed by newly discovering that

The present invention has been made based on the above circumstances,
The purpose is to provide a method capable of reliably and easily forming a solder layer used for mounting an electronic component without adversely affecting the high density of a conductor circuit on a printed wiring board. To do.

(Means and Actions for Solving the Problems) In order to solve the problems described above, the means adopted by the present invention will be described below with reference to FIGS. 1 to 4 corresponding to the embodiments. Is. That is, "printed wiring board (1
0) A method of forming a solder layer (16) for mounting a component on the conductor circuit (12) above through the following steps (a) to (f).

(A) A solder resist (13) is formed between the conductor circuits (12) formed on the substrate (11) and in a necessary portion of the conductor circuit (12) to form a solder layer (16) of the conductor circuit (12). A step of exposing only the portion to be exposed; (b) a step of subjecting the surface of the solder resist (13) and the surface of the conductor circuit (12) exposed between the solder resist (13) to a chemical plating (14); (C) A step of forming a plating resist (15) on the solder resist (13) which has been subjected to the chemical plating (14); the chemical plating (14) layer formed in the steps (d) and (b) is a lead for plating. As a step of performing electrolytic solder plating on the surface of the chemical plating (14) layer exposed from the plating resist (15); a step of removing the plating resist (15) formed in steps (e) and (c); Chemical plating (14) exposed in steps f) and (e)
The step of removing the layer ".

Next, each step of this means will be described in detail with consideration for the points.

First, the conductor circuit (12) is formed on the substrate (11). Among these conductor circuits (12), the conductor circuit (12) shown on the right side of FIG. There may be independent ones. That is, the independent conductor circuit (12) in the final product may be formed in an independent state from the beginning.

(A) After each conductor circuit (12) is formed on the substrate (11) as described above, a solder layer described later, that is, a portion where a plated solder (16) is to be formed is exposed on the conductor circuit (12). , The solder resist (13) is formed. The surface of the solder resist (13) is preferably roughened in order to improve the adhesion of the chemical plating (14) in the next step. In addition, the thickness of the solder resist (13) is such that the plated solder (16) is formed between them so that the plated solder (16) does not flow out to another place due to melting. ) Is preferable.

In the step (b), the chemical plating (14) is formed on the surface of each conductor circuit (12) and the solder resist (13). As the chemical plating (14), a material mainly made of copper is adopted, and its thickness is 0.3 μm to 30 μm.
The thickness is preferably about m, and it is particularly preferable that the thickness is 3 μm to 30 μm. The reason will be described in detail below.

First, the chemical plating (14) is a so-called plating lead for forming a plating solder (16) by energizing the chemical plating (14) in the subsequent step (d). This is because the resistance during energization becomes large and it becomes difficult to form the plated solder (16) under favorable conditions.

Also, when mounting electronic components on a printed wiring board manufactured by this method (see FIG. 1 (f)), the plating solder (16) is melted as described above. When copper is used as the material of the chemical plating (14) to be the lead, the copper diffuses to some extent in the plating solder (16) when the plating solder (16) is melted. Therefore, when the chemical plating (14) is thin, for example, 0.3 μm to 3 μm, after the finally formed plating solder (16) is melted, as shown in FIG. 3, the solder resist (13) side is formed. Almost all of the chemical plating (14) formed on the surface is diffused and does not remain in the plated solder (16).
Therefore, when the plated solder (16) is melted, the molten plated solder (16) adheres only to the conductor circuit (12) located immediately below.

On the other hand, when the chemical plating (14) has a thickness of 3 μm or more, the chemical plating (14) does not entirely diffuse into the plating solder (16) but a part of the chemical plating (14) diffuses. Fourth
As shown in the figure, it remains on the solder resist (13) side. For this reason, when the plating solder (16) is melted, the plating solder (16) is directly below the conductor circuit (12).
Of course, due to the surface tension of the solder resist (13), it also adheres to the chemical plating (14).

This is a big difference when the electronic component once connected by the plating solder (16) is replaced by remelting the plating solder (16). That is, when the thickness of the chemical plating (14) is thin, most of the remelted plating solder (16) adheres to the terminal side of the electronic component to be removed and almost remains on the conductor circuit (12). However, when the thickness of the chemical plating (14) is large, the contact area between the chemical plating (14) and the plating solder (16) is large, so that the remelted plating solder (16) is a conductor circuit (12). Since much remains on the upper side, another new electronic component can be reliably mounted because there is sufficient plated solder (16) remaining.

From the above, the chemical plating (1
The thickness of 4) should be 0.3 μm to 30 μm, but considering the exchange of electronic parts, the thickness should be 3 μm to 30 μm.
It is more preferable to set it to 30 μm. In this case, the chemical plating (14) is used as a plating lead, and the same metal layer as the chemical plating component is formed by electrolytic plating,
It is also possible to adjust the thickness.

(C) On the chemical plating (14) formed as described above,
A plating resist (15) is formed on a portion other than on each conductor circuit (12) exposed from the solder resist (13). That is, the plating resist (15) is formed on the solder resist (13) which has been subjected to the chemical plating (14). As a matter of course, the plating resist (15) is intended to prevent plating of an unnecessary portion, and a resist that can serve as a resist for the plating solder (16) is used. Further, as the plating resist (15), a sheet-shaped photosensitive material is used, and it is formed by exposing and developing a desired portion.

When the plating resist (15) is formed in this manner, the surface of the plating resist (15) reveals the chemical plating (14) on the scale where the plating solder (16) should be formed. Covered by resist (15). Also,
Since each exposed chemical plating (14) itself remains on the entire surface, each chemical plating (14) is in an electrically connected state.

(D) And the chemical plating (1
4), that is, as shown in FIG. 8, the chemical plating (14) is used as a plating lead to supply power from the plating current supply portion to expose between the plating resists (15). The solder plating (16) is applied on the existing chemical plating (14). That is, the plated solder (16) is formed on the exposed chemical plating (14) by the electrolytic solder plating method. The plated solder (16) can be formed as a solder layer having a desired amount of solder by setting the electrolytic solder plating conditions, for example, the current density and the plating time.

(E) When the formation of the plated solder (16) is completed, the plating resist (15) becomes unnecessary and is removed. It is sufficient to remove the plating resist (15) by using a general stripping solution. As a result, the chemical plating (14) is exposed except the portion where the plated solder (16) is formed.

(F) Finally, the chemical plating (14) exposed on the solder resist (13) is removed by etching.
The removal of the chemical plating (14) is performed with an etching solution such as an ammonium chloride aqueous solution which can selectively etch copper and solder.

As described above, the printed solder board (16) is exposed at a predetermined portion, and the other portions become the printed wiring board (10) protected by the solder resist (13).

(Example) Next, the method according to the present invention will be described with reference to specific examples.

First, an etching resist is laminated on a single-sided copper clad laminate using the glass / epoxy composite as the substrate (11),
After this is exposed and developed, the copper foil on the surface is etched with a cupric chloride solution to leave the copper foil at a desired position, thereby forming each conductor circuit (12).

Next, a solder resist ink which will be a solder resist (13) is printed on a portion other than the portion where the plated solder (16) is to be formed on each conductor circuit (12). Then, the solder resist ink is thermally cured to form a solder resist (13) ((a) in FIG. 1).

Chemical plating (14) is formed on each conductor circuit (12) and solder resist (13) formed as described above (first).
(B) of the figure). In this embodiment, the chemical plating (14) is copper.

Then, the plating resist (15) is formed so as to expose the portion where the plated solder (16) is to be formed ((c) in FIG. 1).

Electrolytic solder plating is performed while energizing the chemical plating (14) on the substrate (11) as described above to form plating solder (16) at desired locations (see (d) of FIG. 8
Figure).

After that, the unnecessary plating resist (15) is removed ((e) in FIG. 1) and the chemical plating (14) exposed on the surface is removed by etching ((f) in FIG. 1). is there.

(Effects of the Invention) As described in detail above, in the present invention, the solder layer (16) for mounting a component is provided on the conductor circuit (12) on the printed wiring board (10), A portion where a solder layer (16) of the conductor circuit (12) is to be formed by forming a solder resist (13) between the conductor circuits (12) formed on (11) and in a necessary portion of the conductor circuit (12). (B) a step of chemical plating (14) on the surface of the solder resist (13) and on the surface of the conductor circuit (12) exposed between the solder resist (13); The step of forming the plating resist (15) on the solder resist (13) which has been subjected to the chemical plating (14); plating using the chemical plating (14) layer formed in the steps (d) and (b) as a plating lead. The surface of the chemical plating (14) layer exposed from the resist (15) is electrolytically soldered. Step of removing the plating resist (15) formed in steps (e) and (c); Chemical plating (14) exposed in steps (f) and (e)
Since it was formed through each step of `` layer removal step '', chemical plating is applied to the entire surface before forming the plating resist, and this chemical plating is used as a lead for plating, which is used in the conventional method. The need for the plating lead by the conductor pattern is eliminated, and the layout of the conductor circuit can be freely designed.

Therefore, according to the present invention, there is provided a method capable of reliably and easily forming a solder layer used for mounting an electronic component without adversely affecting the high density of the conductor circuit on the printed wiring board. Can be provided.

[Brief description of drawings]

Each of (a) to (f) of FIG. 1 is a partially enlarged sectional view showing the method according to the present invention step by step, and FIG. 2 shows an aspect of each conductor circuit to be preformed on a substrate. FIG. 3 is a partially enlarged plan view, FIG. 3 is a partially enlarged cross-sectional view showing a state where the chemical plating formed on the solder resist is relatively thin, and the formed plating solder is melted, and FIG. It is a figure corresponding to FIG. 3, and is a partial expanded sectional view when the chemical plating formed on a solder resist is comparatively thick. FIGS. 5 to 7 show a conventional method.
(A) to (C) of the drawing are partially enlarged cross-sectional views showing the first method of forming a conventional solder layer in the order of steps, and FIG. 6 shows the mode of each conductor circuit to be preformed on a substrate. FIG. 7 is a partially enlarged plan view, and FIG. 7 is an enlarged plan view when a solder resist is formed on the one shown in FIG. FIG. 8 is a plan view of the state of FIG. Explanation of code 10 …… Printed wiring board, 11 …… Board, 12 …… Conductor circuit, 13 …… Solder resist, 14 …… Chemical plating, 15 …… Plating resist, 16 …… Plating solder (solder layer)

Claims (1)

[Claims] 1. A method for forming a solder layer in a printed wiring board, wherein a solder layer for mounting a component is formed on a conductor circuit on the printed wiring board through the following steps (a) to (f). (A) A step of forming a solder resist between the conductor circuits formed on the substrate and in a necessary portion of the conductor circuit to expose only a portion of the conductor circuit where a solder layer is to be formed; (b) Surface of the solder resist And a step of chemically plating the surface of the conductor circuit exposed between the solder resists; (c) a step of forming a plating resist on the chemically plated solder resists; (d) the step (b) A step of performing electrolytic solder plating on the surface of the chemical plating layer exposed from the plating resist by using the chemical plating layer formed in step (a) as a plating lead; (e) a step of removing the plating resist formed in the step (c) (F) a step of removing the chemical plating layer exposed in the step (e).