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JPH0680707B2 - Carrier tape - Google Patents
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JPH0680707B2 - Carrier tape - Google Patents

Carrier tape

Info

Publication number
JPH0680707B2
JPH0680707B2 JP24591589A JP24591589A JPH0680707B2 JP H0680707 B2 JPH0680707 B2 JP H0680707B2 JP 24591589 A JP24591589 A JP 24591589A JP 24591589 A JP24591589 A JP 24591589A JP H0680707 B2 JPH0680707 B2 JP H0680707B2
Authority
JP
Japan
Prior art keywords
lead
tape
gate
resin
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP24591589A
Other languages
Japanese (ja)
Other versions
JPH03106046A (en
Inventor
哲也 上田
興 下村
治 中川
誠次 竹村
一成 道井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP24591589A priority Critical patent/JPH0680707B2/en
Publication of JPH03106046A publication Critical patent/JPH03106046A/en
Publication of JPH0680707B2 publication Critical patent/JPH0680707B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

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  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体装置の製造工程で多数の半導体素子
を実装するのに使用するキヤリアテープに関する。
The present invention relates to a carrier tape used for mounting a large number of semiconductor elements in a semiconductor device manufacturing process.

〔従来の技術〕[Conventional technology]

近年、集積回路素子など半導体素子の電極接合技術とし
て、従来から広く使用されているワイヤボンデイング方
法に代つて、テープキャリアを用いた、いわゆるTAB(T
ape Autemated Bondein)方法が採用されてきた。
In recent years, the so-called TAB (T) using a tape carrier has been used instead of the wire bonding method that has been widely used in the past as an electrode joining technique for semiconductor elements such as integrated circuit elements.
ape Autemated Bondein) method has been adopted.

この種のTAB方法に用いる従来のキヤリアテープは、第
5図(a),(b)に示すように構成されていた。図は
テープキヤリアを示し、1はキヤリアテープで、帯状の
テープ本体2と、このテープ本体2上に形成された多数
のリード3とからなる。テープ本体2は、ポリアミド樹
脂などたわみ性をもち、絶縁性の合成樹脂からなり、幅
方向の中央部には半導体素子が配置される複数の中央孔
2aが間隔をあけて設けられ、中央孔2aの四周にはリード
支持部2bを介し、外部リード用孔2cが設けられ、各外部
リード用孔2c相互間は架橋部2dが設けられ、リード支持
部2bをつないでいある。テープ本体2の両側縁には長手
方向に所定の間隔で多数の位置決め送り孔2eが設けられ
ている。3は銅材など導電性金属材からなり、テープ本
体2面に付着形成された多数のリードで、内部リード支
持部2bから先端が中央孔2aに至る内部リード部3aと、外
部リード用孔2cをまたぐ外部リード部3bと、テープ本体
2に付着するテストパツド部3cとから形成されている。
A conventional carrier tape used in this type of TAB method has a structure as shown in FIGS. 5 (a) and 5 (b). The figure shows a tape carrier, and 1 is a carrier tape, which is composed of a strip-shaped tape body 2 and a large number of leads 3 formed on the tape body 2. The tape body 2 is made of an insulating synthetic resin having flexibility such as polyamide resin, and has a plurality of central holes in which semiconductor elements are arranged in the central portion in the width direction.
2a are provided at intervals, four holes of the central hole 2a are provided with external lead holes 2c via lead support portions 2b, and bridge portions 2d are provided between the external lead holes 2c to provide lead support. Connect part 2b. A large number of positioning feed holes 2e are provided at predetermined intervals in the longitudinal direction on both side edges of the tape body 2. 3 is a conductive metal material such as a copper material, and is a large number of leads attached and formed on the surface of the tape body 2. The inner lead portion 3a extends from the inner lead support portion 2b to the central hole 2a, and the outer lead hole 2c. It is formed of an external lead portion 3b straddling the tape and a test pad portion 3c attached to the tape body 2.

上記架橋部2dは、内部リード部3aの位置精度を高めるた
めのリード支持部2bを一体につなぐものである。
The bridging portion 2d integrally connects the lead support portions 2b for increasing the positional accuracy of the inner lead portions 3a.

このように構成されたキヤリアテープ1に、半導体素子
5を中央孔2a内にし、半導体素子5の各バンプ6が対応
する各内部リード部3aの所定位置に対向するように位置
決めし、バンプ6と内部リード部3aを熱圧着法で接合す
る。鎖線で示す14は、後工程で成形される樹脂封止体の
側周を表す。
In the carrier tape 1 configured as described above, the semiconductor element 5 is placed in the central hole 2a, and each bump 6 of the semiconductor element 5 is positioned so as to face a predetermined position of each corresponding inner lead portion 3a. The inner lead portion 3a is joined by thermocompression bonding. 14 indicated by a chain line represents a side circumference of the resin encapsulant molded in the subsequent step.

こうして構成されたテープキヤリアを、第6図(a)に
示すように、下金型8上に載せ半導体素子5部をキヤビ
テイ10に位置し、上金型7とで型締めする。上金型7に
はキヤビテイ9,ライナ11,ゲート12が設けられている。
この状態で、低圧トランスフア成形方向により、例えば
エポキシ樹脂など注入用樹脂をランナ11から各キヤビテ
イ9,10内に注入して硬化させる。A(第5図参照)はゲ
ート部における樹脂の注入方法を示す。こうして、第6
図(b)のように、成形された樹脂封止体13により半導
体素子5部が封止される。この状態から不要の樹脂部
(鎖線で示す)を除去し、テープ本体2を各単位ごとに
分割し、不要部を除去すると、複数の樹脂封止半導体装
置が得られる。
As shown in FIG. 6A, the tape carrier thus configured is placed on the lower mold 8 so that the semiconductor element 5 portion is located in the cavity 10 and clamped with the upper mold 7. The upper die 7 is provided with a cavity 9, a liner 11 and a gate 12.
In this state, an injection resin such as an epoxy resin is injected from the runner 11 into each of the cavities 9 and 10 and cured in the low pressure transfer molding direction. A (see FIG. 5) shows a resin injection method in the gate portion. Thus, the sixth
As shown in FIG. 3B, the semiconductor element 5 part is sealed by the molded resin sealing body 13. If unnecessary resin portions (shown by chain lines) are removed from this state, the tape body 2 is divided into units, and unnecessary portions are removed, a plurality of resin-sealed semiconductor devices can be obtained.

ところが、上記第6図のキヤリアテープ2では、注入樹
脂が充てん不要なリード用孔2cに入り、後で面倒な除去
作業を要していた。
However, in the carrier tape 2 of FIG. 6, the injected resin enters the unnecessary lead holes 2c and requires a troublesome removal work later.

これに対処し、従来の他の例として第7図に示すよう
に、キヤリアテープ2の架橋部2dにリード支持部2bに至
るゲート対応孔13を設けたものがある。
To cope with this, as another conventional example, as shown in FIG. 7, there is one in which a gate corresponding hole 13 reaching the lead supporting portion 2b is provided in the bridging portion 2d of the carrier tape 2.

第7図のように構成されたテープキヤリアを、第8図
(a)に示すように、下金型8に載せ半導体素子5部を
キヤビテイ10に位置し、上金型7で型締めする。つづい
て、エポキシ樹脂など注入用樹脂を、ランナ11から矢印
B方向(第7図参照)にゲート12のゲート対応孔15を経
てキヤビテイ9,10内に注入し硬化させる。こうして、第
8図(b)のように、成形された樹脂封止体13により半
導体素子5部が封止される。この状態から不要の樹脂部
(鎖線で示す)を除去し、テープ本体2を各単位に分割
し、不要部を除去すると、複数の樹脂封止半導体装置が
得られる。
As shown in FIG. 8 (a), the tape carrier configured as shown in FIG. 7 is placed on the lower die 8 so that the semiconductor element 5 portion is located in the cavity 10 and the upper die 7 clamps the die. Subsequently, an injection resin such as an epoxy resin is injected from the runner 11 in the direction of arrow B (see FIG. 7) through the gate corresponding hole 15 of the gate 12 into the cavities 9 and 10 to be cured. In this way, as shown in FIG. 8B, the semiconductor element 5 part is sealed by the molded resin sealing body 13. If unnecessary resin portions (shown by chain lines) are removed from this state, the tape body 2 is divided into units, and unnecessary portions are removed, a plurality of resin-sealed semiconductor devices can be obtained.

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

上記のような従来のキヤリアテープでは、金型内に樹脂
を注入すると、流入樹脂の圧力によりリード支持部2bが
曲がり変形したり、半導体素子5側へ変位してしまうと
いう問題点があつた。
The conventional carrier tape as described above has a problem that when the resin is injected into the mold, the lead supporting portion 2b is bent and deformed by the pressure of the inflowing resin, or is displaced to the semiconductor element 5 side.

このため、内部リード部3aが切断したり、内部リード部
3aとバンプ6との接合が離れたりし、特に、リード3数
の少ないキヤリアテープでは、これによる不良が多くな
つていた。
Therefore, the internal lead portion 3a may be cut off or
The joint between the bump 3 and the bump 3a is separated, and in particular, the carrier tape having a small number of leads 3 has many defects due to this.

この発明は、このような問題点を解決するためになされ
たもので、樹脂封止工程における内部リード部3aの切断
やバンプ6との離れなどの不良をなくするキヤリアテー
プを得ることを目的としている。
The present invention has been made to solve such a problem, and an object thereof is to obtain a carrier tape that eliminates defects such as cutting of the internal lead portions 3a and separation from the bumps 6 in a resin sealing step. There is.

〔課題を解決するための手段〕[Means for Solving the Problems]

この発明にかかるキヤリアテープは、テープ本体の外部
リード用孔間の架橋部又は外部リード用孔に設けた連結
部に、ゲート対応流路部を設け中央孔に連通させたもの
である。
In the carrier tape according to the present invention, a gate-corresponding flow path portion is provided in a bridge portion between the external lead holes of the tape body or a connecting portion provided in the external lead hole so as to communicate with the central hole.

〔作用〕[Action]

この発明においては、キヤリアテープを入れた金型内に
樹脂を注入すると、上金型のゲート部において、樹脂は
テープ本体に設けられた架橋部又は中央連結部に形成さ
れたゲート対応流路部を通り中央孔部に至りキヤビテイ
内に圧入され、樹脂の注入圧力がテープ本体のリード支
持部には、作用せず変形,変位が防止される。
In this invention, when the resin is injected into the mold containing the carrier tape, the resin at the gate part of the upper mold has the gate-corresponding flow path part formed in the bridge part or the central connecting part provided in the tape body. The resin is pressed into the cavity through the central hole, and the resin injection pressure does not act on the lead supporting portion of the tape body to prevent deformation and displacement.

〔実施例〕〔Example〕

第1図(a)及び(b)はこの発明の一実施例によるキ
ヤリアテープを用いたテープキヤリアの平面図及び断面
図であり、2a〜2e、3,3a〜3c,5,6,14は上記従来装置と
同一のものである。キヤリアテープ21のテープ本体22に
は、架橋部2dから中央孔2aに至るゲート対応流路部23が
切欠き形成され、先端側の幅が広げられ、流路断面積が
次第に大きくされ、樹脂が円滑に注入されるようにし、
注入圧力がリード支持部2bに影響を及ぼさないようにし
てある。
FIGS. 1 (a) and 1 (b) are a plan view and a sectional view of a tape carrier using a carrier tape according to an embodiment of the present invention, and 2a to 2e, 3,3a to 3c, 5,6,14 are This is the same as the above conventional device. The tape main body 22 of the carrier tape 21 is provided with a notch for the gate-corresponding flow passage 23 extending from the bridge portion 2d to the central hole 2a, the width on the tip side is widened, the flow passage cross-sectional area is gradually increased, and the resin is To ensure a smooth infusion,
The injection pressure does not affect the lead support portion 2b.

第1図(a)のゲート対応流路部23を第1図(c)に拡
大図で示す。
The gate-corresponding flow path portion 23 of FIG. 1 (a) is shown in an enlarged view in FIG. 1 (c).

第1図(b)のテープキヤリアを金型に入れた状態を第
2図(a)に断面図で示す。第1図(c)のIIb−IIb線
における断面図を第2図(b)に、IIc−IIc線における
断面図を第2図(c)に示し、いづれもテープキヤリア
が金型に型締めされている状態を図示している。
A state in which the tape carrier of FIG. 1 (b) is put in a mold is shown in a sectional view in FIG. 2 (a). A cross-sectional view taken along line IIb-IIb in FIG. 1 (c) is shown in FIG. 2 (b), and a cross-sectional view taken along line IIc-IIc is shown in FIG. 2 (c). In both cases, the tape carrier is clamped to the mold. The illustrated state is shown.

第1図のように構成されたテープキヤリアを、第2図
(a)のように、下金型8に載せ、上金型7とで型締め
する。このとき、上金型7のランナ11,ゲート12の周囲
の部分により、テープ本体22の架橋部2dの外部リード用
孔2c側、及びリード支持部2bの外部リード用孔2c側付近
は閉じられている。ゲート対応流路部23の周囲の架橋部
2dのうち、外部リード用孔2c側は上,下金型7,8の挾付
けにより、樹脂の外部リード用孔2cへの流出を防ぐとと
もに、ゲート対応流路部23の上,下も、上,下金型7,8
の面が壁となり、他への流出を防いでいる(第2図
b)。
The tape carrier configured as shown in FIG. 1 is placed on the lower mold 8 and clamped with the upper mold 7 as shown in FIG. 2 (a). At this time, the outer lead hole 2c side of the bridging portion 2d of the tape body 22 and the outer lead hole 2c side of the lead support portion 2b are closed by the peripheral portions of the runner 11 and the gate 12 of the upper mold 7. ing. Bridge around the gate-corresponding flow path 23
Out of 2d, the outer lead hole 2c side is sandwiched between the upper and lower molds 7 and 8 to prevent resin from flowing out to the outer lead hole 2c, and the upper and lower portions of the gate-corresponding flow path portion 23 as well. Upper and lower mold 7,8
The surface of is a wall, which prevents it from leaking to others (Fig. 2b).

この状態で、第2図(a)のように、低圧トランスフア
成形法により、エポキシ樹脂などの樹脂を矢印cのよう
に注入し、硬化させる。こうして、樹脂封止体13により
半導体素子5部が封止されたテープキヤリアを金型から
取出した状態を第2図(d)に示す。この状態から不要
の樹脂部(鎖線で示す)を除去し、テープ本体22を各単
位ごとに分割し、不要部を除去すると、複数の樹脂封止
半導体装置が得られる。
In this state, as shown in FIG. 2 (a), a resin such as an epoxy resin is injected as shown by an arrow c by the low-pressure transfer molding method and is cured. FIG. 2D shows a state in which the tape carrier in which the semiconductor element 5 is sealed by the resin sealing body 13 is taken out from the mold in this manner. From this state, unnecessary resin portions (shown by chain lines) are removed, the tape body 22 is divided into units, and unnecessary portions are removed, whereby a plurality of resin-sealed semiconductor devices are obtained.

第3図(a)はこの発明の他の実施例によるキヤリアテ
ープを用いたテープキヤリアの平面図である。テープ本
体22の外部リード用孔2cに、リード支持部2bを連結する
連結部24を設け、この連結部24に中央孔2aに至るゲート
対応流路部25を設け、先端側の幅が広げられている。上
記連結部24の外部リード用孔2cに対する位置は、図では
幅方向の中央にしたが他の位置にしてもよい。上金型7
のゲートは連結部24に対応する位置にしている。
FIG. 3 (a) is a plan view of a tape carrier using a carrier tape according to another embodiment of the present invention. The external lead hole 2c of the tape body 22 is provided with a connecting portion 24 for connecting the lead supporting portion 2b, and the connecting portion 24 is provided with a gate-corresponding flow passage portion 25 reaching the central hole 2a, so that the width on the tip side can be widened. ing. The position of the connecting portion 24 with respect to the external lead hole 2c is at the center in the width direction in the drawing, but may be at another position. Upper mold 7
The gate of is at a position corresponding to the connecting portion 24.

なお、上記ゲート対応流路部23,25は、テープ本体22を
貫通する切欠き状に形成したが、底を有する溝状に形成
してもよい。これを、第4図(a)及び(b)に平面図
及び断面図でゲート対応流路部26として示す。
Although the above-mentioned gate-corresponding flow path portions 23 and 25 are formed in a notch shape penetrating the tape body 22, they may be formed in a groove shape having a bottom. This is shown as a gate-corresponding flow path portion 26 in a plan view and a sectional view in FIGS. 4 (a) and 4 (b).

〔発明の効果〕〔The invention's effect〕

以上のように、この発明によれば、キヤリアテープのテ
ープ本体の外部リード用孔間の架橋部、又は外部リード
用孔に設けられたリード支持部へ至る連結部に、ゲート
対応流路部を設け中央孔に連通させ、このゲート対応流
路部上に上金型のゲートを位置させたので、テープキヤ
リアを入れた金型内に樹脂を注入すると、樹脂がゲート
対応流路部を通り中央孔に至りキヤビテイ内に圧入さ
れ、樹脂の注入圧力がテープ本体のリード支持部には作
用せず、変形,変位が防止され、内部リードの切断や内
部リード部とバンプの接合が離れたりすることがなくさ
れる。
As described above, according to the present invention, the gate-corresponding flow path portion is provided in the bridging portion between the external lead holes of the tape body of the carrier tape or in the connecting portion to the lead supporting portion provided in the external lead hole. Since the gate of the upper mold was located above this gate-corresponding flow passage, the resin was injected into the mold containing the tape carrier, and the resin passed through the gate-corresponding flow passage to the center. It reaches the hole and is pressed into the cavity, the resin injection pressure does not act on the lead support part of the tape body, deformation and displacement are prevented, the internal lead is cut and the internal lead part and the bump are separated. Will be lost.

【図面の簡単な説明】[Brief description of drawings]

第1図(a)はこの発明の一実施例によるキヤリアテー
プを用いたテープキヤリアの平面図、第1図(b)は第
1図(a)のI−I線における断面図、第1図(c)は
第1図(a)のゲート対応流路部の拡大図、第2図は
(a)は第1図(b)のテープキヤリアを金型に型締め
した断面図、第2図(b)及び(c)は第1図(c)の
IIb−IIb線及びIIc−IIc線における断面図で、金型に型
締めされている状態を示す。第2図(d)は第2図
(a)の状態から樹脂封止され取出された分割前の半導
体装置の断面図、第3図(a)はこの発明の第2の実施
例によるキヤリアテープを用いたテープキヤリアの平面
図、第3図(b)は第3図(a)のIII−III線における
断面図で、金型に型締めされた状態を示す。第4図
(a)及び(b)はこの発明の第3の実施例によるキヤ
リアテープを示すゲート対応流路部の平面図及び断面
図、第5図(a)は従来のキヤリアテープを用いたテー
プキヤリアの平面図、第5図(b)は第5図(a)のV
−V線における断面図、第6図(a)は第5図のテープ
キヤリアを金型で型締めした状態の断面図、第6図
(b)は第6図(a)の状態から樹脂封止され取出され
た分割前の半導体装置の断面図、第7図は従来の他のキ
ヤリアテープを用いたテープキヤリアの平面図、第8図
(a)は第7図のVIII−VIII線における断面図で金型に
型締めされた状態を示す。第8図(b)は第8図(a)
の状態から樹脂封止され取出された分割前の半導体装置
の断面図である。 2a…中央孔、2b…リード支持部、2c…外部リード用孔、
2d…架橋部、3…リード、3a…内部リード、3b…外部リ
ード、5…半導体素子、6…バンプ、7…上金型、8…
下金型、9,10…キヤビテイ、12…ゲート、13…樹脂封止
体、21…キヤリアテープ、22…テープ本体、23,25,26…
ゲート対応流路部、24…連結部 なお、図中同一符号は同一又は相当部分を示す。
FIG. 1 (a) is a plan view of a tape carrier using a carrier tape according to an embodiment of the present invention, FIG. 1 (b) is a sectional view taken along the line I--I of FIG. 1 (a), and FIG. (C) is an enlarged view of the gate-corresponding flow passage portion of FIG. 1 (a), and FIG. 2 (a) is a sectional view of the tape carrier of FIG. 1 (b) clamped in a mold, FIG. (B) and (c) of FIG. 1 (c)
It is sectional drawing in the IIb-IIb line and the IIc-IIc line, and shows the state clamped by the metal mold | die. 2 (d) is a cross-sectional view of the semiconductor device before division, which is resin-sealed from the state of FIG. 2 (a) and is taken out, and FIG. 3 (a) is a carrier tape according to the second embodiment of the present invention. FIG. 3 (b) is a plan view of the tape carrier using, and FIG. 3 (b) is a cross-sectional view taken along line III-III of FIG. 3 (a), showing a state where the die is clamped. FIGS. 4 (a) and 4 (b) are a plan view and a sectional view of a gate-corresponding flow path portion showing a carrier tape according to a third embodiment of the present invention, and FIG. 5 (a) uses a conventional carrier tape. A plan view of the tape carrier, FIG. 5 (b) is V of FIG. 5 (a).
6 is a cross-sectional view taken along line -V, FIG. 6 (a) is a cross-sectional view of the tape carrier of FIG. 5 clamped with a mold, and FIG. 6 (b) is a resin seal from the state of FIG. 6 (a). FIG. 7 is a plan view of a tape carrier using another conventional carrier tape, and FIG. 8A is a cross section taken along line VIII-VIII of FIG. The figure shows the mold clamped. FIG. 8 (b) is FIG. 8 (a).
FIG. 3 is a cross-sectional view of the semiconductor device before being divided, which is resin-sealed and taken out from the above state. 2a ... central hole, 2b ... lead support portion, 2c ... external lead hole,
2d ... Cross-linking part, 3 ... Lead, 3a ... Internal lead, 3b ... External lead, 5 ... Semiconductor element, 6 ... Bump, 7 ... Upper mold, 8 ...
Lower mold, 9,10 ... Cavity, 12 ... Gate, 13 ... Resin sealing body, 21 ... Carrier tape, 22 ... Tape body, 23,25,26 ...
Gate-corresponding flow path portion, 24 ... Connection portion In the drawings, the same reference numerals indicate the same or corresponding portions.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 竹村 誠次 兵庫県伊丹市瑞原4丁目1番地 三菱電機 株式会社北伊丹製作所内 (72)発明者 道井 一成 兵庫県伊丹市瑞原4丁目1番地 三菱電機 株式会社北伊丹製作所内 ─────────────────────────────────────────────────── ─── Continued front page (72) Inventor Seiji Takemura 4-1-1 Mizuhara, Itami-shi, Hyogo Mitsubishi Electric Corporation Kita-Itami Works (72) Inventor Issei Doi 4-1-1 Mizuhara, Itami-shi, Hyogo Mitsubishi Electric Corporation Kita Itami Works

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】たわみ性をもつ帯状の合成樹脂材からな
り、幅方向の中央部に長手方向に間隔をあけ配された複
数の中央孔と、この中央孔の四周をリード支持部を介し
て配された複数の外部リード用孔と、これら外部リード
用孔の相互間に残され上記リード支持部につながる架橋
部とが形成されたテープ本体、このテープ本体の上面に
付着形成され、内部リード部が上記リード支持部から上
記中央孔に至り、外部リード部が上記外部リード用孔を
またいだ複数のリードを備え、上記各内部リード部の先
端下面にバンプを介し半導体素子が接合されるようにさ
れており、上記架橋部又は上記外部リード用孔に長手方
向に形成されリード支持部につながる連結部に、上記中
央孔に通じるゲート対応流路部を形成し、上金型のゲー
ト下に対応するようにしたことを特徴とするキヤリアテ
ープ。
1. A plurality of central holes which are made of a flexible belt-shaped synthetic resin material and which are arranged at intervals in the longitudinal direction in the central portion in the width direction, and four circumferences of the central holes with a lead supporting portion interposed therebetween. A tape main body having a plurality of external lead holes and a bridge portion left between the external lead holes and connected to the lead support portion, and an internal lead attached and formed on the upper surface of the tape main body. A portion extending from the lead supporting portion to the central hole, the external lead portion includes a plurality of leads straddling the external lead hole, and the semiconductor element is bonded to the lower surface of the tip of each internal lead portion via a bump. In the connecting portion that is formed in the cross-linking portion or the external lead hole in the longitudinal direction and connects to the lead supporting portion, a gate-corresponding flow passage portion that leads to the central hole is formed, and below the gate of the upper mold. To respond Kiyariatepu, characterized in that it was.
JP24591589A 1989-09-20 1989-09-20 Carrier tape Expired - Fee Related JPH0680707B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24591589A JPH0680707B2 (en) 1989-09-20 1989-09-20 Carrier tape

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24591589A JPH0680707B2 (en) 1989-09-20 1989-09-20 Carrier tape

Publications (2)

Publication Number Publication Date
JPH03106046A JPH03106046A (en) 1991-05-02
JPH0680707B2 true JPH0680707B2 (en) 1994-10-12

Family

ID=17140730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24591589A Expired - Fee Related JPH0680707B2 (en) 1989-09-20 1989-09-20 Carrier tape

Country Status (1)

Country Link
JP (1) JPH0680707B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG115569A1 (en) * 2003-09-09 2005-10-28 Micron Technology Inc Tape substrates with mold gate support structures that are coplanar with conductive traces thereof and associated methods

Also Published As

Publication number Publication date
JPH03106046A (en) 1991-05-02

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