JPH0680877B2 - High-density mounting structure - Google Patents
High-density mounting structureInfo
- Publication number
- JPH0680877B2 JPH0680877B2 JP10948884A JP10948884A JPH0680877B2 JP H0680877 B2 JPH0680877 B2 JP H0680877B2 JP 10948884 A JP10948884 A JP 10948884A JP 10948884 A JP10948884 A JP 10948884A JP H0680877 B2 JPH0680877 B2 JP H0680877B2
- Authority
- JP
- Japan
- Prior art keywords
- electrical connection
- unit
- wiring
- mounting structure
- composite
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
- Combinations Of Printed Boards (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Description
【発明の詳細な説明】 技術分野 本発明は、回路素子および電子部品を立体の表面に三次
元的に配置し、かつこれらの間を三次元的に配線して、
高速度で電気信号の伝達が可能な実装構造に関する。TECHNICAL FIELD The present invention relates to three-dimensionally arranging circuit elements and electronic components on a three-dimensional surface and wiring three-dimensionally between them.
The present invention relates to a mounting structure capable of transmitting an electric signal at high speed.
従来技術と問題点 特開昭57−162396号の開示する高密度実装回路基板は、
通常の多層回路基板より厚い基板であって、この基板の
側面にも配線端を露出させて側面にも導体回路を形成
し、回路素子および部品を搭載することができる。この
基板は通常の基板が上面のみを使用していたのに対し
て、六面が使用できる。Conventional technology and problems The high-density mounting circuit board disclosed in Japanese Patent Laid-Open No. 57-162396 is
The board is thicker than a normal multilayer circuit board, and wiring ends can be exposed on the side surface of the board to form a conductor circuit on the side surface, and circuit elements and parts can be mounted. This substrate can use six sides, whereas a conventional substrate uses only the upper side.
発明の目的 本発明の目的は、上記高密度実装回路基板よりさらに高
密度化して、しかも配線距離をできるだけ短縮化した実
装構造を提供することである。OBJECT OF THE INVENTION It is an object of the present invention to provide a mounting structure which has a higher density than the above high-density mounting circuit board and has a wiring distance as short as possible.
発明の構成 本発明の上記目的は、直方体多層回路基板の上面，裏面
および側面の少なくとも１つの平面上に電気的接続端子
を有し、かつこの直方体の内部に、１つの上記平面上の
電気的接続端子を他の電気的接続端子に接続する配線を
有する直方体多層回路基板を単位構造とし、この単位構
造の複数個を相互に組合せて複合体とし、この複合体の
表面上に回路素子および電子部品を前記電気的接続端子
によって搭載し、かつこの複合体の内部を通して、前記
単位構造内の配線および単位構造間の電気的接続端子に
よって接続してあることを特徴とする、高密度実装構造
によって達成することができる。Structure of the Invention The above object of the present invention is to provide an electrical connection terminal on at least one plane of a top surface, a back surface and a side surface of a rectangular parallelepiped multilayer circuit board, and to provide an electrical connection on one of the planes inside the rectangular parallelepiped. A rectangular parallelepiped multilayer circuit board having wiring for connecting a connection terminal to another electrical connection terminal is used as a unit structure, and a plurality of the unit structures are combined with each other to form a composite, and a circuit element and an electronic device are formed on the surface of the composite. According to a high-density mounting structure, parts are mounted by the electric connection terminals, and are connected through the inside of the composite body by the wiring in the unit structure and the electric connection terminals between the unit structures. Can be achieved.
本発明の高密度実装構造は、第２図に示す単位構造を、
第１図に示す複合体に組み立てたものである。単位構造
は６面のいずれの面にも、必要に応じて、回路素子およ
び電子部品を実装することが可能である。このような単
位構造を３次元的に組み合わせた第１図の複合体（実装
構造）にあっては、各構造単位の面のうちの該複合体の
表面に露出される面はもちろん、該複合体の表面には露
出していない単位構造面にも、回路素子や電子部品を実
装することができるので、一般的に言って空間的により
多くの素子や部品を組み込むことが可能になる。The high-density mounting structure of the present invention has the unit structure shown in FIG.
It is assembled into the composite body shown in FIG. The unit structure can have circuit elements and electronic components mounted on any of the six surfaces as required. In the composite body (mounting structure) of FIG. 1 in which such unit structures are three-dimensionally combined, the surface of each structural unit exposed to the surface of the composite body is, of course, the composite surface. Circuit elements and electronic components can be mounted on the unit structure surface that is not exposed on the surface of the body, so that generally speaking, more elements and components can be spatially incorporated.
更に、本発明の高密度実装構造においては、同一の単位
構造に実装した電子部品などの相互間の配線は、この単
位構造内の配線を利用でき、また、異なる単位構造に実
装された電子部品などの相互間の配線は、相互に隣接し
た単位構造内の配線を経由して接続できることから、複
合体全体の配線を立体的に行うことができる。このこと
は、相互接続すべき素子や部品間の配線を空間的に最短
の経路で実現することができることを意味する。Further, in the high-density mounting structure of the present invention, the wiring within the unit structure can be utilized for the wiring between the electronic components mounted in the same unit structure, and the electronic components mounted in different unit structures can be used. Since the wirings such as the above can be connected via the wirings in the unit structures adjacent to each other, the wiring of the entire complex can be three-dimensionally performed. This means that the wiring between the elements or parts to be interconnected can be realized by the shortest path in space.
実施例 添付図面を参照して本発明の好ましい実施態様を説明す
る。第１図に示すように、高密度実装構造１は直方体多
層回路基板の単位構造２を三次元的に組合わせることが
好ましい。回路素子または電子部品3,4を単位構造の上
面または裏面または側面に搭載し、実装構造１内の図示
しない内部配線および接続端子によって接続する。第２
図は単位構造２の詳細を示す。単位構造２はスペーサ５
を介して相互に隣接させ、位置合わせ部材6,7で整合さ
せて、位置決めする。電気的接続端子８の上には、図示
しない回路素子または電子部品を搭載し、また電気的接
続端子８のあるものは、隣接する単位構造２をはんだ９
で相互に接着する。はんだ接着は、単位構造２を組合わ
せたもの全体を、はんだの溶融温度まで加熱して行なう
ことができる。Example A preferred embodiment of the present invention will be described with reference to the accompanying drawings. As shown in FIG. 1, the high-density mounting structure 1 is preferably a three-dimensional combination of unit structures 2 of a rectangular parallelepiped multilayer circuit board. The circuit elements or electronic components 3 and 4 are mounted on the upper surface, the back surface, or the side surfaces of the unit structure, and are connected by internal wiring and connection terminals (not shown) in the mounting structure 1. Second
The figure shows the details of the unit structure 2. Unit structure 2 is spacer 5
Are positioned adjacent to each other via the alignment members 6 and 7. A circuit element or an electronic component (not shown) is mounted on the electrical connection terminal 8, and in the case of the electrical connection terminal 8, the adjacent unit structure 2 is soldered 9
Adhere to each other with. The solder bonding can be performed by heating the entire combination of the unit structures 2 to the melting temperature of the solder.
発明の効果 本発明の高密度実装構造は、多数の回路素子または電子
部品を短かい配線長で配線することができ、しかも全体
の寸法を短小化することができる。EFFECTS OF THE INVENTION The high-density mounting structure of the present invention allows a large number of circuit elements or electronic components to be wired with a short wiring length, and the overall size can be shortened.
第１図は本発明の高密度実装構造の実施態様の斜視図で
あり、 第２図は本発明の高密度実装構造を構成する基本単位の
斜視図である。 １…高密度実装構造、２…単位構造、3,4…回路素子ま
たは電子部品、５…スペーサ、6,7…位置合わせ部材、
８…電気的接続端子、９…接着はんだ。FIG. 1 is a perspective view of an embodiment of the high-density packaging structure of the present invention, and FIG. 2 is a perspective view of a basic unit constituting the high-density packaging structure of the present invention. 1 ... High-density mounting structure, 2 ... Unit structure, 3,4 ... Circuit element or electronic component, 5 ... Spacer, 6,7 ... Alignment member,
8 ... Electrical connection terminal, 9 ... Adhesive solder.
Claims (2)
面の少なくとも１つの平面上に電気的接続端子を有し、
かつこの直方体の内部に、１つの上記平面上の電気的接
続端子を他の電気的接続端子に接続する配線を有する直
方体多層回路基板を単位構造として、この単位構造の複
数個を相互に組合せて複合体とし、この複合体の表面上
に回路素子および電子部品を前記電気的接続端子によっ
て搭載し、かつこの複合体の内部を通して、前記単位構
造内の配線および単位構造間の電気的接続端子によって
接続してあることを特徴とする、高密度実装構造。1. A rectangular parallelepiped multi-layer circuit board having electrical connection terminals on at least one plane of an upper surface, a back surface and a side surface,
A rectangular parallelepiped multilayer circuit board having wiring for connecting one electrical connection terminal on the above plane to another electrical connection terminal inside the rectangular parallelepiped is used as a unit structure, and a plurality of the unit structures are combined with each other. As a composite, a circuit element and an electronic component are mounted on the surface of the composite by the electrical connection terminals, and through the inside of the composite, by wiring in the unit structure and electrical connection terminals between the unit structures. High-density packaging structure characterized by being connected.
る、特許請求の範囲第１項記載の実装構造。2. The mounting structure according to claim 1, which is a composite body in which unit structures are three-dimensionally combined.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10948884A JPH0680877B2 (en) | 1984-05-31 | 1984-05-31 | High-density mounting structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10948884A JPH0680877B2 (en) | 1984-05-31 | 1984-05-31 | High-density mounting structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60254695A JPS60254695A (en) | 1985-12-16 |
| JPH0680877B2 true JPH0680877B2 (en) | 1994-10-12 |
Family
ID=14511515
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10948884A Expired - Fee Related JPH0680877B2 (en) | 1984-05-31 | 1984-05-31 | High-density mounting structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0680877B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2536175B2 (en) * | 1989-01-25 | 1996-09-18 | 日本電気株式会社 | Multilayer wiring structure |
| DE602006021151D1 (en) * | 2006-05-11 | 2011-05-19 | Corning Inc | Modular holding and connection system for microfluidic devices |
| AT512063B1 (en) * | 2011-10-31 | 2016-01-15 | Fronius Int Gmbh | POWER SOURCE AND METHOD FOR COOLING SUCH A POWER SOURCE |
| US9619000B2 (en) * | 2013-05-17 | 2017-04-11 | Nec Corporation | Board, board apparatus and method for interconnection of boards |
-
1984
- 1984-05-31 JP JP10948884A patent/JPH0680877B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60254695A (en) | 1985-12-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |