JPH0681279B2 - Video camera - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video camera, and more particularly to processing of the above information suitable for superimposing information such as characters and a normal captured image.

[Conventional technology]

Video cameras have become smaller, lighter, and have lower power consumption,
There is an increasing number of opportunities to record scenes etc. on VTRs by carrying a video camera at a resort.

On the recorded videotape, for example, if the information on where the recording was made is superimposed on the normal captured image,
There is a demand for a video camera that is convenient for viewing captured images later and is capable of capturing the images.

In order to perform the above-mentioned imaging, a storage means such as a well-known field memory is added to the video camera, and a video signal obtained by capturing a desired subject in advance is stored in the storage means. There is known a method of superimposing the above-mentioned storage signal on a video signal obtained by imaging.

FIG. 2 shows the above conventional example. In the figure, 1 is an image sensor, 2 is a signal processing circuit, 3 is a signal mixing circuit, 4 is a memory, and 5 is a video signal line. The photoelectric conversion signal output from the image pickup device 1 is processed by the signal processing circuit 2 such as blanking which is performed in a normal video camera,
Get the video signal. This video signal is used as an input signal (referred to as Si) of the memory 4, and any _{one of} address control signals A _{1 to} An and write / read (read / write) for determining an address (address) for writing / reading of the memory 4 is performed. Input signal S by read / write control signal R / W
The signal storing or recording i is output as the output signal S ₀ of the memory 4.

For example, the letter A as shown in FIG.
An image of a subject having the shape of is imaged, and a video signal 5 obtained at that time (5 is shown as a video signal line in FIG. 2, but the video signal is also represented for simplification of description) is stored in a memory. 4 and then, for example, an image of a flower subject as shown in FIG. 3B is picked up, and the output signal S ₀ of the memory 4 is mixed with the video signal 5 obtained at that time. It is possible to obtain a video output signal which is a reproduced image shown in FIG.

A more detailed description will be given with reference to FIG. FIG. 4 (a) mainly shows the signal waveforms when stored in the memory 4, and FIG. 4 (b) shows the signal stored in the memory 4 and the currently obtained video signal by the above operation. The signal waveforms in the case of mixing are mainly shown.

First, FIG. 4 (a) will be described. It is assumed that the subject has the shape of the letter A shown in FIG. 3A, and the image shown in FIG. 4A is formed on the image pickup device 1. At this time, the video signal 5 obtained by scanning the M-th row of the image sensor 1, that is, the memory input signal Si (M) has a waveform shown in the figure. If the memory 4 is to perform a write operation when the read / write control signal R / W is at “0” level (low level), the combination of the “1” level (high level) and “0” level of the address control signals A _{1 to} An. The memory input signal Si (M) is stored in the address determined by the matching. It is stored in the same manner when the other rows of the image sensor 1 are scanned, and eventually the video signal is stored in the memory 4 for one field period.

Next, assuming that the subject having the flower shape shown in FIG. 3B is imaged, the image shown in FIG. 4B is formed on the image sensor 1. In this case, the video signal 5 obtained by scanning the Mth row of the image pickup device 1 has a waveform shown in the figure. At this time, the address control signals A _{1 to} An have the same waveform as in FIG.
If the read / write control signal R / W is set to "1" level (the memory 4 performs a read operation), the memory output signal So (M) has the same waveform as Si (M) as shown in the figure. If this memory output signal So (M) and the currently obtained video signal 5 are mixed by the signal mixing circuit 3, the video signal output will have the waveform shown in the figure. It is possible to superimpose the captured image.

Similarly, when scanning the other l-th row (l = 1, 2 ...) In FIG. 4 (b), the same address control signals A _{1 to} An as in scanning the l-th row in FIG. 4 (a) are used. If you give, you can take repeated shots over the field period.

A synthetic circuit of this type is also disclosed in, for example, Japanese Patent Laid-Open No. 62-10995.

[Problems to be solved by the invention]

According to the above-mentioned conventional technique, a video signal of a desired subject can be stored in a memory, and a subject different from the subject can be overlaid. However, since the memory content once stored cannot be partially corrected, the overshot image of There is a problem that the reproduced image may be difficult to see.

The above problem will be described with reference to the drawings. As described above, the user of the video camera often overtakes information indicating a place such as a destination and a normal captured image at that place as described above. At that time, FIG. First, the signboard with the place name (○ × land) as shown in) is imaged and stored in the memory. However, letters and designs other than the place name (desired letter) to be stored in the general signboard are the fifth
They are arranged as shown in FIG. If the video signal of the image of this signboard is stored in the memory, the stored content becomes as shown in FIG. 5 (b). Therefore, when the landscape is overlaid with a person, the image becomes the image shown in FIG. 5C, and important parts such as the face of the person disappear from the image.

An object of the present invention is to enable partial correction of a video signal stored in a memory, eliminate unnecessary deletion of a video to be overlaid with a video stored in a memory, and play back a video overlaid. It is to make the picture easier to see.

[Means for solving problems]

The object is to provide a gate circuit (referred to as a gate circuit 1) in a path through which a video signal is input to the memory, and further to provide a gate different from the gate circuit in a path through which a memory read / write control signal is input. Circuit (Gating circuit 2)
And a gate signal generator for generating a gate signal synchronized with the vertical cycle or horizontal cycle of the video camera, and supplying the gate signal to the gate circuits 1 and 2.
This is achieved by switching the output signal of the gate circuit 1 from the video signal to the "1" level (high level) or the "0" level (low level), and causing the gate circuit 2 to write the memory.

[Action]

When the address of the memory storing an unnecessary video signal (for example, "Welcome" in FIG. 5 (b)) is selected by the address control signal, the level becomes, for example, "1", and the other addresses are set to the address control signal. The gate signal generator generates a gate signal that is at "0" level when selected by, and when the gate signal is at "1" level, the output signal of the gate circuit 1 is at "0" level (stored in the memory). It is assumed that the unnecessary video signal is at "1" level)
In addition, if the memory is written by the gate circuit 2 as described above, the storage signal at the address storing the unnecessary video signal is rewritten from the “1” level to the “0” level, and the unnecessary video signal is generated. It has been removed from memory. On the other hand, when the gate signal is at "0" level, the gate circuit 1 outputs a video signal, and if the gate circuit 2 performs a read operation on the memory, an unnecessary video of the video signals stored in the memory is generated. Except for signals, they are held in memory as they are.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. First
In the figure, 1 to 5 are the same as the conventional example in FIG.
Is a gate circuit, 8 is a gate signal generator, and 9 is a gate signal supply line (for simplification of description, 9 may be described below as a gate signal). Before explaining the operation, set the following conditions. Condition 1: It is assumed that the high level of the memory input signal Si is required to perform overshooting. For example, when a subject as shown in FIG. 5 (a) is imaged on the image sensor 1, the data of the address in which the character “◯ × land” is stored in the memory 4 is “1”.
Level. Therefore, the data of the address where the character "Welcome" which is unnecessary in the repeated photographing is stored in the memory 4 becomes "1" level as described later. Condition 2: The memory 4 performs a read operation when the read / write signal R / W 'is at "1" level and a write operation when it is at "0" level. It should be noted that the conditions described above have no essential relationship with the present invention and are for the purpose of making the description of the present invention easier to understand, and all the following examples will be described under the above conditions. The operation of FIG. 1 will be described below.

The gate circuit 6 outputs the video signal 5 as it is when the gate signal 9 is at "0" level, and outputs the "0" level signal when the gate signal 9 is at "1" level. The gate circuit 7 outputs the read / write control signal R / W as it is when the gate signal 9 is at "0" level, and outputs the "0" level signal when the gate signal 9 is at "0" level. Therefore, if the gate signal 9 is set to "0" level as shown in FIG. 6 (a), the video signal 5 can be stored in the memory 4 as in the conventional case.
At this time, for example, the unnecessary video signal 5 obtained by scanning the Mth row of the image sensor 1 is also stored. In a certain field period after performing the above scanning, FIG. 6 (b)
When the gate signal 9 is set to the "1" level so as to surround the unnecessary "1" level period of the video signal 5, the memory input signal Si is set to the "0" level and the read / write control signal is set to "0". Since it becomes "level", the data of the address of the memory 4 which has stored the "1" level of the video signal 5 is replaced with the "0" level. If the above operation is performed before and after the scanning of the M-th row, unnecessary "1" level data stored in the memory 4 is replaced with "0" level, and the video signal stored in the memory 4 becomes the 7th level. It is changed as shown in FIG. Therefore, the reproduced image of the overshooting shown in FIG. 5C is as shown in FIG. 7B, and the overshooting can be performed without losing important information such as the face of the person.

FIG. 8 shows a specific example of the gate circuit 6. In the figure, 10
Is an AND circuit, and 11 is an inverter circuit, both of which are well-known circuits. When the gate signal 9 is at "0" level, the output of the inverter circuit 11 becomes "1" level, and the video signal 5 is output from the AND circuit 10. When the gate signal 9 is at "1" level, the output of the inverter circuit 11 is at "0" level and the AND circuit 10 outputs "0" level regardless of the video signal 5.

The gate circuit 7 can be realized in the same manner as the concrete example of FIG. 8, and the video signal of the inputs of the AND circuit 10 may be changed to the read / write control signal R / W.

Next, a concrete example of the gate signal generating circuit 8 is shown in FIG.
In the figure, 12 is a well-known mono-multi vibrator (hereinafter abbreviated as mono-multi), and 13 is an AND circuit. P _H, respectively, P _V horizontal synchronizing signal, a vertical synchronizing signal. Although omitted in FIG. 1 for simplification of description, in the video camera, a horizontal synchronization signal of a horizontal period and a vertical synchronization signal of a vertical period are generated for signal processing or for driving an image sensor, We call them P _H and P _V. In addition,
As is well known, the video signal is synchronously separated and the horizontal sync signal P _H ,
Since the vertical synchronizing signal P _V can be generated, this may be used.

The mono-multi 121 generates a pulse G _H1 having a pulse width of τ ₁ with reference to the falling phase of the horizontal synchronizing signal P _H. The monomulti 122 generates a pulse G _H2 having a pulse width τ ₂ with reference to the falling phase of the pulse G _H1 . Therefore, by adjusting τ ₁ and τ ₂ , it is possible to generate a pulse G _H2 having an arbitrary pulse width in the horizontal scanning period. Next, Mono Multi 1
23 generates a pulse G _V1 having a pulse width τ ₃ with reference to the falling phase of the vertical synchronizing signal P _V. Mono Multi 124 is a pulse
A pulse G with a pulse width of τ _{2 based on} the falling phase of G _V1
Generate _V2 . Therefore, by adjusting τ ₃ and τ ₄ , it is possible to generate the pulse G _V2 having an arbitrary pulse width in the vertical scanning period. Therefore, if the AND circuit 13 takes the logical product of the pulse G _H2 and the pulse G _V2 , the gate signal 9 which becomes high level at any time in the field period.
Can be generated.

A more detailed description will be given with reference to FIG. In the figure, 14
Indicates a two-dimensional address of the memory 4, and is written so as to be compared with the light receiving surface of the image pickup device 1 shown in FIG. The gate signal 9 generated by the logical product of the pulse G _H2 and the pulse G _V2 becomes high level at the memory address in the shaded area, and the data in the memory address in the shaded area is changed to “0”. To be done.

FIG. 11 shows another embodiment. In the figure, 1 to 9 are first
Same as the embodiment shown in the figure, 14 is a switch circuit, 15 is a gate signal supply line (15 may be used in the following description as a gate signal), and 16 is an adder circuit. When the switch circuit 14 is connected to the a side, the gate signal 15 is equal to the gate signal 9, and when connected to the b side, the gate signal 15 is at "0" level. On the other hand, the gate signal 9 and the video signal output are always added by the adder 16 and output as a monitor signal output. Since the gate signal 9 is added to the monitor signal output, the gate signal 9 is "1".
Since the brightness level of the video signal at the time of the level has risen, it is possible to determine at which position on the screen the gate signal 9 is at "1 level." Therefore, first set the switch 14 to the b side, and the phase of the gate signal 9 If the pulse width is adjusted by τ ₁ to τ ₄ shown in FIG. 9 and then the switch 14 is set to the side a, the stored contents of the memory 4 can be changed by the adjusted phase and pulse width of the gate signal 9. It is easy to operate.

FIG. 12 shows still another embodiment. In the figure, 1 to 9 are the same as those of the embodiment shown in FIG. 1, 17 is a video signal switching circuit, 18 is a sync separation circuit, 19 is a video signal supply line (19 is a video signal, and will be described below. It may be used in). The video signal 1 generated by the video element 1 and the signal processing circuit 2 and another video signal (referred to as an input video signal: a video signal recorded on a video tape, for example) different from the video signal 5 are switched by the video signal switching circuit 17. The video signal 19 is supplied to the signal mixing circuit 3, the gate circuit 6 and the sync separation circuit 18. The sync separation circuit 18 performs well-known sync separation from the video signal 19 to generate a horizontal sync signal P _H and a vertical sync signal P _V.

First, the video signal switching circuit 17 is connected to the video signal 5 side, the video signal picked up by the image pickup device 1 is stored in the memory 4, and the stored contents are partially corrected as described above. After this,
The video signal switching circuit 17 is connected to the input video signal side, and the input video signal and the memory output signal So are mixed by the signal mixing circuit 3.

According to the present embodiment, the video signal recorded by the videotape can be superposed on the video signal captured by the image sensor 1, so that character information can be added when the videotape is edited, and the character can be added. You can enter only the necessary information.

The video signal switching circuit 17 may be arranged at the position shown in FIG. 12 or the position shown in FIG. 13 to obtain the same effect.

Further, in the embodiment of FIG. 11 also, the video signal switching circuit 17,
The same can be realized by using the sync separation circuit 18.

〔The invention's effect〕

According to the present invention, since the memory contents once stored can be partially modified, there is an effect that unnecessary loss of overlaid images is eliminated and a reproduced image can be easily viewed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a conventional example, FIG. 3 is a diagram showing a replay image of overlaid shooting according to the conventional example, and FIG. 4 is an operation of the conventional example. Illustration,
FIG. 5 is a diagram showing a replay image of overlaid shooting according to a conventional example, FIG. 6 is an operation explanatory diagram of FIG. 1, FIG. 7 is a diagram showing a replay image of overlaid shooting according to the present invention, and FIG. Part of the concrete circuit diagram of the embodiment shown in FIG. 9, FIG. 9 is another part of the concrete circuit diagram of the embodiment shown in FIG. 1, FIG. 10 is an operation explanatory diagram of FIG. 9, and FIG. FIG. 13 is a block diagram showing another embodiment of the present invention. 8 ... Gate signal generation circuit, 6,7 ... Gate circuit, R / W, R
/ W ′ …… Read / write control signal.

Claims (1)

[Claims] 1. A first video signal source including an image sensor, and a first video signal source.
Has an input terminal connected to the video signal source and an output terminal, transmits the signal of the input terminal to the output terminal in the first state, and regardless of the signal of the input terminal in the second state, A first gate circuit for generating a signal of a predetermined level at an output terminal, a memory for recording the output signal from the first gate circuit, an output terminal connected to a read / write control terminal of the memory, and a read / write control signal And an input terminal to which a signal is supplied to the output terminal in the first state, and a write signal is generated in the output terminal in the second state regardless of the signal from the input terminal. Two gate circuits, a synthesizing circuit for synthesizing the signal from the first video signal source and the signal read from the memory, and a control circuit for controlling the states of the first and second gate circuits. And a video camera.