JPH0682898B2 - Multilayer printed circuit board and manufacturing method thereof - Google Patents
Multilayer printed circuit board and manufacturing method thereofInfo
- Publication number
- JPH0682898B2 JPH0682898B2 JP60112244A JP11224485A JPH0682898B2 JP H0682898 B2 JPH0682898 B2 JP H0682898B2 JP 60112244 A JP60112244 A JP 60112244A JP 11224485 A JP11224485 A JP 11224485A JP H0682898 B2 JPH0682898 B2 JP H0682898B2
- Authority
- JP
- Japan
- Prior art keywords
- polyimide resin
- insulating film
- wiring conductor
- film
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Laminated Bodies (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は、多層配線回路基板、特にサーマルプリンタヘ
ッド、光プリンターヘッド、高集積高周波IC搭載用回路
基板等に用いられる、有機高分子絶縁膜を有する多層配
線回路基板に関する。DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to an organic polymer insulating film used for a multilayer wiring circuit board, particularly for a thermal printer head, an optical printer head, a circuit board for mounting a highly integrated high frequency IC, and the like. And a multi-layer printed circuit board.
(従来の技術) 近年の電子技術のめざましい発展に伴い、電子機器の小
型化、軽量化、及びその高性能化の要求は、ますます増
大し、それに伴い、装置部品の高集積化が積極的に計ら
れつつある。(Prior Art) With the remarkable development of electronic technology in recent years, demands for miniaturization, weight reduction, and high performance of electronic devices are increasing more and more, and accordingly, high integration of device parts is actively pursued. Is being measured by.
そして、この高集積化の方法としては、サーマルプリン
タヘッド、光プリンタヘツド及び高集積高周波IC搭載用
回路基板などの膜回路部品に多層配線基板を用いて集積
する手法が採用されている。As a method of high integration, there is adopted a method of using a multilayer wiring board for integration into a film circuit component such as a thermal printer head, an optical printer head and a circuit board for mounting a highly integrated high frequency IC.
現在、このような多層配線基板部品には小型化、高密度
化、及び高速信号伝送化の要求が強くあり、小型化・高
密度化の要求に対しては多層配線構造を、高速信号伝送
化の要求に対しては比誘電率の低い絶縁材料を用いるな
ど各種方法及び材料が採用されている。At present, there is a strong demand for miniaturization, high density, and high-speed signal transmission for such multilayer wiring board parts. In response to the demand for miniaturization and high density, the multi-layer wiring structure has been changed to high-speed signal transmission. In order to meet the requirement, various methods and materials such as using an insulating material having a low relative dielectric constant are adopted.
例えば、樹脂基板面に形成される配線層を有する多層配
線構造において、樹脂基板と配線層との接着性を改善す
るために、配線層と樹脂基板材との界面に、酸化アルミ
ニウム等の金属酸化物微粒子あるいはガラス粉末を混合
させたポリイミド系等の樹脂層を介在させた多層配線構
造が提案されている。For example, in a multilayer wiring structure having a wiring layer formed on the surface of a resin substrate, in order to improve the adhesiveness between the resin substrate and the wiring layer, a metal oxide such as aluminum oxide is formed at the interface between the wiring layer and the resin substrate material. A multilayer wiring structure has been proposed in which a resin layer such as a polyimide resin mixed with fine particles or glass powder is interposed.
(発明が解決しようとする問題点) しかしながら、小型化・高密度化された膜回路部品にあ
つては、一般に絶縁層を介して配線導体を二層以上重ね
た多層配線構造となっているため、各層間の接着強度
は、単層品に比べて充分強いことが必要であり、さもな
いと配線加工時及び熱処理時においてその界面から剥離
してしまう現象がしばしば発生する。(Problems to be Solved by the Invention) However, in a miniaturized and highly densified membrane circuit component, generally, it has a multilayer wiring structure in which two or more wiring conductors are stacked with an insulating layer interposed therebetween. The adhesive strength between the respective layers needs to be sufficiently higher than that of the single-layer product, otherwise the phenomenon of peeling from the interface frequently occurs during wiring processing and heat treatment.
また前記接着強度が充分でないと、成膜された配線導体
上にフォトレジストを塗布し膜加工する工程において、
フォトレジストが配線導体より浮き又は剥離を生じるこ
とがあり、そのため配線導体のエッチング時に、本来配
線として残すべき部分までも腐食してしまうと言った不
具合が発生する。If the adhesive strength is not sufficient, in the step of applying a photoresist on the formed wiring conductor and film-forming,
The photoresist sometimes floats or peels off from the wiring conductor, which causes a problem that the portion which should be originally left as wiring is corroded when the wiring conductor is etched.
これらはいずれも、界面における化学的結合が弱いため
と、下地面が充分に平坦化していて接着界面の有効面積
が十分でないことのために発生するものである。All of these occur because the chemical bond at the interface is weak and the effective area of the adhesive interface is not sufficient because the underlying surface is sufficiently flat.
また、絶縁層表面が充分に平坦である場合には、配線加
工時・熱処理時等において、絶縁層と配線導体との内部
応力が絶縁層によって吸収緩和されることがほとんどな
いため、膜の剥離やクラックの発生を招くという問題が
ある。When the surface of the insulating layer is sufficiently flat, peeling of the film occurs because internal stress between the insulating layer and the wiring conductor is hardly absorbed and relaxed by the insulating layer during wiring processing or heat treatment. There is a problem of causing cracks and cracks.
上記提案された公知の発明においては、ガラスや金属酸
化物の熱膨張係数は4〜8×10-6/℃であるのに対し
て、ポリイミド系樹脂の熱膨張係数は20〜50×10-6/℃
であって、両者間の熱膨張係数は大きく相違し、そのた
めガラスや金属酸化物が混合(充填)されたポリイミド
系樹脂に熱が加熱を受けるとポリイミド系樹脂とガラス
や金属酸化物との間に両者の熱膨張係数の相違に起因す
る熱応力が発生し、該熱応力によって配線層が剥離する
問題が生じる。In the proposed known invention, the coefficient of thermal expansion of glass or metal oxide is 4 to 8 × 10 −6 / ° C., whereas the coefficient of thermal expansion of polyimide resin is 20 to 50 × 10 −. 6 / ° C
However, the coefficient of thermal expansion between the two is very different, so that when heat is applied to the polyimide resin in which glass or metal oxide is mixed (filled), the polyimide resin and the glass or metal oxide are At the same time, thermal stress is generated due to the difference in thermal expansion coefficient between the two, which causes a problem that the wiring layer is separated by the thermal stress.
また、ガラスや金属酸化物はその誘電率が4.5〜10と高
いことから該ガラスや金属酸化物が混合されたポリイミ
ド系樹脂の誘電率も高くなり、その結果、配線層の信号
伝送速度が遅くなって、電気信号が高速で出し入れされ
る半導体素子等の搭載に制約を受けることとなる。Further, since the dielectric constant of glass or metal oxide is as high as 4.5 to 10, the dielectric constant of the polyimide resin mixed with the glass or metal oxide is also high, and as a result, the signal transmission speed of the wiring layer is slow. As a result, the mounting of semiconductor elements and the like, in which electric signals are taken in and out at high speed, is restricted.
(問題点を解決するための手段) 本発明は上記従来技術の問題点を解決するものであっ
て、すなわち本発明は、 (1)電気絶縁基板上に配線導体と有機高分子絶縁膜と
が多層形成された多層配線回路基板において、前記有機
高分子絶縁膜には、表面粗さが中心線平均粗さRaで1.5
〜0.5μmとなるように固形物微粒体が充填されてお
り、かつ前記有機高分子絶縁膜及び固形物微粒体は共に
ポリイミド系樹脂で構成されてなることを特徴とする多
層配線回路基板、及び (2)電気絶縁基板上に、ポリイミド系樹脂の固形物微
粒体が充填されたポリイミド系樹脂から成る有機高分子
絶縁膜と配線導体とを多層に形成することを特徴とする
多層配線回路基板の製造方法、である。(Means for Solving Problems) The present invention is to solve the above-mentioned problems of the prior art. That is, the present invention provides (1) a wiring conductor and an organic polymer insulating film on an electrically insulating substrate. In the multilayer printed circuit board formed in multiple layers, the surface roughness of the organic polymer insulating film is 1.5 at the center line average roughness Ra.
To 0.5 μm, the solid fine particles are filled, and the organic polymer insulating film and the solid fine particles are both made of a polyimide resin, and a multilayer wiring circuit board, (2) A multilayer wiring circuit board characterized in that an organic polymer insulating film made of a polyimide resin filled with solid particles of a polyimide resin and wiring conductors are formed in multiple layers on an electrically insulating substrate. Manufacturing method.
次に、セラミック、ガラス等の電気絶縁性基板上に電気
配線導体とポリイミド系樹脂絶縁膜層が形成される組み
合わせにおいて、前記ポリイミド系樹脂絶縁材料にそれ
と親和力の強い同質のポリイミド系樹脂固形物粒体を充
填、混合することによって得られる、表面粗化された絶
縁膜を有する本発明の多層配線回路基板についての説明
をする。Next, in a combination in which an electric wiring conductor and a polyimide resin insulating film layer are formed on an electrically insulating substrate such as ceramic or glass, the polyimide resin solid material particles of the same quality having a strong affinity with the polyimide resin insulating material. The multilayer printed circuit board of the present invention having a surface-roughened insulating film obtained by filling and mixing the body will be described.
まず、前記配線導体としては、アルミニウム(Al)、銅
(Cu)、金(Au)、銀−パラジウム(Ag−Pd)などの導
電体材料が用いられ、従来周知の厚膜手法や蒸着、スパ
ッタ、CVD等の薄膜手法によって成膜され、そして印刷
技術やフォトリソグラフィ技術により配線パターンが加
工される。First, as the wiring conductor, a conductive material such as aluminum (Al), copper (Cu), gold (Au), and silver-palladium (Ag-Pd) is used. The film is formed by a thin film method such as CVD, and the wiring pattern is processed by printing technology or photolithography technology.
ここにおいて、前記有機高分子絶縁材料としてはポリイ
ミド系樹脂の耐熱性・耐薬品性に優れた電気絶縁材料が
用いられ、また同電気絶縁材料に充填する固形物微粒体
としては前記ポリイミド系樹脂絶縁材料と親和力の強い
材料である前記高分子絶縁材料と同系質のポリイミド系
硬化樹脂固形物微粒体を用いることが好ましい。Here, as the organic polymer insulating material, an electric insulating material having excellent heat resistance and chemical resistance of a polyimide resin is used, and as the solid fine particles to be filled in the electric insulating material, the polyimide resin insulating material is used. It is preferable to use polyimide-based cured resin solid fine particles of the same type as the polymer insulating material, which is a material having a strong affinity with the material.
前記ポリイミド系樹脂絶縁材料に充填するポリイミド系
樹脂固形物微粒体のサイズについては、前記ポリイミド
系樹脂絶縁材料により形成された絶縁膜の上に電気配線
導体を成膜する場合、径が1〜15μm体積平均径が7μ
m程度又はそれ以下であると良好であり、そうすること
により、その絶縁膜に対する電気配線導体の段差被覆性
と電気配線導体をパターン加工するときに用いるフォト
レジスト膜の段差被覆性及び絶縁膜の膜厚ばらつきを抑
えることができる。なお、該固形物微粒体の充填量は10
〜35重量%であり、その形状は球状であっても、不定形
であってもかまわない。Regarding the size of the polyimide resin solid fine particles to be filled in the polyimide resin insulating material, when the electric wiring conductor is formed on the insulating film formed of the polyimide resin insulating material, the diameter is 1 to 15 μm. Volume average diameter is 7μ
It is preferable that the thickness is about m or less, and by doing so, the step coverage of the electric wiring conductor with respect to the insulating film, the step coverage of the photoresist film used when patterning the electric wiring conductor, and the insulation film It is possible to suppress variations in film thickness. The filling amount of the solid fine particles is 10
The content is ˜35% by weight, and the shape may be spherical or amorphous.
そして前記ポリイミド系樹脂固形物微粒体を充填したポ
リイミド系樹脂絶縁材料はスピンナー、ロールコータ、
印刷などの手法によって、電気絶縁基板上に形成された
電気配線導体上に成膜され、また従来周知のフォトリソ
グラフィ技術、印刷技術の採用によって上下電気配線導
体接続用スルーホール又は下層電気配線導体保護用パタ
ーンの形成が行われる。And the polyimide resin insulating material filled with the polyimide resin solid fine particles is a spinner, a roll coater,
A film is formed on the electric wiring conductor formed on the electric insulating substrate by a technique such as printing, and through the use of well-known photolithography technology and printing technology, the through holes for connecting the upper and lower electric wiring conductors or the lower layer electric wiring conductor protection The working pattern is formed.
ここで、前記固形物微粒体入りポリイミド系樹脂絶縁材
料の印刷技術による成膜と上下電気配線導体接続用スル
ーホール加工を同時に行う絶縁層形成法について述べ
る。即ち、電気絶縁性基板上に電気配線導体を形成した
後、メタルマスク又はPVA(ポリビニールアルコール)
マスクなどの耐溶剤性ステンレススクリーン製版を用い
てスクリーン印刷により該形成法を実施する。この際に
おいて、乾燥熱処理された絶縁膜の表面粗さは中心線平
均粗さ(JIS-B0601-1976)Raが1.5μm程かそれ以下に
なるように印刷加工を行うことが重要である。その理由
は、絶縁膜上に電気配線導体を成膜する場合と配線導体
上のフォトレジスト膜加工をする場合におけるそれぞれ
の膜の段差被覆性及び絶縁層膜厚のばらつきを抑えるた
めであり、表面粗さRaが1.5μmを超えると、第2図に
示すごとく、ポリイミド系樹脂固形物粒体2の一部がポ
リイミド系樹脂絶縁膜1及び電気配線導体層3面から突
出して露出し、その結果電気配線導体層3において断線
を生じる問題がある。Here, an insulating layer forming method in which the film formation of the polyimide-based resin insulating material containing solid fine particles and the through hole processing for connecting the upper and lower electric wiring conductors are simultaneously performed will be described. That is, after forming an electric wiring conductor on an electrically insulating substrate, a metal mask or PVA (polyvinyl alcohol)
The forming method is carried out by screen printing using a solvent-resistant stainless screen plate-making plate such as a mask. At this time, it is important to perform printing so that the surface roughness of the dry-heat treated insulating film has a center line average roughness (JIS-B0601-1976) Ra of about 1.5 μm or less. The reason is to suppress the unevenness of the step coverage and the insulating layer thickness of each film when forming the electric wiring conductor on the insulating film and when processing the photoresist film on the wiring conductor. When the roughness Ra exceeds 1.5 μm, as shown in FIG. 2, a part of the polyimide resin solid particles 2 is projected and exposed from the surfaces of the polyimide resin insulating film 1 and the electric wiring conductor layer 3, and as a result, There is a problem that the electrical wiring conductor layer 3 is broken.
表面粗さが0.5μmより低いと、膜層間の接着強度は小
さくなり、本発明が目的とする強固な接着強度の膜を有
する多層配線回路基板が得られない。If the surface roughness is less than 0.5 μm, the adhesive strength between the film layers becomes small, and the multilayer wiring circuit board having a film having a strong adhesive strength, which is the object of the present invention, cannot be obtained.
従って、表面粗さはRa0.5〜1.5μmの範囲が好適であ
り、この場合は第1図に示すごとき断面状態となる。Therefore, the surface roughness is preferably in the range of Ra 0.5 to 1.5 μm, and in this case, the cross sectional state is as shown in FIG.
本発明に係る絶縁膜の接着強度を確かめるため、中心線
平均粗さRaが0.2μm以下のポリイミド樹脂絶縁膜上に
アルミニウム(Al)の導電体材料を真空蒸着法により成
膜してフォトリソグラフィ技術によりパッドを形成し、
粘着性テープによる引張試験をしたところ、20%のパッ
ドが剥離を示した。これに対して、中心線平均粗さRaが
0.5〜1.5μmのポリイミド樹脂絶縁膜上に成膜されたア
ルミニウムはパッドの剥離を示さなかった(なお、この
ときのポリイミド乾燥熱処理条件は200℃×30分であっ
た)。In order to confirm the adhesive strength of the insulating film according to the present invention, a photolithography technique in which a conductor material of aluminum (Al) is formed by a vacuum deposition method on a polyimide resin insulating film having a center line average roughness Ra of 0.2 μm or less. To form a pad by
A tensile test with an adhesive tape showed that 20% of the pads showed peeling. On the other hand, the centerline average roughness Ra is
Aluminum deposited on the polyimide resin insulating film of 0.5 to 1.5 μm did not show peeling of the pad (note that the polyimide drying heat treatment condition at this time was 200 ° C. × 30 minutes).
(発明の効果) 本発明は以上記載したとおりの構成であることから、次
のような作用効果を奏するものである。(Effects of the Invention) Since the present invention is configured as described above, it has the following operational effects.
(a)ポリイミド系樹脂絶縁膜と同質のポリイミド系樹
脂固形物微粒体との親和性が優れ、両者は一体的に強固
に接着するため、外力が負荷されても前記固形物微粒体
がポリイミド系樹脂絶縁膜から外れることはなく、これ
によって配線導体をポリイミド系樹脂絶縁膜上に強固に
接着させることができる。(A) The polyimide resin solid film has excellent affinity with the polyimide resin solid fine particles of the same quality as the polyimide resin insulating film, and both adhere firmly to each other, so that the solid fine particles are polyimide-based even when an external force is applied. It does not come off from the resin insulating film, which allows the wiring conductor to be firmly adhered to the polyimide resin insulating film.
(b)ポリイミド系樹脂絶縁膜と同質の固形物微粒体の
両者に熱が印加されても両者の熱膨張係数は実質的に同
じであることから同樹脂絶縁膜内に熱応力を発生するこ
とがなく、該熱応力によってポリイミド系樹脂絶縁膜と
配線導体との間に剥離を発生することが殆どない。(B) Even if heat is applied to both the polyimide resin insulating film and the solid fine particles of the same quality, the thermal expansion coefficients of both are substantially the same, so that thermal stress is generated in the resin insulating film. In addition, the thermal stress hardly causes peeling between the polyimide resin insulating film and the wiring conductor.
(c)絶縁膜と固体物微粒体は同じポリイミド系樹脂か
ら成り、その誘電率が2.8〜3.5と小さいことからポリイ
ミド系樹脂固形物微粒体が充填されたポリイミド系樹脂
絶縁膜上に配線導体を形成すると、配線導体を伝送する
信号の伝送速度が高速となり、その結果、電気信号が高
速で出し入れされる半導体素子等の搭載に有利である。(C) Since the insulating film and the solid fine particles are made of the same polyimide resin, and the dielectric constant thereof is as small as 2.8 to 3.5, a wiring conductor is formed on the polyimide resin insulating film filled with the polyimide resin solid fine particles. When formed, the transmission speed of the signal transmitted through the wiring conductor becomes high, and as a result, it is advantageous for mounting a semiconductor element or the like in which electric signals are taken in and out at high speed.
(d)ポリイミド系樹脂絶縁材料にポリイミド系樹脂固
形物微粒体を充填し絶縁膜を表面粗化すると接着界面の
有効表面積が増加するためポリイミド系樹脂絶縁膜と上
層配線導体との界面における密着性が向上する。(D) Adhesion at the interface between the polyimide-based resin insulating film and the upper wiring conductor because the effective surface area of the adhesive interface increases when the polyimide-based resin insulating material is filled with the polyimide-based resin solid fine particles to roughen the surface of the insulating film. Is improved.
(e)さらに表面粗化されたポリイミド系樹脂絶縁膜上
の配線導体を加工するために使用するフォトレジストの
密着性も向上する。(E) Further, the adhesiveness of the photoresist used for processing the wiring conductor on the surface-roughened polyimide resin insulating film is also improved.
(f)ポリイミド系樹脂絶縁膜が表面粗化されることに
より配線導体加工・熱処理等を施しても同絶縁膜とその
上層の配線導体との内部応力を絶縁膜が吸収緩和するた
めそれぞれの膜の剥離やクラックの発生が抑えられる。(F) Since the surface of the polyimide-based resin insulation film is roughened, the insulation film absorbs and relaxes the internal stress between the insulation film and the wiring conductor above it even if the insulation film is processed or heat-treated. The occurrence of peeling and cracks can be suppressed.
第1図は本発明実施例の一部拡大断面図、第2図は実施
例から外れた同断面図を示す。 1:ポリイミド系樹脂絶縁膜 2:ポリイミド系樹脂固形物微粒体 3:電気配線導体層FIG. 1 shows a partially enlarged sectional view of an embodiment of the present invention, and FIG. 2 shows the same sectional view deviated from the embodiment. 1: Polyimide resin insulation film 2: Polyimide resin solid fine particles 3: Electrical wiring conductor layer
Claims (2)
縁膜とが多層形成された多層配線回路基板において、前
記有機高分子絶縁膜には、表面粗さが中心線平均粗さRa
で1.5〜0.5μmとなるように固形物微粒体が充填されて
おり、かつ前記有機高分子絶縁膜及び固形物微粒体は共
にポリイミド系樹脂で構成されてなることを特徴とする
多層配線回路基板。1. A multilayer printed circuit board in which a wiring conductor and an organic polymer insulating film are formed in multiple layers on an electrically insulating substrate, wherein the organic polymer insulating film has a surface roughness of center line average roughness Ra.
Is filled with solid fine particles so as to have a thickness of 1.5 to 0.5 μm, and both the organic polymer insulating film and the solid fine particles are made of a polyimide resin. .
形物微粒体が充填されたポリイミド系樹脂から成る有機
高分子絶縁膜と配線導体とを多層に形成することを特徴
とする多層配線回路基板の製造方法。2. A multi-layer wiring circuit characterized in that an organic polymer insulating film made of a polyimide resin filled with solid particles of a polyimide resin and a wiring conductor are formed in multiple layers on an electrically insulating substrate. Substrate manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60112244A JPH0682898B2 (en) | 1985-05-27 | 1985-05-27 | Multilayer printed circuit board and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60112244A JPH0682898B2 (en) | 1985-05-27 | 1985-05-27 | Multilayer printed circuit board and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61271897A JPS61271897A (en) | 1986-12-02 |
| JPH0682898B2 true JPH0682898B2 (en) | 1994-10-19 |
Family
ID=14581848
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60112244A Expired - Fee Related JPH0682898B2 (en) | 1985-05-27 | 1985-05-27 | Multilayer printed circuit board and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0682898B2 (en) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5619102B2 (en) * | 1973-05-18 | 1981-05-06 | ||
| JPS52149358A (en) * | 1976-06-08 | 1977-12-12 | Fujitsu Ltd | Multilayer wiring method |
| JPS58189271A (en) * | 1982-04-30 | 1983-11-04 | Toray Ind Inc | Ink for screen printing |
| JPS5845819A (en) * | 1982-08-23 | 1983-03-17 | Mitsubishi Electric Corp | Electrolytic machining device |
-
1985
- 1985-05-27 JP JP60112244A patent/JPH0682898B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61271897A (en) | 1986-12-02 |
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| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |