JPH0683380B2 - Deflection control circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a deflection control circuit suitable for a display capable of supporting a plurality of horizontal deflection frequencies.

[Conventional technology]

Conventionally, an AFC circuit having a wide pull-in range that superimposes the output of the frequency-voltage converter on the control voltage of the voltage-controlled oscillator is known as a low-frequency AFC circuit that can handle a plurality of horizontal deflection frequencies (Japanese Patent Publication No. 61-8628).

[Problems to be solved by the invention]

In the above conventional technology, since the control voltage of the voltage controlled oscillator is controlled by two systems of the AFC control system and the control system by the frequency voltage converter, there are multiple controls, and the control stability tends to decrease, and the adjustment time increases. No consideration was given to things such as doing.

Further, the above-mentioned conventional technique has a problem in that the collector voltage of the horizontal output transistor is overvoltage-proof when the synchronous oscillation state is changed to the free-run oscillation state, and the reliability is lowered.

The object of the present invention is to eliminate the above-mentioned drawbacks of the prior art, to make the control voltage of the voltage controlled oscillator controllable by a single-system control circuit, to facilitate stable adjustment, and to prevent the collector voltage of the horizontal output transistor from exceeding the withstand voltage. It is to provide a highly reliable deflection control circuit that does not occur.

[Means for solving problems]

The purpose of the above is to provide a free-run detection circuit in the AFC circuit whose pull-in range has been expanded by the digital phase comparator, charge pump circuit and active low-pass filter. This is achieved by switching the reference voltage of the deflection power supply circuit to the lowest voltage.

[Operation] The digital phase comparator sets one of the two outputs to the low level for the time corresponding to the phase difference between the two signals. The charge pump circuit converts this digital quantity into an analog quantity. The active low pass filter smoothes the output of this charge pump circuit. This method is characterized in that no matter how the oscillation frequency of the voltage controlled oscillator deviates from the input frequency, the oscillation frequency can always be the same as the input frequency as long as it is within the variable range of the control voltage of the voltage controlled oscillator. Therefore, the pull-in range can be expanded more than before, and a single system of control circuit can handle a plurality of horizontal deflection frequencies.

The output voltage of the free-run detection circuit is almost 0 while the horizontal synchronizing signal is input, but when the horizontal synchronizing signal is not input, the output voltage becomes higher than a certain threshold level. At this time, a switching circuit that switches the output voltage of the active low-pass filter that creates the control voltage of the voltage controlled oscillator to the maximum voltage operates. At the same time, a switching circuit that switches the output voltage of the reference voltage generation circuit that generates the reference voltage of the horizontal deflection power supply circuit to the lowest potential operates.

Now, the collector pulse Vcp of the deflection output transistor of the horizontal deflection circuit is expressed by the equation (1).

However, E _B is the power supply voltage of the horizontal deflection circuit, T _S is the scanning period, and T _B is the blanking period.

In the free run state, the control voltage of the voltage controlled oscillator is the highest voltage, so the oscillation frequency is the highest, that is, the scanning period T _S
Is the shortest. Further, the power supply voltage E _B at this time the horizontal deflection circuit, since the reference voltage of the horizontal deflection power supply circuit is a minimum, is the lowest.

Therefore, the collector pulse Vcp is lower than the normal state (for example, -10% lower).

Even if the horizontal synchronizing signal is input in this state, the oscillation frequency changes from the higher side to the normal value of the power supply voltage of the horizontal deflection circuit, so there is no problem of overvoltage of the collector voltage of the horizontal output transistor. .

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. First
In the figure, 1 is a horizontal sync signal input terminal, 2 is a digital phase comparator, 3 is an active low-pass filter, 4 is a voltage controlled oscillator, 5 is a horizontal drive / horizontal output circuit, 6 is a free-run detection circuit, and 7 is a reference voltage. A creating circuit, 8 is a power supply circuit, 9 is a charge pump circuit, 10 is a low-pass filter output voltage, 11 is a free-run detection circuit output voltage, 12 is a horizontal synchronizing signal, 13 is a reference voltage, and 47 is a waveform shaping circuit.

Next, the operation will be described with reference to FIG.

The digital phase comparator 2 compares the phase of the horizontal synchronizing signal 12 input from the horizontal synchronizing signal input terminal 1 with the signal obtained by waveform shaping the flyback pulse from the horizontal drive / horizontal output circuit 5 by the waveform rectifying circuit 47. , One of the two outputs is set to the low level for the time corresponding to the phase difference. The charge pump circuit receives the two outputs of the digital phase comparator 2 and exchanges the digital quantity with the analog quantity.

By applying the output voltage of this charge pump circuit to the voltage controlled oscillator 4 via the active low-pass filter 3, it is possible to perform AFC control in which the oscillation frequency of the voltage controlled oscillator 4 matches the frequency of the horizontal synchronizing signal.

Further, the output voltage 10 of the active low-pass filter 3 is added to the reference voltage generating circuit 7, and the reference voltage 13 proportional to the frequency of the horizontal synchronizing signal 12 is generated. By using this reference voltage 13 as the reference voltage of the power supply circuit 8 that creates the power supply voltage of the horizontal output stage of the horizontal drive / horizontal output circuit 5, the power supply voltage of the horizontal output stage is made proportional to the frequency of the horizontal synchronizing signal 12.

Horizontal raster size Sr is a horizontal deflection power source I _H , high voltage E _HV
Then, it is expressed by equation (2).

Further, the horizontal deflection current I _H is expressed by equation (3).

However, L _H is the inductance of the horizontal deflection coil, and _H is the horizontal deflection frequency.

From the above, when the high voltage is kept constant, the horizontal raster size can be kept constant regardless of the horizontal deflection frequency by making the power supply voltage of the horizontal deflection circuit proportional to the frequency. That is, it becomes possible to cope with a plurality of horizontal deflection frequencies.

The collector pulse of the horizontal output transistor is (1)
Since it is expressed by the formula, the voltage-controlled oscillator 4 during free running
The oscillation frequency and the setting of the reference voltage 13 of the power supply circuit 8 are the points at which the breakdown voltage of the collector voltage is not exceeded.

In FIG. 2, the free-run detection circuit 6 has a structure in which the output voltage becomes almost 0 while the horizontal synchronizing signal is input, and when the horizontal synchronizing signal is not input, the output voltage becomes higher than a certain threshold level. Has been done.

The output voltage 11 of the free-run detection circuit 6 is input to the active low-pass filter 3 and the reference voltage generation circuit 7, and each switching circuit operates by the input voltage above the threshold level, and the active low-pass filter 3 The output voltage 10 is switched to the highest potential V ₂ and the output voltage (reference voltage) of the reference voltage generating circuit 7 is switched to the lowest potential V ₄ . As a result, during free run, the horizontal oscillation frequency is set to the maximum oscillation frequency of this system and the power supply voltage of the horizontal output stage is set to the minimum voltage.

After that, even if the horizontal synchronizing signal 12 is input again, the oscillation frequency changes from the higher one and the power supply voltage changes from the lower one to the specified value, so that the problematic operation such as the breakdown voltage overshoot of the horizontal output transistor does not occur.

FIG. 3 is a detailed circuit diagram of the deflection control circuit of the present invention shown in FIG. In FIG. 3, the active low-pass filter 3 is composed of transistors 28, 29, a resistor 23, a capacitor 24 and the like. The reference voltage generating circuit 7 is composed of a transistor 40, an emitter follower 7 formed of a resistor 39, and a Zener diode 43. The free-run detection circuit 6 is a retriggerable mono multivibrator 34, a resistor
It is composed of a capacitor 31 and a capacitor 32, and is realized by setting the pulse width determined by the resistor 31 and the capacitor 32 to a value sufficiently larger than the period of the horizontal synchronizing signal.

When the horizontal synchronizing signal 12 is input, the output of the mono multivibrator 34 is at low level and the transistors 30, 3
7 is cut off, and has no influence on the low-pass filter 3 and the reference voltage generating circuit 7. When the horizontal sync signal 12 is no longer input, the mono multivibrator
The output of 34 becomes high level and the transistors 30 and 37 become conductive. When the transistor 30 becomes conductive, the transistors 28 and 29 are cut off, the input voltage of the voltage controlled oscillator rises to near the power supply voltage applied to the terminal 19, and the voltage controlled oscillator 4 oscillates at the maximum oscillation frequency. Further, the transistor 40 is cut off by the conduction of the transistor 37. As a result, the reference voltage 13 input to the power supply circuit 8 drops to a voltage determined by the Zener diode 43, and the power supply voltage of the horizontal deflection output stage drops to a voltage determined by this reference voltage.

FIG. 4 is a concrete circuit diagram of the digital phase comparator 2 and the charge pump circuit 9. 48 is a shaped flyback pulse input terminal, 49 is a NAND gate, 50 is an inverter, 51 is a P-channel MOS, FET, 52. Is N channel MOS, FET, 53
Is an output terminal of the charge pump circuit.

FIG. 5 is a specific circuit diagram of the free-run detection circuit 6 different from FIG. In FIG. 5, 55 is an RS flip-flop, 56 is a resistor, and 57 is a capacitor. The operation of this circuit will be described. The output Q of the RS flip-flop 55 is
While the horizontal synchronizing signal 12 is being input to the set input terminal, a pulse having a horizontal cycle is being generated. Since the pulse width of the retriggerable mono multivibrator 34 is set to a value sufficiently larger than the horizontal period, the output voltage of the free-run detection circuit is at low level. When the horizontal synchronizing signal 12 is no longer input, the output Q of the RS flip-flop 55 becomes low level, so that the output of the retriggerable mono multivibrator 34 becomes high level. From the above, it can be said that the free-run detection circuit 6 is operating.

〔The invention's effect〕

As described above, according to the present invention, in the deflection control circuit capable of supporting a plurality of horizontal deflection frequencies, the control voltage of the voltage controlled oscillator is controlled by only one AFC control system, so that the deflection is stable and easy to adjust. There is an effect that a control circuit can be provided. In addition, a free-run detection circuit is provided to switch the control voltage of the voltage controlled oscillator to the maximum voltage during free-run, and at the same time to switch the reference voltage of the horizontal deflection power supply circuit to the minimum voltage. There is no problem, and it has the effect of increasing reliability.

[Brief description of drawings]

FIG. 1 is a block diagram of a deflection control circuit showing an embodiment of the present invention, FIG. 2 is a time chart for explaining the operation of FIG. 1, and FIG. 3 is a specific circuit of the main part of FIG. Figure, 4th
FIG. 5 is a concrete circuit diagram of the digital phase comparator and the charge pump circuit, and FIG. 5 is a concrete circuit diagram different from FIG. 3 of the free-run detection circuit. 1 ... Horizontal sync signal input terminal, 2 ... Digital phase comparator, 3 ... Active low-pass filter, 4 ... Voltage controlled oscillator, 5 ... Horizontal drive / output circuit, 6 ... Free run detection circuit, 7 ... … Reference voltage generation circuit, 8 …… Power supply circuit, 9 …… Charge pump circuit, 10 …… Active low-pass filter output voltage, 11 …… Free run detection circuit output voltage, 12 …… Horizontal synchronization signal, 13 …… Reference voltage,
18 …… Flyback pulse input terminal, 19,20,21 …… Power supply terminal, 22,23,25,26,27,31,33,35,36,38,39 …… Resistor,
24,32 …… Capacitor, 28,29,30,37,40 …… Transistor, 34 …… Retriggerable mono multivibrator, 41…
… Horizontal deflection power supply output terminal, 42… Voltage control oscillator output terminal, 43… Zener diode, 44… Free-run detection circuit output terminal, 45… Capacitor, 46… Resistor, 47…
… Waveform shaping circuit, 48 ……… Shaping flyback pulse input terminal, 49 …… NAND gate, 50 …… Inverter, 51 …… P
Channel MOSFET, 52 …… N-channel MOSFET, 53 ……
Charge pump circuit output terminal, 54 ... power supply terminal, 55 ...
RS flip-flop, 56 ... Resistor, 57 ... Capacitor.

Claims (1)

[Claims] 1. A digital phase comparator for performing phase comparison between a horizontal synchronizing signal and a shaping signal of a flyback pulse of a horizontal output circuit, a charge pump circuit having an output of the digital phase comparator as an input, and the charge pump. In a deflection control circuit comprising an active low-pass filter having an output of the circuit as an input and a voltage controlled oscillator having an output of the active low-pass filter as an input, the output signal of the active low-pass filter is used as a reference of a horizontal output stage power supply circuit. A reference voltage creating circuit for creating a voltage and a free-run detecting circuit are provided, and the output signal of the free-run detecting circuit is input to the active low-pass filter and the reference voltage creating circuit, and the output of the active low-pass filter during free running. Depending on the voltage, the oscillation frequency of the voltage controlled oscillator is As becomes maximum frequency is because, also As the lowest voltage that is determined power supply voltage for horizontal output stage, deflection control circuit, characterized in that the active low-pass filter and a reference voltage generating circuit is controlled.