JPH0685578B2 - Television signal conversion circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to image quality conversion of a television signal, and more particularly to a signal conversion circuit suitable for a digital television having a field memory.

[Background of the Invention]

In recent years, television receivers have been developed and high quality images have been reproduced. Further, with the progress of digital circuit technology, a television receiver in which the video signal circuit of the conventional television receiver is replaced with a digital circuit has been realized. Along with this, various methods have been devised for processing television signals of the current system with higher image quality. The current method improves the horizontal resolution by introducing a comb filter, but does not improve the vertical resolution at all, and when the image is reproduced on a large screen, the scanning line structure is conspicuous. There was a problem that it would end up. The most effective method of solving this is to use a memory to double the number of scanning lines. As the signal interpolation method, a repetitive interpolation method in which the previous line information is used as an interpolation signal using a line memory, an average value interpolation method in which an average value of two adjacent line information is used as an interpolation signal, and one field is used using a field memory. There are a field interpolation method in which information delayed by a period is used as an interpolation signal, and a method in which those methods are combined. Known examples of these methods include JP-A-58-50863.

FIG. 1 shows a basic block diagram of the field interpolation method.
1 is an A / D converter, 2 is a field memory, 3 and 4 are line memories, 5 is a switch, 6 is a line memory read / write control circuit, and 7 is a D / A converter. Next, the circuit operation of the field interpolation method shown in FIG. 1 will be described. FIG. 2 shows the operations of the field memory and the line memory. First, an input signal (for example, a luminance signal) is input to the A / D converter 1 and output as a digital signal to the field memory 2 and the line memory 4. This signal is shown in FIG. FIG. 2B shows the output of the field memory 2. The output of the field memory 2 is input to the line memory 3 and stored as a signal delayed by one field from the signal stored in the line memory 4. The signals stored in the line memories 3 and 4 are read out twice as fast as in writing, and thus are repeatedly output twice within one horizontal scanning period. The outputs of the line memories 3 and 4 are shown in FIGS. 2 (c) and 2 (d). The outputs of the line memories 3 and 4 are switched by the switch 5, and the outputs of the line memories are alternately taken out like the signal shown in FIG. 2 (e).
By converting into an analog value by the D / A converter 7, a double speed horizontal scanning video signal whose horizontal scanning period is one half of the normal video signal can be obtained. Next, the operation of the field interpolation method on the screen of the television receiver will be described. Figure 3 (a) is NTSC
FIG. 3B shows a horizontal scanning line in the non-interlaced system in the double speed horizontal scanning. FIG. 4 is a rewriting of FIG. 3 on the time axis. FIG. 4 (a) shows the NTSC system, and FIG. 4 (b) shows the double speed horizontal scanning non-interlace system. This is A
The signal stored in the field memory 2 at the field time is read by the line memory 3 at the double speed at the writing time at the B field, and at the same time, the signal of the B field read at the double speed at the line memory 4. The signal alternately picked up by the switch 5 and shown as the central A + B field in FIG. 4 (b), namely A
The field signal is obtained as an interpolated B field signal. Similarly, the signal of the next field is obtained as the signal of the C field in which the signal of the B field is interpolated. With the obtained double speed horizontal scanning signal, the scanning line is not conspicuous even when the image is reproduced on a large screen. Also, flicker can be reduced.

However, in a VTR, tracking does not match during normal tape running (normal reproduction) and when the tape is stopped (special reproduction), so some noise occurs in one field. Therefore, this period is brought to V blanking so as to prevent noise from appearing on the screen. In this case, however, an additional vertical sync signal is inserted because it causes inconvenience in synchronous (particularly vertical sync) reproduction. Therefore, the signal waveform before and after vertical blanking has a signal waveform as shown in Fig. 10 (e) later, but depending on the model, as shown in Fig. 5, the period of the first field and the period of the second field may be different. Are not equal,
In addition, there may be a so-called non-interlaced scanning in which the scanning lines of the first field and the second field completely overlap each other. In this case, the signal of the previous field stored in the field memory 2 does not correspond to the signal of the current field, and there is a problem that flicker increases and image quality deteriorates when field interpolation is performed.

[Object of the Invention]

An object of the present invention is to detect a signal even if the length of one field period differs from field to field as in the special reproduction of a VTR, or if a non-interlaced scanning signal is input and perform signal interpolation. It is to prevent the image quality from deteriorating.

[Outline of Invention]

According to the present invention, in order to achieve the above object, an input signal is a signal which is constant for a normal one field period, or a signal which is not constant for a field period such as a VTR special reproduction, or is non-interlaced. Is provided using a vertical sync signal, a horizontal sync signal, and an equalizing pulse, and a circuit that uses the signal stored in the field memory as an interpolation signal and a line memory without using the field memory In the circuit that uses the stored signal as an interpolation signal, if the input video signal has a predetermined characteristic, use an interpolation method circuit that uses a field memory,
If the input video signal does not have a constant field period or is non-interlaced, an interpolation circuit that does not use a field memory is selected.

Example of Invention

An embodiment of the present invention is shown below in FIG. In the present embodiment, as an interpolation circuit using a field memory, an example in which the field memory is used only for determining an interpolation signal will be described. 1 is an A / D converter, 2 is a field memory, 5
Is a switch, 7 is a D / A converter, 8 is a 1H memory, 9 is an interpolation signal processing circuit, 10 is an interpolation signal, 11 and 12 are line memories, 1
Reference numeral 3 is a sync separation circuit, and 14 is a field interpolation control circuit. Next, the operation will be described. First, when a normal video signal having a constant field period is input as an input signal, the signal digitized by the A / D converter 1 is stored in the field memory 2 and the 1H memory 8 as a signal one field before and It is stored as a signal one line before, and is interpolated by the interpolation signal processing circuit 9 together with the current signal.
Is made. The interpolated signal 10 is input to the line memory 12 and the current signal is input to the line memory 11 for storage. The respective signals are read out at a speed twice as high as that at the time of input and are switched so as to be alternately output by the switch 5, and the D / A converter 7
Is converted into an analog value by and output as a double speed horizontal scanning video signal.

Next, signal processing when a video signal having a non-constant field period, that is, a VTR special reproduction image is input as an input signal will be described. The input signal is sync separated by the sync separation circuit 13, and the sync signal is input to the field interpolation control circuit 14. The field interpolation control circuit 14
The special reproduction mode of the VTR is detected, and the detected signal is output to the interpolation signal processing circuit 9. Upon receiving the detection signal, the interpolation signal processing circuit 9 creates an interpolation signal by a method that does not use the information in the field memory 2 as the interpolation method at that time. Thereafter, a double speed horizontal scanning signal is similarly obtained in the line memory.

The interpolation signal processing circuit 9 will be described with reference to FIG. FIG. 7 is a diagram showing the configuration of the interpolation signal processing circuit 9.
5, 16 is a signal comparator, 17 is an arithmetic circuit, 18 is a signal arithmetic circuit,
Reference numeral 19 is a field memory output signal, 20 is a 1H memory output signal, 21 is a current signal, and 22 is a field interpolation control signal. First, when the 1H memory output signal 20 and the current signal 21 are input to the signal comparator 15, the difference between them is output to the arithmetic circuit 17. Similarly, the 1H memory output signal 20 and the field memory output signal 22 are input to the signal comparator 16, and the difference therebetween is calculated by the arithmetic circuit 17
Entered in. The calculation circuit 17 calculates an interpolation method that obtains the optimum interpolation signal at that time from the input value, and outputs the signal to the signal calculation circuit 18. The signal calculation circuit 18 calculates and outputs an optimum interpolation signal 10 from the current signal 21, the signal one line before and the signal one field before. In addition, the arithmetic circuit 17 outputs a signal based on the field interpolation control signal 19 which uses an interpolation method without using a field memory. Here, a method of determining the interpolation signal will be described with reference to FIG. In this embodiment, the field memory signal is not used as a direct interpolation signal but is used as a determination signal for generating an interpolation signal from the previous line signal and the current signal. 8th
In the figure (a), the circles on the left side represent the signal of the previous field, the signal of the previous line on the upper side, the current signal on the lower side, and the interpolation signal on the center. Where ○ is a signal with high brightness,
When ⊚ is a signal having a low luminance and a signal having an intermediate luminance is used, an interpolating signal at a luminance change as shown in FIGS. 8B, 8C and 8D is as follows. First, in the case of the signal shown in the diagram (b), since the correlation between the signal of the previous field and the signal of the previous line is large, the signal of the previous line is used as an interpolation signal, and the signal of the previous field as shown in the diagram (c). If the phase of the signal and the signal of the previous line and the signal of the previous line and the current signal are not large, the current signal is used as the interpolation signal.
As shown in (d), when the correlation between the previous line and the current signal is small and the phase between the previous line signal and the previous field signal is not so small, the average of the previous line signal and the current signal is calculated. Interpolation signal. When the field interpolation control signal 19 is input, the front line signal is always used as the interpolation signal as an interpolation method that does not use the field memory signal. The interpolation signal is determined as described above.

Next, the field interpolation control circuit 14 will be described. FIG. 9 is a diagram showing the structure of the field interpolation control circuit 14.
Is a gate pulse generation circuit, 24 is a gate circuit, 25 is a counter, 26 is a comparator, 27 is a vertical synchronizing signal, and 28 is a synchronizing signal. FIG. 10 is a diagram showing an input video signal, a vertical synchronizing signal, and a circuit operation. The field interpolation control circuit
When a signal such as a VTR still image whose field period is not constant is input, an interpolation method that does not use a field memory, that is, a circuit that issues a signal to use the previous line signal as an interpolation signal This determination uses a method of detecting additional vertical synchronization. The operation will be described.

When the input signals are normal video signals and VTR still image playback signals (Figs. 10 (a) and (e), the vertical sync signals 27 ((b) and (f)) separated by the sync separation circuit are gated. The pulse signal is input to the pulse generation circuit 23 and generates a gate pulse signal delayed by τ shown in Fig. 10 (c) and Fig. 10 (g), respectively. (Figs. 10 (d) and (h)) are output to the counter 25. This signal contains an equalization pulse at the time of normal image input (Fig. 10 (d)), and VTR still image reproduction is performed. Sometimes, nothing is included ((h) in the figure.) If the output of the counter 25 is input to the comparator 26 and there is a count value above a certain value, the VTR
It is detected that the image is a still image, and the field interpolation control signal 19 is output.

According to this embodiment, in the special playback mode of VTR,
Since the field interpolation control signal is output and the interpolation is performed without using the field memory, the interpolation signal does not malfunction and good image quality can be obtained.

〔The invention's effect〕

According to the present invention, in the double speed horizontal scanning signal conversion using the field memory, the field memory is used when a signal having a constant period is input to a normal field, and the field memory is used when an input signal such as VTR special reproduction is used. Therefore, even if a signal that does not correspond to the information in the previous field and the current field is input, it is possible to obtain the double-speed horizontal scanning video signal without degrading the image quality due to the malfunction of the interpolation signal. is there.

[Brief description of drawings]

FIG. 1 is a basic block diagram of the field interpolation method, FIG. 2 is a block diagram showing the operation of the memory, FIG. 3 is a block diagram showing the scanning lines on the screen, and FIG. 4 shows the signals in the field interpolation method. 5 is a waveform diagram showing a signal having a difference in field period, FIG. 6 is a block diagram showing an embodiment of the present invention, FIG. 7 is a configuration diagram of an interpolation signal processing circuit, and FIG. FIG. 9 is a configuration diagram showing the operation, FIG. 9 is a configuration diagram of the field interpolation control circuit, and FIG. 10 is a waveform diagram showing the operation. 1 ... A / D converter, 2 ... Field memory 3, 4 ... Line memory, 7 ... D / A converter 9 ... Interpolation signal processing circuit, 10 ... Interpolation signal 14 ... Field interpolation control circuit 15, 16 ... Signal comparator , 17 ... Arithmetic circuit 18 ... Signal arithmetic circuit 23 ... Gate pulse generating circuit 24 ... Gate circuit 25 ... Counter 26 ... Comparator.

Claims (2)

[Claims] 1. A television receiver having a line memory and a field memory and converting a television signal of an interlaced scanning system into a double speed non-interlaced scanning system so that a VTR is special in a television receiver having a high image quality. A television signal conversion circuit, which is provided with a means for detecting that it is in a reproduction mode and does not use a field memory when it is detected as a special reproduction mode. 2. The television signal converting circuit according to claim 1, wherein the VTR special reproduction mode detecting means is provided with a circuit for detecting a horizontal synchronizing signal in a vertical synchronizing period. The television signal conversion circuit as set forth in claim 1.