JPH0690184B2 - Input state memory circuit using relay - Google Patents

Description

The present invention relates to an input state storage circuit using a relay,
Specifically, it stores the input state in measuring devices such as ultrasonic measuring devices and other measuring devices, and when an accident such as power failure occurs, the setting status of the input information before the power is cut off by the signal from the relay. The present invention relates to an input state storage circuit using a latching type electromagnetic relay (hereinafter referred to as a latching relay) that can be restored to the above.

[Prior Art] Conventionally, in various measuring devices, it is necessary to set the measurement sensitivity and the like when performing measurement, and in some measuring devices, the power of the device is cut off due to an accident, etc. There is a device that can automatically return the device to the original sensitivity setting state when it is recovered from the above. In such a device, in order to automatically return, the input state that is initially input is stored,
An input state storage circuit is provided for holding the power supply even if the power supply is cut off. The input state storage circuit in this case is as follows.

Mechanical input state setting circuit that uses an alternator type switch (this maintains the input state regardless of the power supply) Capacitance holding type input state storage circuit that uses a large capacitance (this Is maintained during power off for a certain period of time) Battery-backed storage circuit Magnetic recording type storage medium or storage circuit An ultrasonic measurement device can be used as a measurement device using such an input state storage circuit. .

The adoption is due to the fact that there are many combinations of operations for setting the appropriate measurement sensitivity, and the operations are difficult, and it is difficult to return to the original level. The measurement sensitivity in this case is to set the high-frequency amplification circuit gain for amplifying and detecting the echo reception signal built in the ultrasonic flaw detector or the pulser / receiver of the ultrasonic flaw detection circuit portion to an appropriate level. Is.

[Problem to be Solved] However, in such an ultrasonic measuring device in which the gain is set by the mechanical switch or the like, the number of control levels required to hold the numerical value at the time of setting ( For example, the number of switches increases in proportion to gain switching of 1, 2, ... Also, in the method of storing with a capacitor or the like, since the memory holding voltage decreases with the passage of time,
There is limited time, so it is not suitable for long-term memory. This also applies to the case of battery backup. On the other hand, the method (1) has an advantage that the above drawbacks can be eliminated. However, a special device such as a time storage device is required, and a special procedure is required for restoration.

Therefore, in the ultrasonic measuring device, in order to avoid the above-mentioned drawbacks, the latching relay often stores the state. However, in an input state storage circuit using a latching relay, the relay circuit is usually configured separately, a relay control circuit is required independently, and a circuit for detecting the relay state must be provided separately. Inevitably, the circuit configuration must be somewhat complicated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems of the prior art, and an object of the present invention is to provide an input state storage circuit using a latching relay and a relay capable of storing a state with a simple circuit configuration. .

[Means for Solving the Problem] In the configuration of the input state storage circuit using the relay of the present invention for achieving such an object, the state changes every time an external signal is received, and the power is turned on or restored. According to the state of the memory circuit, a latching type relay that switches the connection state according to the state of the memory circuit is provided, and a state signal corresponding to the state of the memory circuit is latched type relay. The data is obtained from the contact connection state of and is used as data for presetting.

[Operation] As described above, as a memory circuit whose state changes in accordance with a signal input by an external switch operation, for example,
A flip-flop is used, and a latching relay that operates according to the state of the flip-flop is provided. The state of the output signal of the latching relay is updated by switching the storage state of the flip-flop, and the state signal corresponding to this switching state is latched. Since it is held by the relay and supplied to the flip-flop, and this holding state is supplied as preset data of the flip-flop, the state corresponding to the change in the storage state of the flip-flop is simultaneously held in the latching relay. can do.

As a result, even if the power is cut off (during “OFF”) while the device is operating, the state held in the latching relay becomes the flip-flop state, and when the power is restored, the state before the power is turned off is the flip-flop state. Is set to Moreover, the input state storage circuit in this case can be configured by a simple circuit based on a storage circuit such as a flip-flop and a latching relay, and is an independent circuit, so that control from the device side is unnecessary. Moreover, since the state is stored by using the latching relay, the state is stable without being affected by the passage of time.

[Embodiment] An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of an input state storage circuit using a relay according to an embodiment of the present invention, and FIG. 2 is a timing chart explaining its operation.

In FIG. 1, reference numeral 10 denotes an input state storage circuit, which is a chattering prevention circuit 2 that receives an operation signal (input signal) of the input switch 1, and the input signal as a trigger signal via the chattering prevention circuit 2. Flip-flop 3 for receiving, Q of this flip-flop 3, relay drive circuit 4 for receiving output signal, latching relay 5, which operates by receiving output of relay drive circuit 4, flip-flop 3
A preset signal generating circuit 6 for generating a preset signal, and an inverter 7 for receiving a status signal from the latching relay 5 and setting data in the flip-flop 3 when the power is turned on or restored.
The output of the latching relay 5 (its "ON / OFF" state) is sent to the control circuit of the device.

Here, the chattering prevention circuit 2 generates a single high-level (hereinafter "H") pulse of a fixed length (see FIG. 2B) when the input switch 1 shown in FIG. 2A is pressed, The state of the flip-flop is changed at the rising timing. The output signal of the relay drive circuit 4 at the same time.
In addition, power is supplied from the relay drive circuit 4 to the latching relay 5 for a time corresponding to this pulse width.

The flip-flop 3 is a so-called JK flip-flop memory circuit that holds one of two states according to the operation of the input switch 1, and receives a state signal from the latching relay 5 to turn on the power. At this time (or when the power is restored), the flip-flop signal generating circuit 6 receives a pulse signal which becomes "H" after being at a LOW level (hereinafter "L") for a certain period of time, and data is set (data is loaded).
The preset signal generation circuit 6 outputs a preset pulse of the flip-flop 3 that rises with a delay (becomes "H") after maintaining the "L" state for a certain period from the rise of the power supply voltage at power-on or power-on. Send to.

The relay drive circuit 4 supplies a driving output corresponding to the Q of the flip-flop 3 and the output state to the latching relay 5 to drive the latching relay 5, and the latching relay 5 is, for example, a common contact point a and a terminal a. Two circuits, a changeover switch 5a for outputting a signal and a changeover switch 5b for generating a status signal, which switch connection between terminals b, are built in. Then, the changeover switch 5b sends data (a signal of set data) to the flip-flop 3 via the inverter 7. The a terminal of each switch is connected to the power supply voltage + Vcc of "H", and the b terminal is grounded to "L".

Next, the operation will be described with reference to FIG. 2. When the input switch 1 as an external operation switch is not operated, the output of the chattering prevention circuit 2 is "L" as shown in FIG. ". Now, assume that the flip-flop 3 receives a "L" signal on the set side S and a "H" on the reset side R as a status signal from the latching relay 5.
Signal is received and the data is "0". In this case, the Q output of the flip-flop 3 is
"L", output is "H" (see (c) and (d) in Fig. 2)
Has become. When the flip-flop 3 in which "0" is set receives the trigger signal from the chattering prevention circuit 2 next time, the state is changed and the data "1" is set.

In the state of the data "0", the switch of the latching relay 5 is, for example, the state detecting switch 5b is connected to the a terminal side, and the "H" level signal ((e) in FIG. 2) is generated. Then, it is input to the reset terminal R of the flip-flop 3, and the set terminal S receives a signal of "L" (see (f) in FIG. 2), that is, data "0", via the inverter 7. It has been entered. This state matches the state of the Q output of the flip-flop 3.

When the input switch 1 is operated in such a state, the input signal that becomes “L” is changed to the chattering prevention circuit 2.
The output “H” is applied to the flip-flop 3 as a trigger signal, and the flip-flop 3 is inverted to “0”.
Changes to "1" and data "1" is set. As a result, the Q output signal becomes "H" and the output signal becomes "L", and these are input to the relay drive circuit 4. And
The relay drive circuit 4 operates only for the duration of the pulse width in which the output of the chattering prevention circuit 2 is generated, and the relay drive circuit 4 sends the current output changed in the connection switching direction to the latching relay 5. The latching relay 5 performs a switching operation according to the output state of the relay drive circuit 4, and the connection state of the switches 5a and 5b is switched.

As a result, whether the connection state of the switch 5b for generating the state signal is a
Switching from the terminal to the terminal b, the "L" signal is supplied to the reset side R of the flip-flop 3, and the "H" signal of the data "1" is sent to the set side S. In this way, the latching relay 5 outputs the same status signal as the Q output signal of the flip-flop 3.

The state signal from the latching relay 5 is used as a preset signal facing the flip-flop 3. Even if the power is cut off in this state, when the power is turned on again, the preset signal from the preset signal generating circuit 6 causes the flip-flop to flip. The state signal from the latching relay 5 is preset in the pull-down circuit 3. That is,
In the above case, when the flip-flop 3 is "1", the power is cut off, and the power is restored, the latching relay 5 transfers the data "1""H" to the set side S of the flip-flop 3. Since the signal is transmitted, the flip-flop 3 is set to "1" and returns to the previous state.

The terminals 7 and 8 in FIG. 1 are output terminals indicating the flip-flop state to the outside or the state of the latching relay 5, and are terminals connected to the c terminals of the switches 5a and 5b of the latching relay 5. . This may be provided as a plurality of terminals, and if a plurality of switches are further provided, a plurality of switches may be provided corresponding to each.

As described above, in the embodiment, the two states are selected by using the flip-flops, but it is possible to set a large number of states by using the n-ary counter instead of the flip-flops. A large number of latching relays may be controlled correspondingly. Also,
In this case, the corresponding latching relay may be driven by the output obtained by decoding the value of the n-ary counter, or the output of the relay circuit may be encoded and used as the preset data of the counter.

In the embodiment, the output of the input state is taken from the contact of the latching relay, but it goes without saying that it may be taken from the flip-flop.

Further, in the embodiment, the chattering prevention circuit is used, but if the flip-flop is configured by using a relay corresponding to the chattering prevention circuit, the flip-flop is unnecessary, and the input information storage circuit does not necessarily depend on the flip-flop. May be.

When the flip-flop is replaced with a relay, chattering due to switch input is absorbed in driving the relay, so that the chattering prevention circuit becomes unnecessary. Further, since the input switch side may be an electronic circuit instead of a switch, chattering prevention is unnecessary in such a case as well. Further, if the data setting timing at the time of turning on the power or at the time of returning the power is not a problem, the preset timing generation circuit is not necessary, and a simpler circuit configuration can be realized.

The present invention is not limited to the measuring device and is applied to a state storage circuit that stores an input state by key input (or switch input) or an input state by an electronic circuit of various electronic devices including various control devices. However, the present invention is not limited to the examples.

[Effects of the Invention] As can be understood from the above description, the state storage circuit of the present invention can be configured by a simple circuit based on a storage circuit such as a flip-flop and a latching relay, and is an independent circuit. Since the control from the device side is unnecessary and the state is stored by using the latching relay, the state is not affected by the passage of time,
It will be stable.

[Brief description of drawings]

FIG. 1 is a block diagram of an input state storage circuit using a relay according to an embodiment of the present invention, and FIG. 2 is a timing chart explaining its operation. 1 ... Input switch, 2 ... Chattering prevention circuit, 3 ... Flip-flop, 4 ... Relay drive circuit, 5 ... Latching relay, 6 ... Preset signal generation circuit.

Claims (1)

[Claims] 1. The state changes each time an external signal is received,
A state corresponding to the state of the storage circuit, which has a storage circuit in which data in a predetermined state is preset in response to power-on or power-on, and a latching relay that switches a connection state according to the state of the storage circuit. An input state storage circuit using a relay, wherein a signal is obtained from a contact connection state of the latching type relay and used as data for the preset.