JPH0690671B2 - How to access I/O devices - Google Patents

Description

[Detailed Description of the Invention] Overview The object of this invention is to provide an access method for an input/output device of a computer system employing a direct memory access method, in which a physical input/output command is issued to a channel device in response to an input/output request from an application program, an interrupt from the channel device is received, an interrupt vector table is referenced, control is passed to an interrupt processing routine of the relevant level, and the interrupt processing routine is referenced to a device management table to start an interrupt processing unit. In this access method for an input/output device of a computer system employing a direct memory access method, the interrupt processing unit rewrites the address of the interrupt processing routine of the relevant level in the interrupt vector table to the top address of the interrupt processing unit currently being executed, and in response to an interrupt from the channel device, control is passed directly to the interrupt processing unit, and simultaneously with the completion of the input/output processing, the address of the relevant level in the interrupt vector table is restored to the address of the original interrupt processing routine.

FIELD OF THEINVENTION The present invention relates to a method for accessing an input/output device of a computer system that employs a direct memory access method.

When trying to use a computer system efficiently,
The problem is the imbalance in the operation time between calculations and input/output devices such as floppy disks. Input/output operations are extremely slow compared to the processing speed of the central processor unit (hereafter referred to as CPU) because they involve mechanical operations. This means that if there is an input/output command in the middle of a program execution, the CPU
Because U becomes idle, systems that use a direct memory access method that has a channel device or the like that is functionally independent of the CPU are widely used. When the CPU instructs the channel device to start an I/O operation, it takes out and executes other instructions until there is an I/O completion interrupt from the channel device, so the CPU does not become idle and processing can be performed efficiently.

Furthermore, in real-time systems such as firefighting equipment dispatch management systems and seat reservation systems, which receive data generated at a remote location, process it instantly, and send back the results, there are strict requirements for response time, and there is a demand for more efficient and faster input/output processing, such as processing after an interrupt from the channel devices mentioned above.

2. Description of the Prior Art FIG. 2 shows a method of accessing an input/output device in a computer system employing a conventional direct memory access method.

When the application program 10 uses the I/O device 12, the OS
An I/O request 18 is issued to an I/O execution unit 16 via a schedule management unit 14 which manages the schedules of each task in the operating system. The I/O execution unit 16 checks the status of the I/O device 12 in response to the issued I/O request 18, and if the I/O device 12 is being used by another task, it is allowed to use it, and if it is available, it issues a physical I/O command 20 to a channel device 22 which controls the I/O device 12, thereby starting the I/O operation.

The channel device 22 transfers data between the input/output device and the main memory in a predetermined unit (512, 1024 for floppy disks, etc.).
When the transfer is completed, an interrupt signal 24 is sent to the CPU, and control is passed to the interrupt processing routine 26 of the relevant level by referring to an interrupt vector table 30 in which addresses 28 of interrupt processing routines 26 corresponding to each interrupt level are stored (arrow 32).

In the interrupt processing routine 26, an interrupt processing unit 34 is started by referring to a device management table in which the addresses of the interrupt registers and the addresses of the interrupt processing units are stored for each I/O device or for each group of I/O devices (arrow 3).
6). The interrupt processing unit 34 performs processing 37 for the interrupt, such as clearing the interrupt register, and checks whether the I/O for the I/O request 18 of the application program 10 has been completed. If it has been completed, it notifies the I/O execution unit 16, which is waiting for the completion of the I/O, of the completion (arrow 38). Next, control is returned to the interrupt processing routine 26 (arrow 40), and the interrupt processing routine 26 returns to the schedule management unit 14 (arrow 42). The schedule management unit 14 checks the priority of this I/O processing relative to other tasks waiting to be executed, and if the priority of the I/O processing is higher, it passes control back to the I/O execution unit 16.

The I/O execution unit 16 checks whether I/O completion has been notified, and if so, notifies the application program of completion (arrow 44). If I/O completion has not been notified, the I/O execution unit 16 again issues a physical I/O command 20 to the channel device 22, and the same processing steps are then carried out to fulfill the I/O request from the application program 10.
The input/output process is executed by repeating these steps until the input/output to the host 18 is completed.

Problems that the Invention is intended to Solve However, in the method of accessing input/output devices in a computer system that uses the conventional direct memory access method described above, there was a problem that processing in interrupt processing routines, such as referencing the device management table, took time, making input/output processing slow.

The present invention has been made in view of the above points,
The object is to provide a method of accessing an input/output device which enables high-speed input/output processing.

Means for Solving the Problems FIG. 1 is a diagram showing the principle of an access method for an input/output device of a computer system employing a direct memory access method according to the present invention.

When the application program 50 uses the I/O device 52, the OS
An I/O request 58 is issued to an I/O execution unit 56 via a schedule management unit 54 which manages the schedule of each task. In response to the issued I/O request 58, the I/O execution unit 56 checks the status of the I/O device 52, and if the I/O device 52 is being used by another task, it puts it on hold, and if it is available, it issues a physical I/O command 60 to a channel device 62 which controls the I/O device 52, thereby starting the I/O operation.

The channel device 62 transfers data between the input/output device and the main memory in a predetermined unit (512, 1024 for floppy disks, etc.).
When the transfer is complete, the CPU sends an interrupt signal 64 to the
At the same time, the CPU 11 refers to an interrupt vector table 70 in which addresses 68 of interrupt processing routines 66 corresponding to each interrupt level are stored, and passes control to the interrupt processing routine 66 of the corresponding level (arrow 72).
Then, the interrupt processor 74 corresponding to the I/O device is started by referring to a device management table in which the addresses of the interrupt registers and the addresses of the interrupt processors are stored for each I/O device or for each group of I/O devices (arrow 7).
6). The interrupt processing unit 74 first checks the interrupt vector table 7
Address 68 of interrupt processing routine 66 of level 0
to the top address of the currently executing interrupt processing unit 74 (see 78), performs processing for the interrupt such as clearing the interrupt register (see 80), checks whether the I/O processing for the I/O request 58 by the application program 50 is complete, and if it is complete, restores the corresponding address 68 in the interrupt vector table 70 to the address of the original interrupt processing routine 66 (see 82), and notifies the I/O execution unit 56, which is waiting for the completion of the I/O, of the completion (arrow 84). Next, control is passed to the interrupt processing routine 66 (arrow 86), and the interrupt processing routine 66 returns to the schedule management unit 54 (arrow 88). The schedule management unit 54 checks the priority of this I/O processing relative to other tasks waiting to be executed, and if the priority of this I/O processing is higher, passes control back to the I/O execution unit 56.

The I/O execution unit 56 checks whether or not I/O completion has been notified, and if so, notifies the application program 50 of completion (arrow 90), and if not, issues the physical I/O command 60 to the channel device 62 again.

Channel device 62 sends interrupt signal 64 to the CPU, and when it refers to interrupt vector table 70, it finds that the address of the relevant level has been rewritten to the top address of interrupt processing unit 74 that executed immediately before, so control is passed to interrupt processing unit 74 (arrow 92). Similar processing is repeated thereafter until input/output processing for input/output request 58 from application program 50 is completed, thereby achieving high-speed input/output processing.

According to the present invention, processing is performed in response to an I/O request from an application program, and the address of the corresponding level in the interrupt vector table is rewritten in the interrupt processing unit to the top address of the currently executing interrupt processing unit, and when the I/O is completed, the address is restored to the address of the original interrupt processing routine. Therefore, when the second or subsequent processing is performed, the I/O execution unit issues a physical I/O command,
After the channel device has completed a specified process, the control is handed over directly to the interrupt processing unit without going through the interrupt processing routine by referring to the interrupt vector table, so that reference to the device management table, which is executed in the interrupt processing routine, can be omitted, and the speed of input/output processing can be improved.

EFFECT OF THE PRESENT DISCLOSURE The present invention is configured as described above in detail, and therefore has the effect of making it possible to skip a part of the input/output processing, thereby speeding up the input/output processing.

[Brief description of the drawings]

1 is a diagram for explaining the principle of the present invention, and FIG. 2 is a diagram for explaining the prior art. 10, 50: application program, 12, 52: input/output device, 14, 54: schedule management section, 16, 56: input/output execution section, 22, 62: channel device, 26, 66: interrupt processing routine, 30, 70: interrupt vector table, 34, 74: interrupt processing section.

Claims (1)

[Claims] [Claim 1] A method for accessing an input/output device of a computer system employing a direct memory access method, in which an input/output execution unit (56) issues a physical input/output command (60) to a channel device (62) in response to an input/output request (58) from an application program (50), and an interrupt (64) from the channel device (62) refers to an interrupt vector table (70) to pass control to an interrupt processing routine (66) of a corresponding level, which in turn refers to a device management table to start an interrupt processing unit (74),
The address is rewritten to the top address of the currently executing interrupt processing unit (74), and the interrupt (64) from the channel device (62) is executed by the interrupt processing unit (74) without going through the interrupt processing routine (66).
The control is passed directly to the interrupt vector table (70) when the I/O process is completed.
The address of the corresponding level is transferred to the original interrupt processing routine (6
6) A method for accessing an input/output device, comprising: