JPH0697710B2 - Electronic component mounting method - Google Patents
Electronic component mounting methodInfo
- Publication number
- JPH0697710B2 JPH0697710B2 JP2283764A JP28376490A JPH0697710B2 JP H0697710 B2 JPH0697710 B2 JP H0697710B2 JP 2283764 A JP2283764 A JP 2283764A JP 28376490 A JP28376490 A JP 28376490A JP H0697710 B2 JPH0697710 B2 JP H0697710B2
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- component mounting
- wiring board
- resin
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 9
- 239000011347 resin Substances 0.000 claims description 13
- 229920005989 resin Polymers 0.000 claims description 13
- 239000004020 conductor Substances 0.000 claims description 12
- 239000007788 liquid Substances 0.000 claims description 4
- 238000000465 moulding Methods 0.000 claims description 3
- 238000007711 solidification Methods 0.000 claims description 3
- 230000008023 solidification Effects 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 description 8
- 239000000758 substrate Substances 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009429 electrical wiring Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Description
【発明の詳細な説明】 ［産業上の利用分野］ 本発明は、電子部品の配線基板への実装に関するもので
あり、特に電子部品と配線基板とを一体化する電子部品
実装方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to mounting an electronic component on a wiring board, and more particularly to an electronic component mounting method for integrating an electronic component and a wiring board. .
［従来の技術］ 従来の電子部品実装用の配線基板は、樹脂基板の表裏に
設けられた銅箔をエッチングして配線パターンを形成し
たものである。該配線基板に電子部品を実装する場合
は、前記形成したパターンに半田印刷をし、更に、該配
線基板に電子部品を搭載し、リフロー炉を通して、半田
を溶融させ、電子部品と配線パターンの半田付けを行っ
ていた。[Prior Art] A conventional wiring board for mounting electronic parts has a wiring pattern formed by etching copper foils provided on the front and back surfaces of a resin substrate. When mounting an electronic component on the wiring board, solder printing is performed on the formed pattern, the electronic component is mounted on the wiring board, and the solder is melted through a reflow furnace to solder the electronic component and the wiring pattern. I was doing it.
［発明が解決しようとする課題］ 然し乍ら、上記した従来の電子部品実装方法、及び電子
部品実装基板では、電子部品実装の為の配線基板が必要
であり、部品点数が増えると配線基板が大型化すると共
に、該配線基板の板厚分だけは厚くなり、電子部品実装
基板の軽薄短小化が難しいという問題があり、又電子部
品を実装するのに、半田を使用するので、配線基板の半
田印刷工程、電子部品搭載後のリフロー炉を通しての、
電子部品と配線パターンの半田付け工程が必要であり、
工程数が多く生産性が悪いという問題があった。[Problems to be Solved by the Invention] However, in the above-described conventional electronic component mounting method and electronic component mounting substrate, a wiring substrate for mounting electronic components is required, and the wiring substrate becomes large when the number of components increases. In addition, there is a problem that it is difficult to make the electronic component mounting board lighter, thinner and smaller because the board thickness of the wiring board becomes thicker. Also, since solder is used to mount the electronic component, solder printing of the wiring board is required. Through the process, reflow furnace after mounting electronic parts,
A soldering process for electronic parts and wiring patterns is required,
There was a problem that the number of processes was large and the productivity was poor.
本発明は、斯かる実情に鑑み、電子部品実装基板の軽薄
短小化を図り、而も半田を用いること無く生産性の向上
を図ろうとするものである。In view of the above situation, the present invention aims to reduce the size of the electronic component mounting board in a light, thin and short size, and to improve the productivity without using solder.
［課題を解決する為の手段］ 本発明は、所要の電子部品をその電極を下にして定盤上
に配置し、前記電子部品を囲む様に枠体を配設し、該枠
体内に液状樹脂を流込み、固化させ、固化後定盤を除去
し、固化樹脂の前記電子部品電極露出面全面に導体をメ
ッキして導体層を成形し、該導体層をエッチング処理し
て前記電子部品を所要の状態に接続する配線パターンを
成形する電子部品実装方法に係るものである。[Means for Solving the Problem] The present invention is to dispose a required electronic component with its electrodes facing down on a surface plate, to dispose a frame body so as to surround the electronic component, and to liquid-state in the frame body. The resin is poured and solidified, the platen is removed after solidification, a conductor is plated on the entire surface of the solidified resin where the electrode of the electronic component is exposed to form a conductor layer, and the conductor layer is etched to form the electronic component. The present invention relates to an electronic component mounting method for molding a wiring pattern to be connected in a desired state.
［作用］ 電子部品は、その電極が露出する様、液状樹脂中に埋設
され、液状樹脂の固化により基板内に電子部品を埋設す
る配線基板本体が形成され、電子部品間の配線接続は配
線基板本体の表面に直接メッキされた導体によって、半
田等の接合材料を介在させること無く直接接続される。[Function] The electronic component is embedded in the liquid resin so that the electrodes are exposed, and the wiring substrate main body for embedding the electronic component in the substrate is formed by solidification of the liquid resin. The conductor is directly plated on the surface of the main body to be directly connected without interposing a joining material such as solder.
［実施例］ 以下、図面を参照しつつ本発明の一実施例を説明する。[Embodiment] An embodiment of the present invention will be described below with reference to the drawings.
第１図は、本実施例に係る電子部品実装基板の概念図を
示すものであり、図中、１は配線基板、2a,2b,2c,…は
該配線基板に埋設された電子部品、３は前記配線基板の
表面に形成した配線パターン（第２図（Ｅ）参照）であ
る。FIG. 1 is a conceptual diagram of an electronic component mounting board according to the present embodiment, in which 1 is a wiring board, 2a, 2b, 2c, ... Are electronic components embedded in the wiring board, and 3 is a wiring board. Is a wiring pattern formed on the surface of the wiring board (see FIG. 2 (E)).
前記埋設された電子部品2a,2b,2c,…は、前記配線パタ
ーン３によって、所要の状態に電気的に接続されてい
る。而して、本実施例に係る電子部品実装基板では配線
基板１の厚みが、即ち電子部品実装基板の厚みである。The embedded electronic components 2a, 2b, 2c, ... Are electrically connected to the required state by the wiring pattern 3. Thus, in the electronic component mounting board according to this embodiment, the thickness of the wiring board 1 is the thickness of the electronic component mounting board.
次に、第２図に於いて、本実施例に於ける電子部品の実
装について説明する。Next, referring to FIG. 2, mounting of electronic components in this embodiment will be described.
製作すべき電子部品実装基板と同じ外形形状を有し、且
平滑面に仕上げられた定盤４の上に、電極面を下にし
て、電子部品2a,2b,2c,…を所定の位置に配置する（第
２図（Ａ））。The electronic parts 2a, 2b, 2c, ... are placed in predetermined positions on the surface plate 4 having the same outer shape as the electronic part mounting board to be manufactured and finished on a smooth surface with the electrode surface facing down. It is arranged (FIG. 2 (A)).
矩形の枠体５を前記定盤４に嵌込み、該枠体５の内部に
基板材料の液状樹脂６を流込み固化させる（第２図
（Ｂ））。A rectangular frame 5 is fitted into the surface plate 4, and a liquid resin 6 as a substrate material is poured into the frame 5 to be solidified (FIG. 2 (B)).
樹脂６が固化した後、前記枠体５、前記定盤４を除去す
る。樹脂６の固化によって、樹脂６の配線基板本体６′
となり、前記電子部品2a,2b,2c,…は、この配線基板本
体６′に埋設された状態になる。After the resin 6 is solidified, the frame body 5 and the surface plate 4 are removed. By solidifying the resin 6, the wiring board body 6'of the resin 6 is formed.
Thus, the electronic components 2a, 2b, 2c, ... Are embedded in the wiring board body 6 '.
第２図（Ｃ）は、前記配線基板本体６′を裏返し、該配
線基板本体６′の前記定盤４の当接面を示しているが、
この当接面には前記電子部品2a,2b,2c,…の電極がそれ
ぞれ露出している。FIG. 2 (C) shows the contact surface of the surface plate 4 of the wiring board body 6'turned over the wiring board body 6 '.
The electrodes of the electronic components 2a, 2b, 2c, ... Are exposed on the contact surface.
次に、前記当接面全面に導体、例えば銅をメッキする
（第２図（Ｄ））。Next, a conductor such as copper is plated on the entire contact surface (FIG. 2 (D)).
この導体のメッキによって、前記電子部品2a,2b,2c,…
の電極はこの導体層７に導通する。By plating this conductor, the electronic components 2a, 2b, 2c, ...
The electrode of is electrically connected to the conductor layer 7.
その後、該導体層７を通常の手段によりエッチングして
配線パターン３を成形する（第２図（Ｅ））。After that, the conductor layer 7 is etched by a usual means to form the wiring pattern 3 (FIG. 2 (E)).
この配線パターン３の成形により、前記電子部品2a,2b,
2c,…間の電気的配線が完了し、電子部品実装基板が完
成する。By molding the wiring pattern 3, the electronic components 2a, 2b,
The electrical wiring between 2c, ... Is completed and the electronic component mounting board is completed.
［発明の効果］ 以上述べた如く、本発明によれば電子部品が配線基板自
体に埋設された構造となるので、電子部品実装基板の厚
みが著しく減少し、又その製造工程に、半田を使用しな
いので工程数が減少し、生産性が向上するという優れた
効果を発揮する。[Advantages of the Invention] As described above, according to the present invention, since the electronic component is embedded in the wiring board itself, the thickness of the electronic component mounting board is significantly reduced, and solder is used in the manufacturing process. Since it does not, the number of steps is reduced and the excellent effect of improving productivity is exhibited.
第１図は本発明の１実施例に係る電子部品実装基板の概
念図、第２図（Ａ）（Ｂ）（Ｃ）（Ｄ）（Ｅ）は本実施
例に係る電子部品の実装手順を示す説明図である。 １は配線基板、2a,2b,2c,…は電子部品、３は配線パタ
ーン、４は定盤、５は枠体、６は樹脂、６′は配線基板
本体、７は導体層を示す。FIG. 1 is a conceptual diagram of an electronic component mounting board according to one embodiment of the present invention, and FIGS. 2 (A), (B), (C), (D), and (E) show a mounting procedure of electronic components according to this embodiment. It is an explanatory view shown. 1 is a wiring board, 2a, 2b, 2c, ... Are electronic components, 3 is a wiring pattern, 4 is a surface plate, 5 is a frame, 6 is resin, 6'is a wiring board body, and 7 is a conductor layer.
フロントページの続き (56)参考文献 実開 平１−83365（ＪＰ，Ｕ) 実開 昭63−20469（ＪＰ，Ｕ) 実開 昭61−86970（ＪＰ，Ｕ)Continuation of the front page (56) Bibliography Flat 1-83365 (JP, U) Full-blown Sho 63-20469 (JP, U) Full-blown Sho 61-86970 (JP, U)
Claims (1)
上に配置し、前記電子部品を囲む様に枠体を配設し、該
枠体内に液状樹脂を流込み、固化させ、固化後定盤を除
去し、固化樹脂の前記電子部品電極露出面全面に導体を
メッキして導体層を成形し、該導体層をエッチング処理
して前記電子部品を所要の状態に接続する配線パターン
を成形することを特徴とする電子部品実装方法。1. A required electronic component is placed on a surface plate with its electrode facing downward, a frame is disposed so as to surround the electronic component, and a liquid resin is poured into the frame to solidify the resin. After solidification, the surface plate is removed, and a conductor layer is formed by plating a conductor on the entire exposed surface of the electronic component electrodes of the solidified resin, and the conductor layer is etched to connect the electronic component to a desired state. A method for mounting an electronic component, which comprises molding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2283764A JPH0697710B2 (en) | 1990-10-22 | 1990-10-22 | Electronic component mounting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2283764A JPH0697710B2 (en) | 1990-10-22 | 1990-10-22 | Electronic component mounting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04158596A JPH04158596A (en) | 1992-06-01 |
| JPH0697710B2 true JPH0697710B2 (en) | 1994-11-30 |
Family
ID=17669819
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2283764A Expired - Fee Related JPH0697710B2 (en) | 1990-10-22 | 1990-10-22 | Electronic component mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0697710B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8981869B2 (en) | 2006-09-21 | 2015-03-17 | Raytheon Company | Radio frequency interconnect circuits and techniques |
| US9116222B1 (en) | 2010-11-18 | 2015-08-25 | Raytheon Company | Modular architecture for scalable phased array radars |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54158669A (en) * | 1978-06-05 | 1979-12-14 | Matsushita Electric Industrial Co Ltd | Printed circuit board |
| JPS5542338U (en) * | 1978-09-11 | 1980-03-18 | ||
| JPS5718349A (en) * | 1980-07-09 | 1982-01-30 | Matsushita Electric Ind Co Ltd | Manufacture of electronic circuit device |
| JPS57118690A (en) * | 1981-01-14 | 1982-07-23 | Fujitsu Ltd | Method of producing electronic circuit |
| JPS6186970U (en) * | 1984-11-13 | 1986-06-07 | ||
| JPS6320469U (en) * | 1986-07-25 | 1988-02-10 | ||
| JPH0183365U (en) * | 1987-11-26 | 1989-06-02 |
-
1990
- 1990-10-22 JP JP2283764A patent/JPH0697710B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8981869B2 (en) | 2006-09-21 | 2015-03-17 | Raytheon Company | Radio frequency interconnect circuits and techniques |
| US9116222B1 (en) | 2010-11-18 | 2015-08-25 | Raytheon Company | Modular architecture for scalable phased array radars |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04158596A (en) | 1992-06-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |