JPH07101746B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a semiconductor pressure sensor that utilizes a change in resistance value when stress is applied to a diffusion resistance formed in a silicon layer. Related to the improvement of.

[Conventional technology]

FIG. 5 (a) shows a cross-sectional structure of a semiconductor element used for a conventional pressure sensor, FIG. 5 (b) schematically shows its planar structure, and FIG. 5 (c). ) Shows the bridge circuit of the pressure sensor.

In the figure, 1 is a p-type silicon substrate, 2 is an insulating film, and 15 is
The Al electrode, 16 is an n-type diffusion resistance layer. As shown in FIG. 5 (a), a p-type silicon substrate 1 forming a diaphragm.
An n-type diffusion layer 16 is provided on the surface of, and the n-type diffusion resistors 16 are arranged at four points on the circumference as shown in FIG. The bridge is constructed as shown in FIG. By doing so, it is possible to magnify and capture a minute change in resistance caused by the stress between the resistance provided in parallel to the diameter direction of the circle and the resistance provided in the vertical direction.

The output voltage V ₀ is denoted as _{V 0 = (δR / R)} × Vs = {Π 44/2 (σr-σt)} × Vs. Π ₄₄ is a piezoresistive coefficient, and σr and σt are stresses in the center and tangential directions of the circle.

Further, FIG. 6 (a) is a view showing a sectional structure when the semiconductor element having the structure shown in FIG. 5 is assembled to function as a pressure sensor. In the drawing, 20 is a cap and 21 is a molding resin. , 22 is a wire, 23 is an atmospheric pressure, 24 is a header, 25 is a lead, 26 is an open hole, 27 is a silicon pellet, 28 is a diaphragm portion, 29 is a pipe, and FIG. It is a top view. In the configuration shown in the figure, when a measurement pressure is applied from above, the diaphragm portion 28 receives the pressure and bends,
If it is bent so as to be pushed from above, compressive stress will be applied in the plane of the diaphragm portion 28, and if it is bent so as to be pulled from above, tensile stress will be applied in the plane of the diaphragm portion 28. The piezo resistance indicated by changes in response to such pressure. As a result, the output voltage corresponding to the measured pressure is obtained and the pressure sensor functions.

By the way, when the ambient temperature is up to about 200 ° C., the resistance of the n-type silicon layer 16 of this element functions by being electrically isolated from each other in the p-type silicon layer 1, but when the temperature further rises, the p, n junction The leak current between them increases, and the electrical isolation between the resistors is not maintained, so that the pressure sensor does not function.

Therefore, in order to eliminate such drawbacks of the conventional semiconductor pressure sensor, a semiconductor pressure sensor of SOI (Silicon on Insulator) structure in which a diffusion resistance layer is provided on a silicon layer which is completely separated on an insulating film has been developed. There is. That is, FIG. 4 is a view showing a cross-sectional structure of the above-described SOI structure pressure sensor, in which 1 is a p-type silicon substrate, 2 is an insulating film,
Reference numeral 14 is a recrystallized silicon diffusion resistance layer, and 15 is an Al electrode. In the element of this structure, since the resistors 14 are separated from each other by the insulating film 2, a normal operation can be obtained even when the measured temperature is 200 ° C. or higher.

Hereinafter, a method for manufacturing a semiconductor device having an SOI structure will be described.

FIGS. 7A to 7D are views showing a method of forming a silicon layer by, for example, a laser recrystallization method. In the figure, 1 is a silicon substrate, 2 is an insulating film, 3 is a polycrystalline silicon layer, 3a is a single crystal silicon layer, 4 is an antireflection film, 5 is Ar laser light,
6 is a seed region, 10 is implanted ions, and 30 is an impurity diffusion resistance layer.

First, as shown in FIG. 7A, an insulating film SiO ₂ 2 is formed in a thickness of about 1 μm on the silicon substrate 1 while leaving the seed region 6. Subsequently, as shown in FIG. 7B, a polycrystalline silicon layer 3 is formed by LPCVD to a film thickness of 5000 Å, and an antireflection film and a protective film 4 for controlling heat distribution on the surface of the polycrystalline silicon layer 3 are formed.
To provide. Then, as shown in FIG. 7C, continuous wave Ar laser light 5 is irradiated to melt and recrystallize the polycrystalline silicon layer 3. At this time, the polycrystalline silicon layer 3 grows from the seed 6 with crystallinity, and becomes a single crystal on the insulating film 2. Then, as shown in FIG. 7D, the single crystal silicon layer 3a is doped with a certain amount and uniformly diffused in the layer to determine the resistance value in the layer. The thus formed impurity-diffused single crystal silicon layer 30 is patterned into an island shape to serve as a resistance layer of a pressure sensor.

In addition, FIGS. 8A to 8C show a wafer gluing polishing method as another method of forming the SOI structure. In the figure, 11 is a silicon substrate, 12 is an oxide film, and 13 and 13a are silicon substrates.

As shown in FIG. 8 (a), an oxide film 12 is formed on two wafers, that is, one of the silicon substrates 11 and 13.
It is known that when the oxide film 12 and the silicon substrate 13 are combined, pressure-bonded and heat-treated, two wafers are bonded as shown in FIG. 8 (b). Further, this method is to polish the substrate 13 from the surface so as to have a desired thickness as shown in FIG.

[Problems to be Solved by the Invention]

However, as described above, various methods have been developed to obtain the SOI layer. Generally, in the laser recrystallization method shown in FIG. 7, the polycrystalline silicon layer 3 is melted by the laser beam 5. When the single crystal is crystallized, the dissolved silicon moves, and the thickness of the recrystallized silicon layer 3a is 4000.
Variation occurs between ~ 7,000Å. Therefore, FIG. 7 (d)
As described above, a certain amount of the impurity for determining the resistance value described above is doped in the single crystal silicon layer 3a, and a process of uniformly diffusing in the layer causes a distribution of the impurity concentration,
The resistance value will vary.

Also, in the method for forming the SOI structure by the wafer gluing method shown in FIG. 8 as well, in the case of only simple polishing shown in FIG. 8 (c), there is variation in the remaining film thickness of about 5 μm ± 2 μm, and another method. As a result, even if a diffusion layer is formed in advance on the wafer 13 and this is used as a stop layer to thin the film by chemical etching, the remaining film thickness will vary by 0.5 ± 1 μm.

As described above, according to the conventional manufacturing method, it is difficult to control the thickness of the single crystal silicon layer on the insulating film, which causes a relatively large variation in the wafer surface. When a certain amount of impurities for determining the resistance value is doped into a silicon layer with a variation in film thickness and diffused so that it is even within the layer, the impurity concentration varies according to the variation in film thickness There is a problem that it causes variations in values.

The present invention has been made to solve the above problems, and in a semiconductor device having an SOI structure, it is possible to reduce the variation in the resistance value due to the film thickness distribution of the single crystal silicon layer formed on the insulating film, and to obtain a uniform An object of the present invention is to provide a method for manufacturing a semiconductor device having a diffusion resistance layer having high properties.

[Means for Solving the Problems]

According to the method of manufacturing a semiconductor device of the present invention, in the method of determining the resistance value of the single crystal silicon layer formed on one main surface of the silicon substrate via the insulating film, the single crystal silicon layer is formed of the first conductive material. -Type impurities are doped at a predetermined concentration to form a low-concentration doped layer uniformly in the entire depth direction, and the first-conductivity-type impurities are also formed in the surface region of a depth that does not reach the lower layer of the low-concentration doped layer. Is further doped to form a high-concentration doped layer.

[Action]

In the present invention, as described above, the single crystal silicon layer is uniformly doped with a low concentration of impurities, and then only the surface region is doped with a high concentration of impurities. It is determined by the final diffusion layer doped with high-concentration impurities regardless of the above.

〔Example〕

 An embodiment of the present invention will be described below with reference to the drawings.

1 (a) to 1 (e) show cross-sectional structures of respective main steps showing a method for manufacturing a semiconductor device by a laser recrystallization method according to an embodiment of the present invention, in which 1 is a silicon substrate, 2 is an insulating film, 3 is a polycrystalline silicon layer, 3a is a single crystal silicon layer, 4 is an antireflection film, 5 is a laser beam, 6 is a seed region, 7 is a low-concentration doped layer, 8 is a high-concentration doped layer, 9 Is a single crystal silicon layer, and 10 is implanted ions.

The process from FIG. 1 (a) to FIG. 1 (c) is shown in FIG.
The description is omitted because it is exactly the same as that of (c).

According to the conventional manufacturing method, there is a problem that the distribution of the impurity concentration occurs due to the distribution of the film thickness of the single crystal silicon layer, and the resistance value varies, but in the present invention, in order to avoid this,
After forming the single crystal silicon layer 3a in the step of FIG. 1 (c), as shown in FIG. 1 (d), 1 × 10 ¹⁸ / cm ³ of a P-type impurity, for example, boron, is contained in the single crystal silicon layer 3a. ~ 1 x 10 ¹⁹
/ Cm ^{3 is} diffused to form the low concentration doped layer 7. For this purpose, boron is used at 50 KeV to 100 KeV, 5 × 10 ¹³ / cm ^{2 to} 5 × 10 ¹⁴
/ Cm ² ion implantation, and then heat treatment at 900 to 1000 ° C. for about 30 minutes to diffuse the implanted impurities throughout the depth direction of the single crystal silicon layer 3 a.

After that, in order to further dope boron in the range of 1 × 10 ¹⁹ / cm ³ to 1 × 10 ²⁰ / cm ³ , a low voltage of about 50 KeV was applied.
× 10 ¹⁴ / cm ^{2 to} 5 × 10 ¹⁵ / cm ² ions are implanted, and heat treatment at 900 ° C. or less or rapid thermal annealing is performed to reach the lower surface as shown in FIG. 1 (e), for example, a single crystal. If the silicon layer 3a has a layer thickness of 5000Å, the heavily doped layer 8 is formed by slightly activating the implanted impurities by diffusing the implanted impurities within a range of about 3000Å to 4000Å from the surface thereof.

According to the manufacturing method as described above, the resistance value of the single crystal silicon layer 9 is determined by the high concentration diffusion layer 8, and the resistance value does not depend on the film thickness distribution of the single crystal silicon layer 3a. Finally, the silicon layer 9 is patterned into an island shape, and its sectional view is used as the basic structure of the SOI pressure sensor element shown in FIG. 3 to provide the semiconductor device of this structure for the pressure sensor shown in FIG. it can.

Further, FIGS. 2A to 2D show a wafer lapping and polishing method as another method for forming a SOI structure semiconductor device. In the figure, the same reference numerals as in FIG. 8 indicate the same parts, 17 is a low concentration doped layer, and 18 is a high concentration doped layer.

The steps of FIGS. 2 (a) to 2 (c) are exactly the same as the steps of FIGS. 8 (a) to 8 (c) shown in the conventional example, and as described in the conventional problems, only simple polishing is performed. 2C, the remaining thickness of the silicon substrate 13a after polishing has a variation of about 5 μm ± 2 μm in the step of FIG. 2C, and a diffusion layer is formed on the wafer 13 in advance, and this is used as a stop layer. Even if thinned by chemical etching, the remaining film thickness is 0.5
There is a variation of ± 0.1 μm. Therefore, the present invention is also effective for this method, and as shown in FIGS. 2D and 2C, the single-crystal silicon layer is uniformly doped with a low-concentration impurity to form the low-concentration doped layer 17. After the formation, if the high-concentration impurity is doped only on the surface to form the high-concentration doped layer, the resistance value does not depend on the film thickness of the silicon layer 13a, and the last diffusion with the high-concentration impurity is performed. Determined at layer 18.

According to the above-described embodiment, since the diffusion layer that does not reach the lower surface is provided in the SOI layer having the film thickness distribution, the uniformity of the diffusion value is improved and the resistance due to the film thickness distribution of the SOI structure pressure sensor is improved. It is possible to prevent variation in value.

〔The invention's effect〕

As described above, according to the present invention, a single-crystal silicon layer having an SOI structure is uniformly doped with a low-concentration impurity, and then only its surface is doped with a high-concentration impurity. Since the diffusion layer that does not reach the limit is provided, the uniformity of the resistance value of the SOI layer having the film thickness distribution can be improved, the accuracy of the device can be improved, and various SOI manufacturing techniques can be used. Since it has become possible, there is a great possibility that the manufacturing cost of the device may be lowered.

[Brief description of drawings]

1 (a) to 1 (e) are cross-sectional views of main steps showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS. 2 (a) to 2 (e) are other embodiments of the present invention. FIG. 3 is a cross-sectional view of each main step showing a semiconductor device manufacturing method according to the present invention, and FIG. 3 is a semiconductor device manufacturing method according to an embodiment of the present invention.
A sectional view of the SOI structure, FIG. 4 is a sectional view of the SOI structure pressure sensor, and FIGS. 5A to 5C are sectional views of a conventional semiconductor pressure sensor, a plan view, and a diagram showing a bridge circuit, respectively.
FIG. 6 is a view showing the structure of the assembled pressure sensor,
7 (a) to 7 (d) are cross-sectional views of main steps showing a conventional method for manufacturing a semiconductor device, and FIGS. 8 (a) to 8 (c) are main steps according to the conventional method for manufacturing a semiconductor device. FIG. In the figure, 1 ... Silicon substrate, 2 ... Insulating film, 3 ... Polycrystalline silicon layer, 3a ... Monocrystalline silicon layer, 4 ... Antireflection film, 5 ... Laser beam, 6 ... Seed region, 7 ... Lightly doped layer, 8 ... Highly doped layer, 9 ... Single crystal silicon layer, 10 ... Implanted ions, 11,13,13a ... Silicon substrate, 12 ... Oxide film, 14 ... Diffusion resistance layer, 15 …… Al electrode, 17 …… Low concentration doped layer, 18 …… High concentration doped layer. The same reference numerals in the drawings indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A semiconductor device comprising a step of forming a single crystal silicon layer on one main surface of a silicon substrate via an insulating film, and a step of setting a resistance value of the single crystal silicon layer to a desired value. In the manufacturing method of the above, in the step of setting the resistance value, the single crystal silicon layer is doped with a first conductivity type impurity in a predetermined concentration, and the single crystal silicon layer is uniformly doped with a low concentration doped layer over the entire depth direction. And a second step of forming a high-concentration doped layer only in the surface region of the low-concentration doped layer by doping the low-concentration doped layer with a higher-concentration impurity of the first conductivity type. A method of manufacturing a semiconductor device, comprising the steps of: