JPH07101984B2 - Power transistor device with built-in gate drive circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a parallel transistor having an oxide-insulated gate electrode used for an inverter device and the like, and an IC of a gate drive circuit.

Conventional Configuration and Problems In recent years, from the viewpoint of energy saving and comfort, there has been a strong demand for variable speed induction motors. It is sent.

An example of use of the conventional inverter device will be described below with reference to FIGS. 1 and 2.

FIG. 1 is a basic configuration diagram of an inverter device, and FIG. 2 is a drive circuit of the inverter device.

In FIG. 1, 1 is an AC power source, 2 is an AC power source rectifier circuit, 3, 4, 5
Are U-phase, V-phase and W-phase drive circuits respectively connected to the flow producing circuit 2. Each phase drive circuit 3, 4, 5 includes a first base portion 6, a first power transistor 7, a second base portion 8,
It is composed of the second power transistor 9. Reference numeral 10 is a frequency setting unit for setting a frequency, 11 is a control circuit unit for receiving signals from the frequency setting unit 10 and outputting signals to the first and second base units 6 and 8 for each phase, and 12 is a phase driving circuit for each phase. It is a motor connected to 3,4,5. FIG. 2 shows a concrete example of the driving circuits 3, 4, and 5 in FIG. 1, the same parts as those in FIG. 1 are designated by the same reference numerals, and duplicate explanations are omitted. 13 is a DC power supply unit for the power source in the first base unit 6 and the second base unit 8, 14 is a first base drive unit that turns the first power transistor 7 on and off, and 15 is a second power transistor 9 that is turned on. The second base drive units 16 and 17 which are turned off are signal input terminals to the first and second base drive units 14 and 15.

According to the above configuration, the frequency setting unit can be obtained from FIGS. 1 and 2.
If the frequency is set at 10, the control circuit unit 11 determines, based on the setting signal, the first phase of the U, V, W phase drive circuits 3, 4 and 5 at a phase interval of 120 ° in electrical angle. Then, a signal for alternately turning on and off the power transistors 7 and 9 is output to the second base portions 6 and 8. That is, in the first and second base parts 6 and 8, signals are received at the signal input terminals 16 and 17 of the first and second base drive parts 14 and 15,
The power transistors 7 and 9 are alternately turned on and off by the respective DC power supply units 13, the DC voltage supplied by the rectifier circuit 2 is equivalently converted into a three-phase AC, and the motor 12 is operated. In this way, when the two power transistors 7 and 9 connected in series are alternately turned on and off, in order to turn on the first power transistor 7, a voltage may be applied between the base and the emitter. is necessary. On the other hand, the midpoint potential 7a of the first power transistor increases or decreases every time the second power transistor 9 is turned on and off, so the reference potential cannot be determined and cannot be turned on efficiently.
Therefore, efficiently turn on and off the first and second power transistors.
In order to perform the F, as shown in FIG. 2, it was necessary to install the DC power supply unit 13 in each of the first and second base units 6 and 8. For that reason,
The conventional configuration has the following drawbacks.

In order to alternately turn on and off the two power transistors 7 and 9 connected in series in an efficient manner, when the signal circuit is composed of low voltage transistors, a dedicated DC power supply unit 13 is provided for each power transistor. In particular, in the case of a multi-phase inverter device, the DC power supply unit requires at least (the number of phases + 1), which makes it difficult to reduce the size and cost.

Since the power transistors 7 and 9 and the base drive units 14 and 15 are separated, when the ON-OFF switching frequency becomes high, the stray L and C distort the base waveform,
Switching loss increases and efficiency decreases.

It is an object of the present invention to provide a power transistor device with a built-in gate drive circuit, which enables miniaturization and cost reduction of an inverter device and improves efficiency.

To achieve this object, in the present invention, a first and a second power transistor having oxide-insulated gate electrodes are connected in series between power supply terminals, and the gate of the first power transistor is connected. One end of a first gate drive unit composed of a MOS • FET is connected to the electrode terminal, and a power terminal of the first gate drive unit is connected to a midpoint between the first and second power transistors via a capacitor, The other end of the first gate drive unit is connected to a terminal of a control circuit that receives a signal from the frequency setting unit and outputs a first signal, and a gate electrode terminal of the second power transistor is a second electrode including a MOS FET. One end of the gate drive unit is connected, a DC power supply unit is connected to the power supply terminal of the second gate drive unit, and the other end of the second gate drive unit is connected to the second signal of the control circuit unit. The DC power supply unit is connected between the power terminal of the first drive unit and the capacitor through a diode, and the diode is connected to the second terminal.
A power transistor device with a built-in gate drive circuit, which is used in an inverter or the like for charging a capacitor when a power transistor is turned on, comprising first and second gate electrodes insulated by the oxide. By using a power transistor device with a built-in gate drive circuit in which a power transistor and each gate drive section are formed on the same semiconductor chip, a capacitor can be connected to the power terminal and a direct current power supply section can be connected to the power supply terminal to provide a second power transistor. When is ON, the capacitor is charged by the DC power supply via the diode,
Due to the charging voltage, the first power transistor is turned on efficiently, and the DC power supply for the first power transistor is unnecessary. Furthermore, the structure in which the power transistor and the gate drive unit are integrated enables driving by a minute signal, and also reduces stray capacitance and stray inductance, enabling high-speed switching of the power transistor.

Description of Embodiments An embodiment of the power MOS • FET with a built-in gate circuit of the present invention is shown in FIGS. 3 and 4 and described.

The same parts as those in FIGS. 1 and 2 are designated by the same reference numerals and detailed description thereof will be omitted, and different points will be mainly described.

In FIG. 4, 3 ', 4', and 5'indicate drive circuits for each set, and 18 indicates a power MOS FET with a built-in gate drive circuit. The power MOS FET with built-in gate drive circuit is composed of the first and second power MOS FET 7 ',
9 ', MOS FET as the first and second gate drive units 14 and 15
Signal input terminal 16 of the first gate drive section 14, power terminal 24, and signal input terminal of the second gate drive section 15
17, a power supply terminal 25, a diode 20 connecting the power supply terminal 24 and the power supply terminal 25, a + side terminal 21 connected to the + side of the rectifier circuit 2 by the power MOS / FET 7 ', a similar one side terminal 22, the first, first It is composed of a midpoint terminal 23 of two power MOS FETs 7'and 9 ', which are formed on the same semiconductor chip. Reference numeral 13 is a DC power supply unit connected to the power supply terminal 25, and 19 is a capacitor connected to the power terminal 24.

The operation will be described below.

If an ON signal is input to the second signal input terminal 17, the MOS ・ FET
15 is driven and the voltage of the DC power supply unit 13 is changed to the second power MO.
Apply to the gate terminal of S ・ FET9 ', the second power MOS ・ FET
Turn on. When the second power MOS / FET 9'is turned on, the midpoint 23 and the one-sided terminal 22 have substantially the same potential, and the capacitor 19 is charged from the DC power supply unit 13 through the diode 20. When the second power MOSFET 9'is off, the potential of the midpoint 23 is one side terminal 22
Although higher, the potential of capacitor 19
Does not discharge because of blocking. Then, the electric charge charged in the capacitor is energized as the power source of the MOS • FET 14 of the first gate drive section. In this state, the first signal input terminal 16
When ON signal is input to the MOS of the first gate drive
The FET 14 is driven, and the charging voltage of the capacitor is applied to the gate terminal of the first power MOS-FET 7 ', and the first power MOS-FET 7'is turned on efficiently. As described above, according to the present embodiment, in the drive circuit of the inverter device, the capacitor connection terminal 24, the power supply terminal 25, the signal input terminal
16,17, + side terminal 21, -side terminal 22, midpoint terminal 23, 2
A power MOS with built-in gate drive circuit composed of power MOS-FETs 7'and 9'connected in series, the power MOS driving MOS-FETs 14 and 15 and a capacitor connecting terminal, and a diode 20 connecting between power terminals. By using FET, two power MOS FETs connected in series can be efficiently turned on alternately by connecting only one capacitor and one DC power supply.
-It can be turned off. As can be easily understood from the configuration and effect of the present embodiment described so far, the first and second power MOS FETs simply repeat the ON-OFF state alternately, and the repetition causes The power supply for the first gate drive unit that energizes the first power MOS • FET is generated from the power supply for the second gate drive unit. As the ON-OFF element to which the invention for producing the power source is applied, the MOS • FET having the feature that the power consumption of the power source of the gate drive circuit is small is most suitable.

EFFECTS OF THE INVENTION As is clear from the above description, the present invention provides first and second oxide semiconductor devices having oxide-insulated gate electrodes between power supply terminals.
Power transistor is connected in series, the gate electrode terminal of the first power transistor is connected to one end of a first gate drive section composed of a MOS-FET, and the power terminal of the first gate drive section is connected via a capacitor. The first
The second power transistor is connected to a midpoint, and the other end of the first gate drive unit is connected to a terminal of a control circuit unit that receives a signal from the frequency setting unit and outputs a first signal, MO to the gate electrode terminal of the power transistor
Connect one end of the second gate drive part consisting of S-FET,
A DC power supply unit is connected to a power supply terminal of the second gate drive unit, and the other end of the second gate drive unit is connected to a terminal of the control circuit unit that outputs a second signal, and the DC power supply unit is connected via a diode. Connected between the power terminal of the first drive unit and the capacitor, and using the diode as a direction to charge the capacitor when the second power transistor is turned on. Transistor device having first and second power transistors each having at least a gate electrode insulated by the oxide and respective gate drive portions on the same semiconductor chip, which brings about the following effects Is.

By using a common DC power supply unit for each of the first and second power transistors, downsizing and cost reduction can be achieved. In particular, in the multi-phase inverter device, since only one DC power supply unit is provided, it is possible to significantly reduce the size and cost.

Since the signal to the signal input terminal is applied to the gate terminal of the MOS • FET which constitutes the gate drive unit for driving the power transistor, the power transistor can be driven by a minute signal input.

By integrating the power transistor and gate drive, the stray L and C are reduced and high-speed switching operation is possible.

[Brief description of drawings]

FIG. 1 is a basic configuration diagram of an inverter device of a conventional example, FIG. 2 is a drive circuit diagram of the same inverter device, and FIG. 3 is a circuit diagram of an inverter device employing a power MOS • FET with a built-in gate drive circuit according to the present invention. FIG. 4 is a circuit diagram of a power MOS • FET with a built-in gate drive circuit in an embodiment of the present invention. 7 ′, 9 ′ …… Power MOS ・ FET, 14,15 …… MOS • FET as the 1st and 2nd gate drive, 16,17 …… Signal input terminal, 24 …… Capacitor connection terminal, 25 …… Power terminal, 20 ...
…diode.

Claims (1)

[Claims] 1. A first and a second power transistor having oxide-insulated gate electrodes are connected in series between power supply terminals, and a gate electrode terminal of the first power transistor comprises a MOS-FET. One end of the first gate drive unit is connected, one end of the first gate drive unit is connected, a power terminal of the first gate drive unit is connected to a midpoint between the first and second power transistors via a capacitor, and the other end of the first gate drive unit is connected. Is connected to a terminal of a control circuit section that receives a signal from the frequency setting section and outputs a first signal, and one end of a second gate drive section composed of a MOS FET is connected to the gate electrode terminal of the second power transistor. , A DC power supply unit is connected to a power supply terminal of the second gate drive unit, and the other end of the second gate drive unit is connected to a terminal of the control circuit unit for issuing a second signal. Section is connected between the power terminal of the first drive section and the capacitor via a diode, and the diode is used in an inverter or the like in which the capacitor is charged when the second power transistor conducts. A power transistor device with a built-in gate drive circuit, the power transistor device having a gate electrode insulated by at least the oxide.
And a power transistor device with a built-in gate drive circuit in which the second power transistor and the respective gate drive units are formed on the same semiconductor chip.