JPH07104741B2 - Power factor adjusting device for three-phase AC circuit - Google Patents
Power factor adjusting device for three-phase AC circuitInfo
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- JPH07104741B2 JPH07104741B2 JP60137499A JP13749985A JPH07104741B2 JP H07104741 B2 JPH07104741 B2 JP H07104741B2 JP 60137499 A JP60137499 A JP 60137499A JP 13749985 A JP13749985 A JP 13749985A JP H07104741 B2 JPH07104741 B2 JP H07104741B2
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- 238000006243 chemical reaction Methods 0.000 claims description 10
- 239000003990 capacitor Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 8
- 230000008859 change Effects 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電圧フリツカの防止、力率改善等のために使
用する三相交流回路の力率調整装置に関するものであ
る。Description: TECHNICAL FIELD The present invention relates to a power factor adjusting device for a three-phase AC circuit used for preventing voltage flickering, improving power factor, and the like.
フリツカ防止及び/又は力率改善のために三相交流電源
線の各線間にコンデンサ、又はコンデンサとリアクトル
との並列回路から成る進み電流供給回路を接続すること
は良く知られている。また、特開昭56−159936号(特願
昭55−61600)公報に、瞬時有効電流、及び瞬時無効電
流を求め、これに基づいて電力障害補償回路を制御する
ことが開示されている。It is well known to connect a lead current supply circuit composed of a capacitor, or a parallel circuit of a capacitor and a reactor, between each of the three-phase AC power supply lines in order to prevent flicker and / or improve the power factor. Further, Japanese Laid-Open Patent Publication No. 56-159936 (Japanese Patent Application No. 55-61600) discloses that an instantaneous active current and an instantaneous reactive current are obtained and the power failure compensation circuit is controlled based on the obtained instantaneous active current and instantaneous reactive current.
上述の公開公報の方法によれば、三相平衡負荷の条件の
もとでの力率補償を行うことが可能であるが、三相不平
衡負荷の力率補償を正確且つ容易に行うことが困難であ
つた。即ち、負荷の相電流を容易に検出することが出来
る場合には、線間に接続された進み電流供給回路を比較
的容易に制御することが出来るが、負荷の相電流を検出
することが困難な場合には、線電流検出に基づいて各線
間の進み電流を制御しなければならず、不平衡負荷の場
合には正確な制御が困難であつた。According to the method disclosed in the above publication, it is possible to perform power factor compensation under the condition of three-phase balanced load, but it is possible to accurately and easily perform power factor compensation of three-phase unbalanced load. It was difficult. That is, when the load phase current can be easily detected, the advance current supply circuit connected between the lines can be controlled relatively easily, but it is difficult to detect the load phase current. In such a case, the lead current between the lines must be controlled based on the line current detection, and accurate control is difficult in the case of an unbalanced load.
上述の如き問題点を解決するための本発明は、実施例を
示す図面の符号を参照して説明すると、三相交流電源線
に接続されている三相不平衡負荷(2)の第1相、第2
相及び第3相の線電流(IU、IV、IW)を検出する第1、
第2及び第3の線電流検出器(4a)(4b)(4c)と、前
記第1、第2及び第3の線電流検出器(4a)(4b)(4
c)で検出された第1、第2及び第3相線電流(IU、
IV、IW)に基づいて第1相、第2相及び第3相の瞬時無
効電流(IUq、IVq、IWq)を求める第1の演算回路
(5)と、前記第1の演算回路(5)から得られる第
1、第2及び第3の瞬時無効電流(IUq、IVq、IWq)の
実効値(a、b、c)を求める実効値変換回路(6)
と、線電流で表される各相の瞬時無効電流の前記実効値
(a、b、c)を相電流(x、y、z)に変換する第2
の演算回路(7)と、前記三相交流電源線の各線間に接
続された三相の無効電流供給回路(3a)(3b)(3c)
と、前記第2の演算回路(7)から得られる瞬時無効電
流の相電流(x、y、z)に基づいて前記三相不平衡負
荷(2)と前記無効電流供給回路(3a)(3b)(3c)と
を組み合せた三相交流回路の力率を所定値にするように
前記無効電流供給回路(3a)(3b)(3c)を制御する回
路(8)とから成る三相交流回路の力率調整装置に係わ
るものである。The present invention for solving the above-mentioned problems will be described with reference to the reference numerals of the drawings showing an embodiment. First phase of a three-phase unbalanced load (2) connected to a three-phase AC power supply line. , Second
First to detect the line current (I U , I V , I W ) of the phase and the third phase,
The second and third line current detectors (4a) (4b) (4c) and the first, second and third line current detectors (4a) (4b) (4)
c) the first, second and third phase line currents (I U ,
A first operation circuit (5) for obtaining the instantaneous reactive currents (I Uq , I Vq , I Wq ) of the first phase, the second phase and the third phase based on I V , I W ); Effective value conversion circuit (6) for obtaining effective values (a, b, c) of the first, second and third instantaneous reactive currents (I Uq , I Vq , I Wq ) obtained from the arithmetic circuit (5)
And a second step of converting the effective value (a, b, c) of the instantaneous reactive current of each phase represented by a line current into a phase current (x, y, z)
Arithmetic circuit (7) and three-phase reactive current supply circuits (3a) (3b) (3c) connected between the three-phase AC power supply lines
And the three-phase unbalanced load (2) and the reactive current supply circuits (3a) (3b) based on the phase current (x, y, z) of the instantaneous reactive current obtained from the second arithmetic circuit (7). ) (3c) and a circuit (8) for controlling the reactive current supply circuits (3a) (3b) (3c) so that the power factor of the three-phase AC circuit becomes a predetermined value. Of the power factor adjusting device.
上記発明によれば、第1の演算回路(5)によつて瞬時
無効電流成分(IUq、IVq、IWq)が演算で求められ、次
に、これ等の実効値(a、b、c)が得られる。この実
効値は線電流に対応するものであるが、これを第2の演
算回路(7)に入力させることによつて相電流(x、
y、z)が得られる。即ち、不平衡負荷であるにも拘ら
ず、線電流に対応した相電流(瞬時無効電流の実効値)
が得られる。制御回路は、相電流(瞬時無効電流の実効
値)に基づいて所定の力率(好ましくは1)が得られる
ように、各線間に接続されている無効電流供給回路(3
a)(3b)(3c)を制御する。この結果、不平衡負荷で
あるにも拘らず、容易に力率を調整することが出来る。According to the above invention, the instantaneous reactive current components (I Uq , I Vq , I Wq ) are calculated by the first arithmetic circuit (5), and then the effective values (a, b, c) is obtained. This effective value corresponds to the line current. By inputting this effective value to the second arithmetic circuit (7), the phase current (x,
y, z) is obtained. That is, despite the unbalanced load, the phase current corresponding to the line current (effective value of the instantaneous reactive current)
Is obtained. The control circuit includes a reactive current supply circuit (3) connected between the lines so that a predetermined power factor (preferably 1) is obtained based on the phase current (effective value of the instantaneous reactive current).
a) Controls (3b) and (3c). As a result, the power factor can be easily adjusted despite the unbalanced load.
次に、図面を参照して本発明の実施例に係わる三相交流
回路の力率調整装置について述べる。Next, a power factor adjusting device for a three-phase AC circuit according to an embodiment of the present invention will be described with reference to the drawings.
(第1図の説明) 第1図において、第1相(U相)、第2相(V相)、及
び第3相(W相)の電源線(1u、1v、1w)には、三相不
平衡負荷(2)が接続されている。この三相不平衡負荷
(2)は、例えば、力率がほぼ同一の溶接機等の単相負
荷(2a)(2b)(2c)を各線間に接続したものであり、
各線間の負荷(2a)(2b)(2c)は固定された負荷では
なく、その大きさが変化するものである。従つて、もし
力率補償しなければ、負荷(2)の変動によつて電源線
(1u)(1v)(1w)の電圧変動(フリツカ)が発生し、
且つ力率が悪化する。(3a)(3b)(3c)は力率調整の
ための進み無効電流供給回路であり、三相の電源線(1
u)(1v)(1w)に接続されている。この進み無効電流
供給回路(3a)(3b)(3c)は各線間に複数個のコンデ
ンサC1a〜C1n、C2a〜C2n、C3a〜C3nを交流スイツチとし
てのサイリスタS1a〜S1n、S2a〜S2n、S3a〜S3nを介して
選択的に接続するように構成されている。この進み無効
電流供給回路(3a)(3b)(3c)で供給する進み電流を
負荷(2)の変動に対応させて調整すれば、三相交流回
路の力率が補償され、且つ電圧変動(フリツカ)も防止
される。なお、この実施例では、コンデンサC1a〜C1nと
して容量の比が1:2:4:8の4個のコンデンサが設けられ
ているので、この4個のコンデンサの組み合せで15段の
容量が得られる。コンデンサC2a〜C2n、C3a〜C3nも同様
に構成されている。(Explanation of FIG. 1) In FIG. 1, three power supply lines (1u, 1v, 1w) for the first phase (U phase), the second phase (V phase), and the third phase (W phase) are A phase unbalanced load (2) is connected. This three-phase unbalanced load (2) is, for example, a single-phase load (2a) (2b) (2c) of a welding machine or the like having almost the same power factor connected between the lines,
The loads (2a) (2b) (2c) between the lines are not fixed loads, but their magnitudes change. Therefore, if the power factor is not compensated, the fluctuation of the load (2) causes the voltage fluctuation (flicker) of the power line (1u) (1v) (1w),
And the power factor gets worse. (3a) (3b) (3c) are lead reactive current supply circuits for power factor adjustment, and three-phase power line (1
u) (1v) (1w). This proceeds reactive current supply circuit (3a) (3b) (3c ) is a plurality between each line capacitor C 1a ~C 1n, C 2a ~C 2n, thyristors S 1a to S of the C 3a -C 3n as an AC switch 1n , S 2a to S 2n , and S 3a to S 3n are selectively connected. If the advance currents supplied by the advance reactive current supply circuits (3a), (3b) and (3c) are adjusted according to the change of the load (2), the power factor of the three-phase AC circuit is compensated and the voltage change ( Flickering) is also prevented. In this embodiment, since four capacitors having a capacitance ratio of 1: 2: 4: 8 are provided as the capacitors C 1a to C 1n , a combination of these 4 capacitors produces a capacity of 15 stages. can get. The capacitors C 2a to C 2n and C 3a to C 3n have the same configuration.
この実施例では三相負荷(2)としての各線間の負荷
(2a)(2b)(2c)は多数の負荷の集まりから成るの
で、相電流を直接に検出することが困難である。そこ
で、線電流IU、IV、IWを検出するために、各電源線(1
u)(1v)(1w)に変流器から成る電流検出器(4a)(4
b)(4c)が夫々接続されている。In this embodiment, since the loads (2a) (2b) (2c) between the lines as the three-phase load (2) are composed of a large number of loads, it is difficult to directly detect the phase current. Therefore, in order to detect the line currents I U , I V , and I W , each power line (1
u) (1v) (1w) Current detector (4a) (4
b) (4c) are connected respectively.
(5)は瞬時無効電流成分を求める第1の演算回路であ
り、各相の線電流IU、IV、IWに対応する各相の瞬時無効
電流IUq、IVq、IWqを出力する。この演算回路(5)の
具体的構成は、後で説明する。(5) is a first arithmetic circuit for obtaining the instantaneous reactive current component, which outputs the instantaneous reactive currents I Uq , I Vq , and I Wq of each phase corresponding to the line currents I U , I V , and I W of each phase. To do. The specific configuration of the arithmetic circuit (5) will be described later.
(6)は実効値変換回路であり、第1の演算回路(5)
から得られる瞬時無効電流IUq、IVq、IWqの各実効値即
ち瞬時無効電流成分の線電流a、b、cを求めるもので
ある。この実効値変換回路(6)は、例えば、アナログ
・デバイス(株)のAD536AのRMS/DCコンバータであり、
交流の実効値に対応する直流電圧を送出するもので、こ
の変換器(6)は正弦波の実効値を求めるように構成さ
れている。従つて、各線電流IU、IV、IW及び瞬時無効電
流IUq、IVq、IWqが正弦波の場合は勿論のこと、正弦波
に近似している場合も、極めて小さな誤差で実効値表示
の線電流a、b、cを得ることが出来る。瞬時無効電流
が正弦波に近い場合には、この基本波の実効値に基づい
て力率補償しても十分な効果が得られる。(6) is an effective value conversion circuit, and is a first arithmetic circuit (5)
The respective effective values of the instantaneous reactive currents I Uq , I Vq , and I Wq obtained from the above equation, that is, the line currents a, b, and c of the instantaneous reactive current components are obtained. The RMS value conversion circuit (6) is, for example, an AD536A RMS / DC converter of Analog Devices Co., Ltd.
A DC voltage corresponding to the effective value of the alternating current is sent out, and this converter (6) is configured to obtain the effective value of the sine wave. Therefore, even if the line currents I U , I V , I W and the instantaneous reactive currents I Uq , I Vq , I Wq are sinusoidal waves, even if they are approximate to a sinusoidal wave, they can be effective with extremely small error. It is possible to obtain the line currents a, b, and c indicated by the value. When the instantaneous reactive current is close to a sine wave, a sufficient effect can be obtained even if power factor compensation is performed based on the effective value of this fundamental wave.
(7)は線電流を相電流に変換する第2の演算回路であ
る。即ち、瞬時無効電流成分の各相の線電流a、b、c
(実効値)を各相の相電流x、y、z(実効値)に変換
する回路である。この第2の演算回路(7)は後で詳し
く説明する。(7) is a second arithmetic circuit for converting a line current into a phase current. That is, the line currents a, b, c of each phase of the instantaneous reactive current component
It is a circuit that converts (effective value) into phase current x, y, z (effective value) of each phase. The second arithmetic circuit (7) will be described in detail later.
(8)はゲート制御回路であり、第2の演算回路(7)
から得られる瞬時無効電流成分の各相の相電流x、y、
zに基づいて、負荷(2)と進み無効電流供給回路(3
a)(3b)(3c)との総合力率が1になるようにサイリ
スタS1、S2、S3を制御するためのゲート信号を発生する
回路である。(8) is a gate control circuit, and a second arithmetic circuit (7)
Phase current x, y of each phase of the instantaneous reactive current component obtained from
Based on z, the load (2) and the reactive current supply circuit (3
a) A circuit for generating a gate signal for controlling the thyristors S 1 , S 2 and S 3 so that the total power factor of (3b) and (3c) becomes 1.
(瞬時無効電流及び第2図の説明) 瞬時無効電流は、前述した特開昭56−159936公報で説明
されている。(Explanation of Instantaneous Reactive Current and FIG. 2) Instantaneous reactive current is described in the above-mentioned Japanese Patent Laid-Open No. 56-159936.
三相交流電源電圧VU、VV、VWは、最大値Vm、角周波数ω
の平衡三相交流電圧であるとすれば次式で表わされる。The three-phase AC power supply voltages V U , V V , and V W have maximum values V m and angular frequency ω
If the balanced three-phase AC voltage is expressed by the following equation.
いま、三相負荷電流IU、IV、IWをωで回転する変換マト
リクスで座標変換した電流をIp、Iqで表わすと、零相電
流が存在しない場合は、一般に次式が成立する。 Now, when the three-phase load currents I U , I V , and I W are coordinate-transformed with a transformation matrix that rotates by ω and expressed by I p and I q , the following equation is generally established when there is no zero-phase current. To do.
また、三相電流IU、IV、IWをIp、Iqで表わせば次式にな
る。 Further, if the three-phase currents I U , I V , and I W are represented by I p and I q , the following equation is obtained.
ここで、無効電流Iqのみを算出するため、(2)(3)
式においてIp=0とすると、次式が得られる。 Here, since only the reactive current I q is calculated, (2) and (3)
If I p = 0 in the equation, the following equation is obtained.
負荷電流IU、IV、IWの無効電流成分IUq、IVq、IWqは
(4)(5)式より次式で表わされる。 The reactive current components I Uq , I Vq , and I Wq of the load currents I U , I V , and I W are expressed by the following formulas from the formulas (4) and (5).
第2図はマトリクス表示の(7)式を演算するための第
1の演算回路(5)を示すブロツク図である。(9u)
(9v)(9w)は線電流IU、IV、IWを与えるライン、(1
0)はωtの情報を与えるライン、(11)はsin ωt発
生回路、(12)はsin(ωt−2π/3)発生回路、(1
3)はsin(ωt−4π/3)発生回路、(14)(15)(1
6)は、線電流IU、IV、IWと回路(11)(12)(13)の
出力との乗算器、(17)は3つの乗算器(14)(15)
(16)の出力の加算器、(18)(19)(20)は加算器
(16)の出力と回路(11)(12)(13)の出力との乗算
器であり、ここから瞬時無効電流IUq、IVq、IWqが出力
される。なお、乗算器(18)(19)(20)は乗算結果に
係数 を掛けて出力するように構成されている。例えば、第1
相の瞬時無効電流IUqは次式に基づいて得られる。 FIG. 2 is a block diagram showing the first arithmetic circuit (5) for calculating the equation (7) in matrix display. (9u)
(9v) and (9w) are lines that give line currents I U , I V , and I W , (1
(0) is a line giving information on ωt, (11) is a sin ωt generation circuit, (12) is a sin (ωt-2π / 3) generation circuit, and (1
3) is a sin (ωt-4π / 3) generation circuit, (14) (15) (1
6) is a multiplier of the line currents I U , I V , I W and the outputs of the circuits (11) (12) (13), (17) is three multipliers (14) (15)
(16) output adder, (18) (19) (20) are multipliers of adder (16) output and circuit (11) (12) (13) output, from which instant invalid Currents I Uq , I Vq , and I Wq are output. The multipliers (18) (19) (20) add a coefficient to the multiplication result. It is configured to multiply and output. For example, the first
The instantaneous reactive current I Uq of the phase is obtained based on the following equation.
第2相及び第3相の瞬時無効電流IVq、IWqも同様に演算
される。これ等の瞬時無効電流IUq、IVq、IWqは線電流I
U、IV、IWに基づいて決定されているので、線電流の瞬
時無効電流成分である。この瞬時無効電流IUq、IVq、I
Wqは、第1図の実効値変換回路(6)によつて、実効値
即ち瞬時無効電流成分の線電流a、b、cに変換され
る。 The second- and third-phase instantaneous reactive currents I Vq and I Wq are calculated in the same manner. These instantaneous reactive currents I Uq , I Vq , and I Wq are line currents I
Since it is determined based on U , IV , and IW , it is the instantaneous reactive current component of the line current. This instantaneous reactive current I Uq , I Vq , I
Wq is converted into the effective value, that is, the line currents a, b, and c of the instantaneous reactive current component by the effective value conversion circuit (6) in FIG.
(線電流−相電流変換の説明) 次に、第3図及び第4図を参照して線電流(瞬時無効電
流)a、b、cを相電流(瞬時無効電流)x、y、zに
変換する方法を説明する。(Description of Line Current-Phase Current Conversion) Next, referring to FIGS. 3 and 4, the line currents (instantaneous reactive currents) a, b, and c are converted into phase currents (instantaneous reactive currents) x, y, and z. The conversion method will be described.
第3図の線電流−相電流変換用の第2の演算回路(7)
は、次の(8)(9)(10)式に基づいて、線電流a、
b、cを相電流x、y、zに変換するように構成されて
いる。Second arithmetic circuit (7) for converting line current to phase current in FIG.
Is the line current a, based on the following equations (8), (9) and (10).
It is configured to convert b, c into phase currents x, y, z.
但し、Aは次式で示すものである。 However, A is shown by the following equation.
(8)(9)(10)式により、相電流x、y、zが近似
的に得られることを説明する。第1図の各負荷(2a)
(2b)(2c)の各力率が同一であるとすれば、各相の合
計された相電流x、y、zは位相差120度を有し、第4
図のベクトル図で表わすことが出来る。そして、各相電
流x、y、zと各線電流a、b、cとの関係も第4図の
如くになるので、両者の間に次の(11)式が成立する。 It will be described that the phase currents x, y, and z are approximately obtained by the equations (8), (9), and (10). Each load in Figure 1 (2a)
If the power factors of (2b) and (2c) are the same, the summed phase currents x, y, z of each phase have a phase difference of 120 degrees, and
It can be represented by the vector diagram of the figure. Since the relationship between the phase currents x, y, z and the line currents a, b, c is also as shown in FIG. 4, the following equation (11) is established between them.
この(12)式により次の(13)式が成立する。 The following expression (13) is established by the expression (12).
2(x+y+z)2−3(xy+yz+zx) =b2+c2+a2 ……(13) 一方、公式により次の(14)式が成立する。Meanwhile 2 (x + y + z) 2 -3 (xy + yz + zx) = b 2 + c 2 + a 2 ...... (13), the following equation (14) holds the official.
3(xy+yz+zx)2=2(b2c2+c2a2+a2b2) −(b4+c4+a4) ……(14) (14)式より次式が得られる。 3 (xy + yz + zx) 2 = 2 (b 2 c 2 + c 2 a 2 + a 2 b 2) - (b 4 + c 4 + a 4) ...... (14) (14) the following equation from the equation are obtained.
(15)式を(13)式に代入すると次式が得られる。 Substituting equation (15) into equation (13), the following equation is obtained.
以下、(16)式をAとする。また、(12)式より次式が
成立する。 Hereinafter, the expression (16) is referred to as A. Further, the following equation is established from the equation (12).
(18)式及びx+y+z=Aの関係から次式が成立す
る。 The following equation is established from the equation (18) and the relation of x + y + z = A.
この(19)式から前述の(8)(9)(10)式が得られ
る。従つて、(8)(9)(10)式は各相の相電流を表
わしている。 From the equation (19), the above equations (8), (9) and (10) are obtained. Therefore, the equations (8), (9) and (10) represent the phase current of each phase.
第3図の演算回路(7)は、(8)(9)(10)式の演
算を実行するために、第1図の実効値変換回路(6)に
接続される線電流入力ライン(21)(22)(23)に線電
流a、b、cの二乗値を求める二乗演算器(24)(25)
(26)を有する。各二乗演算器(24)(25)(26)の出
力段には、(8)(9)(10)式の中のa2+b2、b2+
c2、c2+a2の部分の演算をなすために加算器(27)(2
8)(29)が設けられ、また、(8)(9)(10)式の2
c2、2a2、2b2を得るために、2倍値演算器(30)(31)
(32)が設けられている。(33)(34)(35)は減算器
であり、前段の加算器(27)(28)(29)の出力から演
算器(30)(31)(32)の出力を減算して、(8)
(9)(10)式のa2+b2−2c2、b2+c2−2a2、c2+a2−
2b2を得るものである。(36)は加算器であり、加算器
(29)の出力c2+a2に、二乗演算器(25)の出力b2を加
算して(8)(9)(10)式のAに含まれるa2+b2+c2
を得るものである。(37)(38)(39)は除算器であ
り、前段の減算器(33)(34)(35)の出力を別に求め
た3Aで割算し、(8)(9)(10)式の第2項を求める
ものである。(40)(41)(42)は加算器であり、前段
の除算器(37)(38)(39)の出力と別に求めた(8)
(9)(10)式の第1項の値A/3とを加算して(8)
(9)(10)式の相電流x、y、zを出力するものであ
る。The arithmetic circuit (7) shown in FIG. 3 is connected to the RMS conversion circuit (6) shown in FIG. 1 in order to execute the equations (8), (9) and (10). ) (22) (23) Squared calculator (24) (25) for obtaining the squared value of the line current a, b, c
It has (26). At the output stage of each of the square calculators (24) (25) (26), a 2 + b 2 and b 2 + in the equations (8), (9) and (10)
In order to perform the operation of c 2 and c 2 + a 2 , the adder (27) (2
8) and (29) are provided, and 2 in the formulas (8), (9) and (10)
Double value calculator (30) (31) to obtain c 2 , 2a 2 and 2b 2
(32) is provided. (33), (34) and (35) are subtracters, which subtract the outputs of the arithmetic units (30), (31) and (32) from the outputs of the adders (27), (28) and (29) of the preceding stage, and 8)
(9) (10) of a 2 + b 2 -2c 2, b 2 + c 2 -2a 2, c 2 + a 2 -
You get 2b 2 . (36) is an adder, and the output b 2 of the square calculator (25) is added to the output c 2 + a 2 of the adder (29) and included in A of the equations (8), (9) and (10). A 2 + b 2 + c 2
Is what you get. (37) (38) (39) are dividers, which divide the output of the subtractors (33) (34) (35) at the previous stage by 3A, which is calculated separately, and then the formulas (8) (9) (10) The second term of is calculated. (40) (41) (42) are adders, which are obtained separately from the outputs of the dividers (37) (38) (39) in the previous stage (8)
(9) Add the value A / 3 of the first term in equation (10) to (8)
(9) The phase currents x, y, and z of the equations (10) are output.
線電流入力ライン(21)(22)(23)に接続されている
加算器(43)(44)(45)は、(8)(9)(10)式の
Aを示す式の中のa+b、b+c、c+aを求めるもの
である。加算器(46)は、加算器(43)の出力a+bに
ライン(23)のcを加算してAを示す式の中の(a+b
+c)を求めるものである。減算器(47)は加算器(4
3)の出力からライン(23)の出力を減算してAを示す
式のa+b−cを得るものである。減算器(48)は、加
算器(44)の出力からライン(21)の出力を減算して、
Aを示す式の(−a+b+c)を得る回路である。減算
器(49)は、加算器(45)の出力からライン(22)の出
力を減算してAを示す式の(a−b+c)を得る回路で
ある。乗算器(50)は加算器(46)の出力と減算器(4
7)の出力とを乗算してAを示す式の(a+b+c)
(a+b−c)を得る回路である。乗算器(51)は減算
器(48)の出力と減算器(49)の出力とを乗算して、A
を示す式の(−a+b+c)(a−b+c)を得る回路
である。乗算器(52)は前段の2つの乗算器(50)(5
1)の2つの出力を乗算し、Aを示す式の(a+b+
c)(−a+b+c)(a−b+c)(a+b−c)
(以下、これをBと呼ぶ)を得るものである。乗算器
(53)は前段の乗算器(52)の出力Bに基づいてB×3
を得る回路である。平方根演算器(54)は、前段の乗算
器(53)の出力3Bの平方根 を得る回路である。加算器(55)は前段の演算器(54)
の出力と加算器(36)の出力とを加算してAを示す式の を得る回路である。1/2除算器(56)は前段の加算器(5
5)の出力の1/2の出力を得る回路である。平方根演算器
(57)は、前段の1/2除算器(56)の出力の平方根即ち
Aを示す式の出力を得るものである。乗算器(58)は前
段の演算器(57)の出力Aに3を乗算して3Aを求め、こ
れを各相の除算器(37)(38)(39)に与えるものであ
る。除算器(69)は平方根演算器(57)の出力Aの1/3
を求め、これを加算器(40)(41)(42)に供給するも
のである。The adders (43), (44) and (45) connected to the line current input lines (21), (22) and (23) are a + b in the formulas (8), (9) and (10) showing A. , B + c, c + a. The adder (46) adds (c) of the line (23) to the output a + b of the adder (43) to obtain (a + b
+ C). The subtractor (47) is the adder (4
The output of line (23) is subtracted from the output of 3) to obtain a + bc of the expression indicating A. The subtractor (48) subtracts the output of the line (21) from the output of the adder (44),
This is a circuit for obtaining (-a + b + c) in the formula showing A. The subtracter (49) is a circuit that subtracts the output of the line (22) from the output of the adder (45) to obtain (ab + c) of the expression indicating A. The multiplier (50) is connected to the output of the adder (46) and the subtractor (4
(A + b + c) of the formula showing A by multiplying with the output of 7)
This is a circuit for obtaining (a + b-c). The multiplier (51) multiplies the output of the subtractor (48) and the output of the subtractor (49) to obtain A
Is a circuit that obtains (-a + b + c) (a-b + c) in the equation. The multiplier (52) is the former two multipliers (50) (5
The two outputs of 1) are multiplied, and (a + b +
c) (-a + b + c) (a-b + c) (a + b-c)
(Hereinafter, referred to as B). The multiplier (53) is B × 3 based on the output B of the multiplier (52) in the previous stage.
Is a circuit to obtain. The square root calculator (54) is the square root of the output 3B of the multiplier (53) in the previous stage. Is a circuit to obtain. The adder (55) is the previous-stage arithmetic unit (54)
Of the formula showing A by adding the output of and the output of the adder (36) Is a circuit to obtain. The 1/2 divider (56) is the adder (5
This is a circuit that obtains 1/2 the output of 5). The square root calculator (57) obtains the square root of the output of the 1/2 divider (56) in the preceding stage, that is, the output of the expression indicating A. The multiplier (58) multiplies the output A of the previous stage arithmetic unit (57) by 3 to obtain 3A, and supplies this to the dividers (37) (38) (39) of the respective phases. The divider (69) is 1/3 of the output A of the square root calculator (57).
Is obtained and is supplied to the adders (40) (41) (42).
(作用効果) 第1図において、進み無効電流供給回路(3a)(3b)
(3b)のコンデンサのすべてを切り離した状態におい
て、線電流IU、IV、IWが1.78A、1.65A、1.2A、各相の力
率が0.6、0.7、0.8、入力段の三相の総合力率が0.595と
なるような不平衡負荷(2)を接続した三相回路におい
て、線電流IU、IV、IWに基づいて瞬時無効電流の相電流
x、y、zを演算で求め、これを打ち消すようにコンデ
ンサを選択し、U−V間、V−W間、W−U間のコンデ
ンサの容量比を7:6:5としたところ、力率が約1.0になつ
た。即ち、線電流に基づいて良好に力率補償を行うこと
が出来た。(Function and effect) In FIG. 1, a lead reactive current supply circuit (3a) (3b)
With all the capacitors in (3b) disconnected, the line currents I U , I V , and I W are 1.78A, 1.65A, 1.2A, the power factor of each phase is 0.6, 0.7, 0.8, and the three phases of the input stage. In a three-phase circuit connected with an unbalanced load (2) such that the total power factor of 0.595 becomes 0.595, the phase currents x, y, z of the instantaneous reactive current are calculated based on the line currents I U , I V , and I W. Then, the capacitor was selected so as to cancel it out, and when the capacitance ratio of the capacitors between U-V, V-W, and W-U was set to 7: 6: 5, the power factor became about 1.0. . That is, the power factor could be satisfactorily compensated based on the line current.
(変形例) 本発明は上述の実施例に限定されるものではなく、例え
ば次の変形例が可能なものである。(Modification) The present invention is not limited to the above-described embodiments, and the following modifications are possible, for example.
(イ) 第5図は進み無効電流供給回路(3a)(3b)
(3c)の変形例を示す。この回路では各線間のコンデン
サC1、C2、C3に並列にリアクトルL1、L2、L3が接続さ
れ、リアクトルL1、L2、L3に直列にサイリスタS1、S2、
S3が接続されている。サイリスタS1、S2、S3は力率を1
にするように位相制御(導通角制御)される。従つて、
コンデンサ容量を連続的に制御したと等価な効果が得ら
れる。サイリスタS1、S2、S3の位相制御角は、瞬時無効
電流の相電流x、y、zに基づいて決定される。(A) Figure 5 shows the advanced reactive current supply circuit (3a) (3b)
A modified example of (3c) is shown. In this circuit the reactor L 1 in parallel with the capacitor C 1, C 2, C 3 between each line, L 2, L 3 is connected, the reactor L 1, L 2, thyristors in series with L 3 S 1, S 2,
S 3 is connected. Thyristors S 1 , S 2 and S 3 have a power factor of 1
The phase is controlled (conduction angle control) so that Therefore,
An effect equivalent to continuously controlling the capacitance of the capacitor can be obtained. The phase control angles of the thyristors S 1 , S 2 and S 3 are determined based on the phase currents x, y and z of the instantaneous reactive current.
(ロ) 第1図のサイリスタS1a〜S3nの代りに、電磁接
触器などの機械的スイツチを接続し、制御の応答速度を
遅らせて、単に三相不平衡負荷、不平衡力率の力率調整
装置としてもよい。(B) Instead of the thyristors S 1a to S 3n shown in Fig. 1, connect a mechanical switch such as an electromagnetic contactor to delay the control response speed, and simply use the three-phase unbalanced load and unbalanced power factor force. It may be a rate adjusting device.
(ハ) 演算回路(5)(7)をアナログ演算器で構成
する代りに、マイクロコンピユータによるデイジタル演
算回路としてもよい。(C) The arithmetic circuits (5) and (7) may be digital arithmetic circuits using a micro computer instead of the analog arithmetic units.
(ニ) 実効値変換回路(6)は基本波成分の実効値を
求めるように構成されているが、瞬時無効電流成分全部
の実効値を求めるようにしてもよい。(D) Although the effective value conversion circuit (6) is configured to determine the effective value of the fundamental wave component, it may be configured to determine the effective value of all the instantaneous reactive current components.
(ホ) サイリスタS1a〜S3n、S1〜S3は、トライアツク
に限ることなく、単一方向制御のサイリスタ(SCR)を
逆並列にしたものでもよい。(E) The thyristors S 1a to S 3n and S 1 to S 3 are not limited to triacs, but may be unidirectional controlled thyristors (SCRs) in antiparallel.
上述から明らかな如く、本発明によれば、三相不平衡負
荷の力率改善を線電流検出に基づいて容易に達成するこ
とが出来る。As apparent from the above, according to the present invention, the power factor improvement of the three-phase unbalanced load can be easily achieved based on the line current detection.
第1図は本発明の実施例に係わる三相力率調整装置を示
すブロツク図、 第2図は第1図の第1の演算回路を示すブロツク図、 第3図は第1図の第2の演算回路を示すブロツク図、 第4図は三相不平衡負荷の線電流と相電流との関係を示
すブロツク図、 第5図は変形例の力率調整回路を示す回路図である。 (1u)(1v)(1w)……電源線、(2)……不平衡負
荷、(3a)(3b)(3c)……進み無効電流供給回路、
(4a)(4b)(4c)……電流検出器、(5)……第1の
演算回路、(6)……実効値変換回路、(7)……第2
の演算回路、(8)……ゲート制御回路。1 is a block diagram showing a three-phase power factor adjusting device according to an embodiment of the present invention, FIG. 2 is a block diagram showing a first arithmetic circuit of FIG. 1, and FIG. 3 is a second diagram of FIG. 4 is a block diagram showing the arithmetic circuit of FIG. 4, FIG. 4 is a block diagram showing the relationship between the line current and the phase current of a three-phase unbalanced load, and FIG. 5 is a circuit diagram showing a power factor adjusting circuit of a modified example. (1u) (1v) (1w) ... power line, (2) ... unbalanced load, (3a) (3b) (3c) ... advanced reactive current supply circuit,
(4a) (4b) (4c) ... current detector, (5) ... first arithmetic circuit, (6) ... effective value conversion circuit, (7) ... second
Operation circuit of (8) ... Gate control circuit.
Claims (1)
衡負荷(2)の第1相、第2相及び第3相の線電流
(IU、IV、IW)を検出する第1、第2及び第3の線電流
検出器(4a)(4b)(4c)と、 前記第1、第2及び第3の線電流検出器(4a)(4b)
(4c)で検出された第1、第2及び第3相線電流(IU、
IV、IW)に基づいて第1相、第2相及び第3相の瞬時無
効電流(IUq、IVq、IWq)を求める第1の演算回路
(5)と、 前記第1の演算回路(5)から得られる第1、第2及び
第3の瞬時無効電流(IUq、IVq、IWq)の実効値(a、
b、c)を求める実効値変換回路(6)と、 線電流で表される各相の瞬時無効電流の前記実効値
(a、b、c)を相電流(x、y、z)に変換する第2
の演算回路(7)と、 前記三相交流電源線の各線間に接続された三相の無効電
流供給回路(3a)(3b)(3c)と、 前記第2の演算回路(7)から得られる瞬時無効電流の
相電流(x、y、z)に基づいて前記三相不平衡負荷
(2)と前記無効電流供給回路(3a)(3b)(3c)とを
組み合せた三相交流回路の力率を所定値にするように前
記無効電流供給回路(3a)(3b)(3c)を制御する回路
(8)と から成る三相交流回路の力率調整装置。1. A line current (I U , I V , I W ) of a first phase, a second phase and a third phase of a three-phase unbalanced load (2) connected to a three-phase AC power line is detected. First, second and third line current detectors (4a) (4b) (4c), and the first, second and third line current detectors (4a) (4b)
The first, second and third phase line currents (I U , detected in (4c))
A first arithmetic circuit (5) for obtaining instantaneous reactive currents (I Uq , I Vq , I Wq ) of the first phase, the second phase and the third phase based on I V , I W ); The effective value (a, a) of the first, second and third instantaneous reactive currents (I Uq , I Vq , I Wq ) obtained from the arithmetic circuit (5)
b, c) effective value conversion circuit (6), and converts the effective value (a, b, c) of the instantaneous reactive current of each phase represented by line current into phase current (x, y, z) Second
Obtained from the arithmetic circuit (7), the three-phase reactive current supply circuits (3a) (3b) (3c) connected between the three-phase AC power supply lines, and the second arithmetic circuit (7). Of a three-phase AC circuit combining the three-phase unbalanced load (2) and the reactive current supply circuits (3a) (3b) (3c) based on the phase current (x, y, z) of the instantaneous reactive current A power factor adjusting device for a three-phase AC circuit, comprising a circuit (8) for controlling the reactive current supply circuits (3a) (3b) (3c) so that the power factor becomes a predetermined value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60137499A JPH07104741B2 (en) | 1985-06-24 | 1985-06-24 | Power factor adjusting device for three-phase AC circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60137499A JPH07104741B2 (en) | 1985-06-24 | 1985-06-24 | Power factor adjusting device for three-phase AC circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS621020A JPS621020A (en) | 1987-01-07 |
| JPH07104741B2 true JPH07104741B2 (en) | 1995-11-13 |
Family
ID=15200087
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60137499A Expired - Fee Related JPH07104741B2 (en) | 1985-06-24 | 1985-06-24 | Power factor adjusting device for three-phase AC circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07104741B2 (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56159936A (en) * | 1980-05-09 | 1981-12-09 | Sanken Electric Co Ltd | Method of controlling electric power |
-
1985
- 1985-06-24 JP JP60137499A patent/JPH07104741B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPS621020A (en) | 1987-01-07 |
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