JPH07105550B2 - Method for manufacturing semiconductor light emitting device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to selective anisotropic etching treatment depending on the composition of a semiconductor layer when forming an active region of a semiconductor light emitting device having a buried structure into a stripe shape,
By performing the non-selective isotropic etching process, good controllability is secured and the characteristics of the semiconductor light emitting device are improved.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor light emitting device, and in particular, suppresses a problem such as a leakage current at an interface between a stripe region and a buried layer of a semiconductor light emitting device having a buried structure, and realizes a reduction in threshold current and an improvement in efficiency. To improve the manufacturing method.

2. Description of the Related Art A semiconductor light emitting device plays an extremely important role as a light source for generating an optical signal in optical communication and other systems using light as a medium for an information signal.

Therefore, in order to advance the sophistication and diversification of these systems, further improvement in characteristics such as threshold current and efficiency of semiconductor light emitting devices, particularly lasers, is demanded.

[Conventional technology]

For example, a wavelength suitable for transmission by silica fiber for optical communication.
As a semiconductor laser having a band of about 1.3 to 1.6 μm, an indium phosphide / indium gallium arsenide phosphide (InP / InGaAsP) system BH (Buried Heterostructur) whose schematic side sectional view is shown in FIG.
e) Lasers are known.

The semiconductor body of a distributed feedback InP / InGaAsP-based BH laser is, for example, an n-type InGaAsP epitaxial growth grown on a substrate on which a diffraction grating (a periodic structure does not appear in this sectional view) is formed on an n-type InP substrate 21. Waveguide layer 22, InGaAsP active layer 23, p
The heterojunction layered structure including the InP confinement layer 24 and the InGaAsP contact layer 25 is mesa-etched to form a stripe region, and the p-type InP current confinement layer 27 and the n-type InP block layer which are embedded and grown in the etched region are formed. By 28, the refractive index guiding current is narrowed to control the transverse mode of the laser light. Reference numeral 29 is an insulating film, 30 is a P-side electrode, and 31 is an n-side electrode.

In this conventional example, the semiconductor layer is epitaxially grown on the (100) plane of the semiconductor substrate 21, and the length direction of the stripe region is the [011] direction. This is provided with a mask in this crystal direction, and bromine (Br) -methanol (CH ₃ O
(H) If etching is performed in a mesa shape with a solution or the like, the (111) A plane appears on the etching surface as shown in the figure, and the width becomes the narrowest in the vicinity of the active layer 23, which is important for controlling the transverse mode of the laser. This is because it is easy to control the width of the active layer 23.

[Problems to be solved by the invention]

In the above-mentioned anisotropic etching method for forming the mesa-shaped stripe region, the (111) A plane appears on the side surface of the mesa, and during the buried growth, the p-type InP current confinement layer 27 and the n-type current confinement layer 27 are formed on the (111) A plane. The InP block layer 28 will be grown by, for example, a liquid phase epitaxial growth method.

However, this (111) A plane is a plane composed of group III atoms such as In, is easily combined with ambient oxygen (O ₂ ) during etching, and is susceptible to contamination. There are problems such as susceptibility and slow growth compared to other aspects. The thermal transformation causes an increase in threshold current and a decrease in efficiency, which is considered to be due to the formation of a conductive path due to excess In at the interface between the stripe region and the buried layer.

To solve this problem, a manufacturing method in which the active layer is placed at or below the most constricted position of the mesa and the side surface of the active layer is removed from the (111) A surface has been attempted. Not only the (111) A plane appears, but the position control of this active layer is poor in stability.

From the current situation as described above, there is a strong demand for a manufacturing method which can secure the controllability of the cross-sectional shape of the mesa-shaped stripe region and solve the above problems.

[Means for solving problems]

The problem is that the compound semiconductor substrate has (2) on the (100) plane.
A heterojunction structure composed of an original compound semiconductor layer and a mixed crystal compound semiconductor layer is formed, and the binary compound semiconductor layer and the mixed crystal compound semiconductor layer are sequentially subjected to selective anisotropic etching to obtain a long side Forming a stripe-shaped mesa region in the [011] direction, further performing non-selective isotropic etching to form the mesa region into a desired shape, and removing the (111) A face from the side surface thereof, This is solved by a method of manufacturing a semiconductor light emitting device in which a semiconductor layer that fills the mesa region is grown.

[Action]

In the method for manufacturing a semiconductor light emitting device according to the present invention, when forming a semiconductor layer having a heterojunction structure on the (100) plane of a compound semiconductor substrate into a stripe-shaped mesa region, first, a binary compound layer and a mixed crystal compound layer are formed. Anisotropic etching method that selectively acts on only one of them forms a mesa region with a long side in a stripe pattern in the [011] direction with good controllability, and further performs a non-selective isotropic etching process. Then, the mesa region is formed into a desired shape and size such that the crystal plane does not appear.

According to the manufacturing method of the present invention, the controllability of the shape and size of the active region is better than that of the conventional method, and (111) A
Since the surface is removed, the above-mentioned problems are solved, and a semiconductor light emitting device having excellent characteristics can be obtained.

〔Example〕

 The present invention will be specifically described below with reference to examples.

1A to 1D are schematic side cross-sectional views in order of the processes, showing an embodiment of the present invention.

See FIG. 1 (a): For example, in the [011] direction (perpendicular to the paper surface) on the (100) plane of the n-type InP substrate 1, synchronization Λ≈0.2 μ
m diffraction grating is formed, and the thickness is 0.15μ on this surface.
m, non-doped InG with a luminescence peak wavelength of 1.2 μm
aAsP waveguide layer 2, thickness of eg 0.12 μm, undoped InGaAsP active layer 3 with luminescence peak wavelength of 1.3 μm, thickness of eg 1.5 μm, p-type InP with carrier concentration of about 7 × 10 ¹⁷ cm ⁻³
Confinement layer 4, thickness for example 0.5 μm, carrier concentration 1 × 1
A p-type InGaAsP contact layer 5 of about ¹⁸ cm ⁻³ is sequentially epitaxially grown.

A mask 6 for forming the stripe region is formed on the semiconductor substrate surface [01] by using, for example, silicon dioxide (SiO ₂ ), silicon nitride (SiN _x ), aluminum oxide (Al ₂ O ₃ ), or the like.
1] direction, for example, a width of 2.5 to 3 μm and a thickness of about 100 mm.

See FIG. 1 (b): As a first etching process for forming a stripe region on this semiconductor substrate, InGaAs is used.
The contact layer 5, the active layer 3, and the waveguiding layer 2 made of P are nitric acid (HNO ₃ ), and the p-type confinement layer 4 made of InP is hydrobromic acid (HBr) or hydrochloric acid (HCl). To etch.

This first etching process is anisotropic and the mesa cross section is InGa
In the AsP layers 5, 3 and 2, the (111) A plane is formed, and in the InP layer 4, (111)
The shape shown in FIG.

See FIG. 1C: Next, a second etching process is performed. This treatment is a non-selective and isotropic etching method in which side etching is relatively large, such as wet etching with a mixed solution of HBr and hydrogen peroxide solution (H ₂ O ₂ ). By this processing, the (111) A plane and the (111) B plane do not appear, and a mesa cross-sectional shape as shown is obtained.

See FIG. 1 (d): This semiconductor substrate has a thickness of, for example, 1.
5 μm, p-type InP current confinement layer 7 having a carrier concentration of about 1 × 10 ¹⁸ cm ⁻³ , thickness of, for example, 1.5 μm, carrier concentration 7 × 10 ¹⁸ cm
The n-type InP current blocking layer 8 of about ^-3 is sequentially buried and grown.

This growth is usually performed by liquid phase epitaxial growth method, and has a saturation temperature lower than In or the growth start temperature just before the growth.
It is desirable to use an InP solution to melt back the surface layer portion of the semiconductor substrate that has deteriorated due to heating for dissolving the solution. In this embodiment, the width of the active layer 3 after the meltback is set to, for example, about 1 μm.

Next, the mask 6 is removed, for example, the SiO ₂ insulating film 9, the p-side electrode 10 and the n-side electrode 11 are formed, and the device of this embodiment is completed through a process such as chip division.

In the present embodiment, a threshold current of 20 mA or less, an external differential efficiency of about 20% in the rated operating state is obtained, and in the conventional example corresponding to this, for example, a threshold current of about 20 to 30 mA, external differential efficiency
A clear improvement has been demonstrated compared to around 15%.

〔The invention's effect〕

As described above, according to the present invention, the stripe region of the BH laser can be mesa-etched with good controllability without leaving the (111) A plane, and the characteristics such as the threshold current and efficiency of the semiconductor light emitting device can be improved. As a result, it is possible to increase the output, increase the operating temperature range, and the like, which can contribute to the progress of optical application systems and the like.

[Brief description of drawings]

1 (a) to 1 (d) are schematic side cross-sectional views in order of the steps of an embodiment of the present invention, and FIG. 2 is a schematic side cross-sectional view of a conventional example. In the figure, 1 is an n-type InP substrate, 2 is an InGaAsP waveguide layer, 3 is an InGaAsP active layer, 4 is a p-type InP confinement layer, 5 is a p-type InGaAsP contact layer, 6 is a mask, and 7 is a p-type InP current constriction. Layer, 8 is n
Type InP current blocking layer, 9 is an insulating film, 10 is a p-side electrode, 11
Indicates an n-side electrode.

Claims (2)

[Claims] 1. A heterojunction structure composed of a binary compound semiconductor layer and a mixed crystal compound semiconductor layer is formed on a (100) plane of a compound semiconductor substrate, and the binary compound semiconductor layer and the mixed crystal compound semiconductor layer are formed. And then sequentially subjected to selective anisotropic etching, the long side is [011]
Forming a mesa region having a stripe shape in the direction, and further performing non-selective isotropic etching to form the mesa region into a desired shape and from its side surface (111)
A method for manufacturing a semiconductor light emitting device, which comprises removing the surface A and then growing a semiconductor layer filling the mesa region. 2. The semiconductor according to claim 1, wherein the binary compound semiconductor is an indium phosphorus compound, and the mixed crystal compound semiconductor is an indium gallium arsenide phosphorus compound or an indium gallium arsenide compound. A method for manufacturing a light emitting device.