JPH07105584B2 - Copper / organic insulation film wiring board manufacturing method - Google Patents
Copper / organic insulation film wiring board manufacturing methodInfo
- Publication number
- JPH07105584B2 JPH07105584B2 JP63183053A JP18305388A JPH07105584B2 JP H07105584 B2 JPH07105584 B2 JP H07105584B2 JP 63183053 A JP63183053 A JP 63183053A JP 18305388 A JP18305388 A JP 18305388A JP H07105584 B2 JPH07105584 B2 JP H07105584B2
- Authority
- JP
- Japan
- Prior art keywords
- copper
- film
- organic insulating
- insulating film
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims description 42
- 229910052802 copper Inorganic materials 0.000 title claims description 42
- 239000010949 copper Substances 0.000 title claims description 42
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 238000009413 insulation Methods 0.000 title 1
- 229920001721 polyimide Polymers 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 16
- 238000007733 ion plating Methods 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 13
- 239000000919 ceramic Substances 0.000 claims description 9
- 238000010849 ion bombardment Methods 0.000 claims description 9
- 238000000059 patterning Methods 0.000 claims description 9
- 238000001259 photo etching Methods 0.000 claims description 9
- 239000007789 gas Substances 0.000 claims description 4
- 239000011261 inert gas Substances 0.000 claims description 3
- 230000001590 oxidative effect Effects 0.000 claims description 3
- ALKZAGKDWUSJED-UHFFFAOYSA-N dinuclear copper ion Chemical compound [Cu].[Cu] ALKZAGKDWUSJED-UHFFFAOYSA-N 0.000 claims 1
- 239000013078 crystal Substances 0.000 description 11
- 239000004642 Polyimide Substances 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 6
- 230000005284 excitation Effects 0.000 description 5
- 239000002966 varnish Substances 0.000 description 5
- 238000005260 corrosion Methods 0.000 description 4
- 230000007797 corrosion Effects 0.000 description 4
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910052863 mullite Inorganic materials 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 238000010894 electron beam technology Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000005204 segregation Methods 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- 238000001771 vacuum deposition Methods 0.000 description 2
- PEEHTFAAVSWFBL-UHFFFAOYSA-N Maleimide Chemical compound O=C1NC(=O)C=C1 PEEHTFAAVSWFBL-UHFFFAOYSA-N 0.000 description 1
- 241001289460 Muehlenbeckia complexa Species 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010891 electric arc Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229920006254 polymer film Polymers 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physical Vapour Deposition (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
【発明の詳細な説明】 〈産業上の利用分野〉 本発明は、銅・有機絶縁膜配線板の製造方法に関する。The present invention relates to a method for manufacturing a copper / organic insulating film wiring board.
〈従来の技術〉 LSIの高速化、高集積化に伴い、これを搭載する配線板
もそれへの対応が要求されており、LSIの高密度実装基
板として電気抵抗の小さい銅と誘電率が低く、かつ厚い
膜の形成が可能なポリイミドを用いた配線板が高速信号
処理が可能なことから注目されている。<Prior art> As the speed and integration of LSIs increase, so does the wiring board on which they are mounted, which requires copper with low electrical resistance and low dielectric constant as a high-density mounting board for LSIs. In addition, a wiring board using polyimide capable of forming a thick film is attracting attention because it can perform high-speed signal processing.
ところで、この種の配線板の製造法としてはアルミナ、
ムライト、AlNなどのセラミック基板上にスピンコート
法などによりポリイミドワニスを所望の厚さに塗布し、
これをベーキング処理し、固化させた後、真空蒸着法に
より、銅膜を所望の厚さに形成し、これをフォトエッチ
ング法により回路を形成するのが一般的である。また、
必要に応じて、このような方法によりポリイミド膜と銅
膜の形成を交互に繰返し、多層の配線板を製造すること
ができる。By the way, as a manufacturing method of this kind of wiring board, alumina,
Applying polyimide varnish to a desired thickness by spin coating etc. on a ceramic substrate such as mullite or AlN,
It is general that after baking and solidifying this, a copper film is formed to a desired thickness by a vacuum vapor deposition method, and a circuit is formed by this using a photoetching method. Also,
If necessary, the formation of the polyimide film and the copper film can be alternately repeated by such a method to manufacture a multilayer wiring board.
〈発明が解決しようとする課題〉 上記銅ポリイミド配線板の製造において、フォトエッチ
ング法により配線回路を形成する場合、銅膜とポリイミ
ド膜との密着性が悪く、時として銅膜が剥離する場合が
ある。また、剥離しないまでも形成する配線回路幅が微
細な場合には、接着強度の局部的なバラツキによりリー
ド幅が局部的に変化したり、欠けたりすることがある。<Problems to be Solved by the Invention> In the production of the copper-polyimide wiring board, when a wiring circuit is formed by a photoetching method, the adhesion between the copper film and the polyimide film is poor, and the copper film sometimes peels off. is there. Further, if the wiring circuit width to be formed is small even before peeling, the lead width may be locally changed or chipped due to local variation in adhesive strength.
なお、リード幅の局部的変化、欠けの発生は、詳細な材
料調査の結果、単に接着強度のバラツキのみならず、蒸
着した銅膜の耐食性と深い関係があることがわかった。
すなわち、銅膜の耐食性が悪い場合には、エッチングの
際に銅膜の一部が結晶粒が欠落しやすい。このため、リ
ード幅が極度に微細になった場合には、結晶粒の欠落が
リードの断線にもつながりかねない危険がある。As a result of a detailed material investigation, it was found that the local change in the lead width and the occurrence of chipping are deeply related to not only the variation in the adhesive strength but also the corrosion resistance of the deposited copper film.
That is, when the corrosion resistance of the copper film is poor, crystal grains are likely to be missing from a part of the copper film during etching. For this reason, when the lead width becomes extremely fine, there is a risk that the loss of crystal grains may lead to disconnection of the lead.
本発明は、前記従来技術の欠点を解消し、有機絶縁膜、
例えばポリイミド膜への密着強度が高く耐食性が良好で
パターニング性（配線回路形成性）が優れた銅膜を有す
る銅・有機絶縁膜配線板を提供することを目的としてい
る。The present invention eliminates the above-mentioned drawbacks of the prior art, an organic insulating film,
For example, it is an object of the present invention to provide a copper / organic insulating film wiring board having a copper film having high adhesion strength to a polyimide film, good corrosion resistance, and excellent patterning property (wiring circuit formability).
〈課題を解決するための手段〉 上記目的を達成するために、本発明によれば、セラミッ
ク基板上に有機絶縁膜を形成し、つぎに該有機絶縁膜上
にイオンプレーティング法により純度が99.999％以上の
銅膜を形成したのち、フォトエッチング法によりパター
ニングを行うことを特徴とする銅・有機絶縁膜配線板の
製造方法が提供される。<Means for Solving the Problems> In order to achieve the above object, according to the present invention, an organic insulating film is formed on a ceramic substrate, and then the purity is 99.999 by an ion plating method on the organic insulating film. A copper / organic insulating film wiring board manufacturing method is provided, which comprises patterning by a photo-etching method after forming a copper film of not less than 100%.
また、本発明によれば、セラミック基板上に有機絶縁膜
を形成し、つぎに該有機絶縁膜の表面を不活性ガスまた
は弱酸化性ガス雰囲気下でイオンボンバード処理したの
ち、この有機絶縁膜上にイオンプレーティング法により
純度が99.999％以上の銅膜を形成し、続いてフォトエッ
チング法によりパターニングを行うことを特徴とする銅
・有機絶縁膜配線板の製造方法が提供される。Further, according to the present invention, an organic insulating film is formed on a ceramic substrate, and then the surface of the organic insulating film is subjected to ion bombardment treatment in an inert gas or weak oxidizing gas atmosphere. There is provided a method for producing a copper / organic insulating film wiring board, which comprises forming a copper film having a purity of 99.999% or more by an ion plating method and then performing patterning by a photoetching method.
前記有機絶縁膜はポリイミド膜が好ましい。The organic insulating film is preferably a polyimide film.
以下に本発明を、さらに詳細に説明する。The present invention will be described in more detail below.
本発明に用いられるセラミック基板としては、アルミナ
板、ムライト板、AlN板、SiC板などを挙げることができ
る。Examples of the ceramic substrate used in the present invention include an alumina plate, a mullite plate, an AlN plate, and a SiC plate.
本発明に用いられる有機絶縁膜としては、ポリイミド膜
のほか、誘電率が小さく耐熱性に優れたマレイミド、テ
フロンなど各種高分子膜が挙げられるが、特にポリイミ
ド膜は、他の有機絶縁膜に比べて金属との密着性が良好
で、かつ経済的に安価であるため好ましい。As the organic insulating film used in the present invention, in addition to the polyimide film, maleimide having a small dielectric constant and excellent heat resistance, various polymer films such as Teflon can be mentioned, but the polyimide film is particularly preferable as compared with other organic insulating films. And adhesion to metal is good, and economically inexpensive.
また、本発明で形成される銅膜の純度は、99.999％以上
が好ましい。この純度が99.999％未満では、含有してい
る微量不純物の偏析、あるいはそれに起因する結晶粒度
のバラツキにより、後工程であるエッチング時に結晶一
部が欠落しやすくなる。特に、純度が99.9996％以上で
は、結晶の欠落が著しく減少するので望ましい。Further, the purity of the copper film formed in the present invention is preferably 99.999% or more. If the purity is less than 99.999%, a part of the crystal is likely to be lost at the time of etching which is a post-process due to segregation of trace impurities contained therein or variation in crystal grain size due to the segregation. In particular, when the purity is 99.9996% or more, crystal loss is remarkably reduced, which is desirable.
まず、前記セラミック基板上に、常法によって前記有機
絶縁膜の原料に例えばワニスを塗布し、ベーキングして
固化、成膜させる。First, a varnish, for example, is applied to the raw material of the organic insulating film on the ceramic substrate by a conventional method, followed by baking to solidify and form a film.
次に、前記有機絶縁膜の表面にイオンプレーティング法
により銅膜を形成させる。イオンプレーティング法とし
ては、高周波励起形、アーク放電形、直流電界等いずれ
も用いることができ、雰囲気ガスとしてはAr、N2、（Ar
＋N2）、（Ar＋O2）などを用いることができる。Next, a copper film is formed on the surface of the organic insulating film by an ion plating method. As the ion plating method, any of a high frequency excitation type, an arc discharge type, a DC electric field, etc. can be used, and Ar, N 2 , (Ar
+ N 2 ) and (Ar + O 2 ) can be used.
イオンプレーティング法は、真空蒸着法に比較し蒸着原
子のエネルギが大きいため、基板との密着性が大きく、
また膜が緻密である。膜が緻密であるため耐食性が良好
となりパターニング性を向上させることができる。The ion plating method has large energy of vapor deposition atoms as compared with the vacuum vapor deposition method, and thus has high adhesion to the substrate,
Also, the film is dense. Since the film is dense, the corrosion resistance is good and the patterning property can be improved.
この銅膜を形成する前に、予め前記有機絶縁膜の表面を
不活性ガスまたは弱酸化性ガス、例えばAr、N2、（Ar＋
N2）、O2、（N2＋O2）、（Ar＋O2）などの雰囲気下でイ
オンボンバード処理しておくと、有機絶縁膜と銅膜との
密着性が向上するので好ましい。イオンボンバード処理
としては、高周波励起形、直流電界形などを用いること
ができる。Before forming the copper film, the surface of the organic insulating film is previously formed on the surface of the organic insulating film by an inert gas or a weak oxidizing gas such as Ar, N 2 , (Ar +
It is preferable to perform the ion bombardment treatment in an atmosphere of N 2 ), O 2 , (N 2 + O 2 ), (Ar + O 2 ) or the like because the adhesion between the organic insulating film and the copper film is improved. As the ion bombardment treatment, a high frequency excitation type, a DC electric field type or the like can be used.
前記銅膜の厚さは、必要に応じて適宜選択できるが、一
般的には0.3〜10μｍ程度である。0.3μｍ未満では、電
気抵抗が大きすぎ、また、10μｍを超えると成膜に時間
がかかり高コストとなる。The thickness of the copper film can be appropriately selected according to need, but is generally about 0.3 to 10 μm. If it is less than 0.3 μm, the electric resistance is too large, and if it exceeds 10 μm, it takes a long time to form a film, resulting in a high cost.
前記銅膜形成に続いて、常法によりフォトエッチング法
によりパターニングを行い、銅ポリイミド系配線板が得
られる。Subsequent to the formation of the copper film, patterning is performed by a photoetching method according to a conventional method to obtain a copper polyimide wiring board.
なお、上記有機絶縁膜と銅膜の形成は必要に応じて適宜
繰返えすことにより、多層の配線板を製造することがで
きる。The formation of the organic insulating film and the copper film can be repeated as necessary to manufacture a multilayer wiring board.
また、有機絶縁膜に銅を直接蒸着する場合について、説
明したが、予め有機絶縁膜に異種金属、例えば、Ti、C
r、Ni、Znなどの薄層を蒸着し、その上に銅を蒸着して
もよい。Also, the case where copper is directly vapor-deposited on the organic insulating film has been described, but different metals such as Ti and C are previously formed on the organic insulating film.
It is also possible to deposit a thin layer of r, Ni, Zn, etc., and then deposit copper on it.
〈実施例〉 以下に本発明を実施例に基づき具体的に説明する。<Examples> The present invention will be specifically described below based on Examples.
（実施例１） 厚さ1mmのアルミナ板上にポリイミドワニスを20μｍ厚
さ塗布し、これを350℃でベーキングし、固化させる操
作を４回繰返することにより約20μｍ厚さのポリイミド
膜を得たのち、その表面に特別に何らの処理をすること
なしに純度99.998％の銅を電子ビーム加熱式で真空度４
×10-5torr、基板温度200℃、成膜速度30Å/secの条件
で５μｍ厚さ真空蒸着した試料と、前記真空蒸着法のか
わりに電子ビーム加熱式の高周波励起形で真空度1.4×1
0-4torr、高周波電力200W、基板温度200℃、成膜速度30
Å/secの条件でイオンプレーティング法により５μｍ厚
さ真空蒸着した試料を作成した。(Example 1) A polyimide varnish having a thickness of 20 µm was applied on an alumina plate having a thickness of 1 mm, baking was performed at 350 ° C, and solidification was repeated 4 times to obtain a polyimide film having a thickness of about 20 µm. After that, the surface of the copper is 99.998% pure with electron beam heating and the degree of vacuum is 4 without any special treatment.
Samples vacuum-deposited to a thickness of 5 μm under the conditions of × 10 -5 torr, substrate temperature of 200 ° C, and deposition rate of 30 Å / sec, and electron beam heating type high frequency excitation type vacuum degree 1.4 × 1 instead of the vacuum evaporation method
0 -4 torr, high frequency power 200W, substrate temperature 200 ° C, film formation rate 30
A sample was vacuum-deposited in a thickness of 5 μm by an ion plating method under the condition of Å / sec.
このようにして作成した試料の蒸着膜の密着力を測定し
たところ、イオンプレーティング法による試料の密着強
度は、引剥し強さで1.36gf/cmであり、真空蒸着による
試料のそれ（1.13gf/cm）の約1.2倍であった。When the adhesion of the vapor-deposited film of the sample prepared in this way was measured, the adhesion strength of the sample by the ion plating method was 1.36 gf / cm in peeling strength, and that of the sample by vacuum evaporation (1.13 gf / cm) was about 1.2 times.
さらに、これらの試料をフォトエッチング法により塩化
銅溶液を用い線幅40μｍ、線間ピッチ40μｍのパターニ
ングを行ったところ、イオンプレーティング膜のもの
は、第１図に示すリード１のサイド面1aでの結晶粒の欠
落が、真空蒸着膜のものの場合（第2a図参照）にくらべ
第2b図に黒点で示す如く欠落が少く、またリード欠け５
等も少なかった。なお、第１図の２は有機絶縁膜（ポリ
イミド膜）、３はセラミック基板、第2a図および第2b図
の４は結晶粒を示している。Further, when these samples were patterned by a photoetching method using a copper chloride solution with a line width of 40 μm and a pitch between lines of 40 μm, the ion plating film had a side surface 1a of the lead 1 shown in FIG. As shown by the black dots in Fig. 2b, the number of missing crystal grains is smaller than that of the vacuum-deposited film (see Fig. 2a), and the lead missing 5
And so on. In addition, 2 in FIG. 1 is an organic insulating film (polyimide film), 3 is a ceramic substrate, and 4 in FIGS. 2a and 2b are crystal grains.
（実施例２） 厚さ1mmのムライト板にポリイミドワニスを20μｍ厚さ
塗布し、これを350℃でベーキングし、固化させる操作
を４回繰返すことにより、約20μｍ厚さのポリイミド膜
を得たのち、その表面に純度99.997％の銅および99.999
7％の銅をイオンプレーティング法によりそれぞれ別個
に蒸着した。Example 2 A polyimide varnish having a thickness of 20 μm was applied to a mullite plate having a thickness of 1 mm, baking was performed at 350 ° C., and solidification was repeated 4 times to obtain a polyimide film having a thickness of about 20 μm. , 99.997% pure copper and 99.999 on its surface
7% copper was separately deposited by the ion plating method.
イオンプレーティングは、電子ビーム加熱式の高周波励
起形により、1.5×10-4torrの圧力で、高周波電力200
W、基板温度200℃、成膜速度30Å/secで行った。Ion plating is a high-frequency excitation type of electron beam heating, and at a pressure of 1.5 × 10 -4 torr, high-frequency power 200
W, the substrate temperature was 200 ° C., and the film formation rate was 30 Å / sec.
得られた蒸着膜をフォトエッチング法により塩化銅溶液
を用いて線幅40μｍ、線間ピッチ40μｍのパターニング
を行ったところ、99.997％純度の銅膜の場合は、リード
のサイド面での結晶粒の欠落が比較的多いのに対して、
99.9997％純度のものの場合は、上記結晶粒の欠落は殆
ど認められなかった。The deposited film obtained was patterned by photoetching method using a copper chloride solution with a line width of 40 μm and a pitch between lines of 40 μm. In the case of a 99.997% pure copper film, the crystal grains on the side surface of the lead were While there are relatively many omissions,
In the case of 99.9997% purity, the above-mentioned lack of crystal grains was hardly recognized.
（実施例３） 厚さ1mmのムライト板にポリイミドワニスを20μｍ厚さ
塗布し、これを350℃でベーキングし、固化させる操作
を４回繰返すことにより約20μｍ厚さのポリイミド膜を
得たのち、固化したポリイミド膜の表面を後述の条件で
イオンボンバードした試料としない試料を用意しそれぞ
れに後述の条件でイオンプレーテング方向により純度9
9.997％の銅を５μｍ厚さ蒸着し、その接着強度を比較
調査した。その結果、イオンボンバード処理しない試料
の銅膜の接着強度は1.35gf/cmであるのに対しイオンボ
ンバード処理した試料のそれは1.47gf/cmであり、優れ
た密着性を示した。なお、イオンボンバード処理は、３
×10-3torrのArガス雰囲気下、高周波励起式で高周波電
力300Wで10分間行った。また、イオンブレーティングは
1.6×10-4torrの圧力で高周波電力200W基板温度200℃、
成膜速度30Å/secで行った。Example 3 A polyimide varnish having a thickness of 1 μm was applied to a thickness of 20 μm on a mullite plate, baked at 350 ° C., and solidified to obtain a polyimide film having a thickness of about 20 μm. Samples were prepared by ion bombarding the surface of the solidified polyimide film under the conditions described below, and samples without the ion bombardment.
9.997% copper was vapor-deposited to a thickness of 5 μm, and its adhesive strength was comparatively investigated. As a result, the adhesion strength of the copper film of the sample not subjected to ion bombardment treatment was 1.35 gf / cm, whereas that of the sample subjected to ion bombardment treatment was 1.47 gf / cm, showing excellent adhesion. Ion bombardment treatment is 3
It was performed for 10 minutes at a high frequency power of 300 W by a high frequency excitation method in an Ar gas atmosphere of × 10 -3 torr. Also, the ion plating is
High-frequency power 200W at a pressure of 1.6 × 10 -4 torr, substrate temperature 200 ° C,
The deposition rate was 30Å / sec.
〈発明の効果〉 本発明は、以上説明したように構成されているので、純
度が99.999％以上の銅をイオンブレーティング方向によ
り蒸着させて高純度銅膜を形成することにより、銅膜と
有機絶縁膜の密着性に優れ、製品の信頼性が向上すると
ともに、残留応力が小さいからエッチングが均一に進行
する。また、エッチング時の結晶粒の欠落が少なく、パ
ターニング性のよい銅膜が得られる。その上、従来方に
くらべ微細配線が可能となるという効果を奏する。<Effects of the Invention> The present invention is configured as described above, so that the purity of 99.999% or more of copper is vapor-deposited in the ion plating direction to form a high-purity copper film. The adhesion of the insulating film is excellent, the reliability of the product is improved, and the residual stress is small, so that the etching proceeds uniformly. In addition, a copper film having less crystal grains during etching and good patterning properties can be obtained. In addition, there is an effect that fine wiring is possible as compared with the conventional method.
銅膜形成の前に有機絶縁膜の表面をイオンボンバード処
理すれば、銅膜の密着性が格段に向上するという効果を
奏する。If the surface of the organic insulating film is subjected to the ion bombardment treatment before the formation of the copper film, the adhesiveness of the copper film is significantly improved.
第１図はパターニング時のリードのサイド面の説明図で
ある。 第2a図および第2b図はそれぞれ真空蒸着法およびイオン
プレーティング法による銅膜におけるリードのサイド面
の部分拡大図である。 符号の説明 １…リード、1a…サイド面、２…有機絶縁膜（ポリイミ
ド膜）、３…セラミック板、４…結晶粒、５…リード欠
けFIG. 1 is an explanatory diagram of a side surface of a lead at the time of patterning. 2a and 2b are partial enlarged views of the side surface of the lead in the copper film formed by the vacuum deposition method and the ion plating method, respectively. Explanation of symbols 1 ... Lead, 1a ... Side surface, 2 ... Organic insulating film (polyimide film), 3 ... Ceramic plate, 4 ... Crystal grains, 5 ... Lead missing
フロントページの続き (72)発明者 御田 護 茨城県日立市助川町３丁目１番１号 日立 電線株式会社電線工場内 (56)参考文献 特開 昭53−135840（ＪＰ，Ａ) 特公 昭55−41275（ＪＰ，Ｂ２)Front page continuation (72) Inventor Mamoru Mita 3-1-1 Sukegawa-cho, Hitachi City, Ibaraki Hitachi Cable Co., Ltd. Electric Wire Plant (56) Reference JP-A-53-135840 (JP, A) JP-B-55 -41275 (JP, B2)
Claims (3)
つぎに該有機絶縁膜上にイオンプレーティング法により
純度が99.999％以上の銅膜を形成したのち、フォトエッ
チング法によりパターニングを行うことを特徴とする銅
・有機絶縁膜配線板の製造方法。1. An organic insulating film is formed on a ceramic substrate,
Next, a method for producing a copper / organic insulating film wiring board, which comprises forming a copper film having a purity of 99.999% or more on the organic insulating film by an ion plating method and then performing patterning by a photoetching method.
つぎに該有機絶縁膜の表面を不活性ガスまたは弱酸化性
ガス雰囲気下でイオンボンバード処理したのち、この有
機絶縁膜上にイオンプレーティング法により純度が99.9
99％以上の銅銅膜を形成し、続いてフォトエッチング法
によりパターニングを行うことを特徴とする銅・有機絶
縁膜配線板の製造方法。2. An organic insulating film is formed on a ceramic substrate,
Next, the surface of the organic insulating film is subjected to an ion bombardment treatment in an atmosphere of an inert gas or a weak oxidizing gas, and the purity of the organic insulating film is set to 99.9 by an ion plating method.
A method for producing a copper / organic insulating film wiring board, which comprises forming 99% or more of a copper-copper film and then performing patterning by a photoetching method.
項１または２記載の銅・有機絶縁膜配線板の製造方法。3. The method for producing a copper / organic insulating film wiring board according to claim 1, wherein the organic insulating film is a polyimide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63183053A JPH07105584B2 (en) | 1988-07-22 | 1988-07-22 | Copper / organic insulation film wiring board manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63183053A JPH07105584B2 (en) | 1988-07-22 | 1988-07-22 | Copper / organic insulation film wiring board manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0232591A JPH0232591A (en) | 1990-02-02 |
| JPH07105584B2 true JPH07105584B2 (en) | 1995-11-13 |
Family
ID=16128914
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63183053A Expired - Lifetime JPH07105584B2 (en) | 1988-07-22 | 1988-07-22 | Copper / organic insulation film wiring board manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07105584B2 (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53135840A (en) * | 1977-04-30 | 1978-11-27 | Sumitomo Electric Ind Ltd | Metal coating method for non-electroconductive material |
| JPS5541275A (en) * | 1978-09-20 | 1980-03-24 | Casio Comput Co Ltd | Printing head feed mechanism |
-
1988
- 1988-07-22 JP JP63183053A patent/JPH07105584B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0232591A (en) | 1990-02-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0260857B1 (en) | Multilayer wiring substrate | |
| US5308463A (en) | Preparation of a firm bond between copper layers and aluminum oxide ceramic without use of coupling agents | |
| US6331811B2 (en) | Thin-film resistor, wiring substrate, and method for manufacturing the same | |
| JP3473485B2 (en) | Thin film resistor and manufacturing method thereof | |
| JP3766453B2 (en) | Transparent conductive film and method for producing the same | |
| JPH09201900A (en) | Laminate | |
| JPH05251844A (en) | Flexible circuit board manufacturing method | |
| JPH0247257A (en) | Method for coating a substrate with a metal layer | |
| JPH0767003B2 (en) | Copper / organic insulation film wiring board manufacturing method | |
| JP3447075B2 (en) | Flexible circuit board | |
| JPH07105584B2 (en) | Copper / organic insulation film wiring board manufacturing method | |
| JP2562588B2 (en) | Tantalum metal thin film circuit | |
| JP3447122B2 (en) | Flexible circuit board having metal oxide layer | |
| JPH0661600A (en) | Flexible circuit board | |
| US4812388A (en) | Process to obtain thin film lines | |
| JP2802181B2 (en) | Method of forming conductive film on ceramic circuit board | |
| JPH11354303A (en) | Thin film resistor, its manufacture, and wiring board incorporating the same | |
| JPH0799378A (en) | Method for forming resistor thin film layer on printed circuit board | |
| JPH05251843A (en) | Manufacture of flexible circuit board for utilizing glow discharge | |
| JP2536604B2 (en) | Copper / organic insulation film wiring board manufacturing method | |
| JP2986948B2 (en) | AlN circuit board | |
| JP3218698B2 (en) | Copper metallization method | |
| JPH05151827A (en) | Substrate with conductor | |
| JP2025518645A (en) | Manufacturing method for flexible copper-clad laminates on PTFE substrate | |
| JPH05299819A (en) | Flexible circuit board |