JPH07114297B2 - Oxide superconductor junction and method for forming the same - Google Patents
Oxide superconductor junction and method for forming the sameInfo
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- JPH07114297B2 JPH07114297B2 JP4292849A JP29284992A JPH07114297B2 JP H07114297 B2 JPH07114297 B2 JP H07114297B2 JP 4292849 A JP4292849 A JP 4292849A JP 29284992 A JP29284992 A JP 29284992A JP H07114297 B2 JPH07114297 B2 JP H07114297B2
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Description
【0001】[0001]
【産業上の利用分野】本発明はジョセフソン素子に利用
する超伝導体接合及びその形成方法に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a superconductor junction used in Josephson devices and a method for forming the same.
【0002】[0002]
【従来の技術】通常超伝導素子は超伝導/常伝導/超伝
導(SNS)型、もしくは超伝導/絶縁バリア/超伝導
(SIS)型の素子が用いられる。まずSNS型の素子
は、これは常伝導層にしみだした超伝導波動関数の弱結
合(近接効果)を用いる。この場合は常伝導層の膜厚を
常伝導層中のコヒーレンス長ζN 程度(2201系で数
十nm程度)に制御することでジョセフソン接合が形成
される。叉、SIS型素子では、超伝導波動関数の絶縁
バリア中のトンネル効果を用いる。例えば、従来用いら
れているNb系のジョセフソン素子でバリアとして用い
ている酸化アルミニウムの厚さで約2−3nm程度であ
る。2. Description of the Related Art Generally, a superconducting / normal conducting / superconducting (SNS) type device or a superconducting / insulating barrier / superconducting (SIS) type device is used as a superconducting device. First, the SNS type element uses weak coupling (proximity effect) of the superconducting wave function exuding in the normal conduction layer. In this case, the Josephson junction is formed by controlling the film thickness of the normal conductive layer to about the coherence length ζ N in the normal conductive layer (about several tens nm in 2201 system). Moreover, in the SIS type element, the tunnel effect in the insulating barrier of the superconducting wave function is used. For example, the thickness of aluminum oxide used as a barrier in the conventionally used Nb-based Josephson element is about 2-3 nm.
【0003】このような超伝導素子形成において、前述
のNb系の超伝導体では、その波動関数は等方的であ
り、コヒーレンス長ζは50nm程度である。即ちSN
もしくはSI界面付近の局所的な超伝導性はともかく、
叉膜が多結晶であれ単結晶であれ、少なくとも界面から
50nmの範囲でNbの超伝導特性が確保されれば素子
として動作し得る。In the formation of such a superconducting element, the wave function of the above Nb-based superconductor is isotropic and the coherence length ζ is about 50 nm. That is, SN
Or aside from the local superconductivity near the SI interface,
Whether the thin film is a polycrystal or a single crystal, if the superconducting property of Nb is secured at least in the range of 50 nm from the interface, it can operate as an element.
【0004】ところで、Bi酸化物超伝導体はその臨界
温度Tcが2223系で110K程度であり、高温超伝
導体として知られるY系超伝導体を20K上回る。この
ため液体窒素温度でのジョセフソン素子動作に対して大
きな温度マージンを有し、実用化に期待がかかってい
る。しかし、超伝導素子形成においては酸化物超伝導体
特有の素子形成上の困難さがある。即ち、酸化物超伝導
体のコヒーレンス長は極めて短くかつ異方的である。前
述のBi系酸化物超伝導体の場合、c軸方向のコヒーレ
ンス長は約0.2nm,ab軸方向で約2nm程度であ
る。従って、この超伝導体を用いて良好なジョセフソン
素子を得ようとするならば、SNもしくはSI界面まで
良好な超伝導特性を維持し得るような素子形成方法が必
要であり、それは根本的に素子全体をヘテロエピタキシ
ャル成長した単結晶として合成する必要性が示唆され
る。By the way, the critical temperature Tc of the Bi oxide superconductor is about 110K in the 2223 series, which is 20K higher than that of the Y series superconductor known as a high temperature superconductor. Therefore, it has a large temperature margin for the operation of the Josephson element at the liquid nitrogen temperature, and is expected to be put into practical use. However, in forming a superconducting element, there are difficulties in forming an element peculiar to an oxide superconductor. That is, the coherence length of the oxide superconductor is extremely short and anisotropic. In the case of the Bi-based oxide superconductor described above, the coherence length in the c-axis direction is about 0.2 nm, and the coherence length in the ab-axis direction is about 2 nm. Therefore, in order to obtain a good Josephson device using this superconductor, a device forming method that can maintain a good superconducting property up to the SN or SI interface is necessary. The necessity of synthesizing the entire device as a heteroepitaxially grown single crystal is suggested.
【0005】このようなBi系酸化物超伝導体を用いた
接合の従来例としては、図2に示すようなアプライド・
フィジックス・レターズ(Applied Physi
csLetters)1990年、56巻、1469−
1471頁に掲載されている積層型SNS接合がある。
この例の場合MgO基板上にc軸配向の超伝導膜と、常
伝導膜の中間層とをそれぞれ300、60、200nm
積層し、20μm×40μmのSNS型素子を形成して
いる。この素子で、4.2Kにおいてマイクロ波に対す
るACジョセフソン効果(シャピロステップ)を観測し
ている。また、本従来例においては、超伝導波動関数が
60nmの中間層を介して近接効果で弱結合しているこ
とが述べられている。このような諸特性は酸化物超伝導
体の素子応用の可能性を示した点で評価できるものであ
る。As a conventional example of joining using such a Bi-based oxide superconductor, there is an applied structure as shown in FIG.
Physics Letters (Applied Physi)
csLetters) 1990, 56, 1469-
There is a stacked SNS junction listed on page 1471.
In the case of this example, a c-axis oriented superconducting film and an intermediate layer of a normal conducting film are formed on the MgO substrate at 300, 60 and 200 nm, respectively.
The layers are stacked to form a 20 μm × 40 μm SNS type element. This device observes the AC Josephson effect (Shapiro step) for microwaves at 4.2K. Further, in this conventional example, it is described that the superconducting wave function is weakly coupled by the proximity effect via the intermediate layer of 60 nm. Such characteristics can be evaluated in terms of the possibility of applying the oxide superconductor to the device.
【0006】[0006]
【発明が解決しようとする課題】しかしながら、このB
i系酸化物超伝導体接合において磁場に対するDCジョ
セフソン効果の報告はなされていない。磁場に対するD
Cジョセフソン効果は磁気量子干渉素子(SQUID)
等への応用上重要であるが、この効果は素子の接合面内
の均質性、即ち、素子内でジョセフソン結合に寄与して
いる実効面積に依存する。しかし、例えば基板の表面平
坦性、結晶の乱れ等に起因する膜中の異相等により中間
層の膜厚が均質できない場合、更に中間層(常伝導層)
のピンホールリークでジョセフソン結合している場合等
により、明確なDCジョセフソン効果は観測されない。However, this B
The DC Josephson effect on the magnetic field in the i-based oxide superconductor junction has not been reported. D for magnetic field
C Josephson effect is a magnetic quantum interference device (SQUID)
This effect depends on the homogeneity in the junction surface of the device, that is, the effective area that contributes to the Josephson coupling in the device, which is important for application to the device. However, if the film thickness of the intermediate layer cannot be uniform due to, for example, the surface flatness of the substrate or the phase difference in the film due to crystal disorder, etc., the intermediate layer (normal conductive layer)
A clear DC Josephson effect is not observed due to the Josephson coupling due to the pinhole leak.
【0007】このような結晶成長の不完全さは、例えば
MgO,SrTiO3 基板のような4回対称性を持つ基
板上に直接Bi系超伝導体を成長させた場合に特徴的に
起こる。これはBi系超伝導体がその面内でドメイン構
造を形成するためで、面内に粒界が形成されピンホール
パスになり得る。また、膜中に多くの異相を含みやす
く、界面平坦性、中間相の均質性を乱す原因になる。こ
のために多くの場合にSNS型素子としての動作は不完
全であり、DCジョセフソン効果によるフラウンホーフ
ァー型の臨界電流の干渉パターンを観測するにいたらな
い。またSNS型素子としての特性は観測されてもSI
S型のトンネル接合の成功例はいまだ報告されていな
い。Such incomplete crystal growth characteristically occurs when a Bi-based superconductor is directly grown on a substrate having four-fold symmetry such as a MgO, SrTiO 3 substrate. This is because the Bi-based superconductor forms a domain structure in the plane, and grain boundaries are formed in the plane, which can be a pinhole path. Moreover, many different phases are likely to be contained in the film, which causes the interface flatness and the homogeneity of the intermediate phase to be disturbed. Therefore, in many cases, the operation as an SNS type element is incomplete, and it is not possible to observe the Fraunhofer type critical current interference pattern due to the DC Josephson effect. Even if the characteristics as an SNS type element are observed, the SI
Successful S-type tunnel junctions have not yet been reported.
【0008】またBi系酸化物超伝導体の異方性を考え
ると、そのコヒーレンス長の長いab軸方向で接合を形
成した方が有利であると考えられる。しかし、特にBi
系酸化物超伝導体は結晶成長においてもその異方性が強
く、ab面内で結晶成長速度が非常に早い。このため通
常のMgO,SrTiO3 の(100)面を用いた場合
ab面が露出したc軸配向膜となる。またSrTiO3
の(110)面を用いた場合45°の角度でab面が傾
いたエピタキシャル成長がおこるが膜中には+45°,
−45°傾斜の粒界が形成されるほか、その膜の表面は
極めて凹凸が激しく素子形成は困難である。Considering the anisotropy of the Bi-based oxide superconductor, it is considered advantageous to form the junction in the ab axis direction, which has a long coherence length. But especially Bi
The oxide superconductor has a strong anisotropy even in crystal growth, and the crystal growth rate is very fast in the ab plane. Therefore, when the normal (100) plane of MgO or SrTiO 3 is used, the ab plane is exposed to form a c-axis oriented film. Also SrTiO 3
When the (110) plane is used, epitaxial growth occurs in which the ab plane is inclined at an angle of 45 °, but + 45 ° in the film,
In addition to the formation of grain boundaries inclined at -45 °, the surface of the film is extremely uneven and it is difficult to form an element.
【0009】[0009]
【課題を解決するための手段】以上の問題を鑑み鋭意研
究の結果、本発明者は単結晶基板の上にステップを用い
た結晶成長方法を用いることにより、膜中ドメイン構造
による粒界を含まず、叉膜中に異相等を含まず、表面/
界面の平坦性を十分に確保し、かつコヒーレンス長の長
いab軸方向での接合形成が可能となることを見出し
た。また、基板上にバッファー層を設けることでさらに
信頼性の高い接合形成が可能になることも見出した。こ
れにより、明確なDCジョセフソン効果を有するSNS
もしくはSIS接合を形成することが可能になった。As a result of intensive studies in view of the above problems, the present inventor has found that grain boundaries due to in-film domain structure are included by using a crystal growth method using steps on a single crystal substrate. Without the inclusion of heterogeneous phase in the film
It has been found that sufficient flatness of the interface can be ensured and a bond can be formed in the ab axis direction with a long coherence length. It was also found that providing a buffer layer on the substrate enables more reliable bonding formation. Thereby, SNS having a clear DC Josephson effect
Alternatively, it became possible to form a SIS junction.
【0010】すなわち本発明では、高さ0.38nmも
しくはその整数倍のステップが[110]方向に並び、
少なくとも幅0.54nm以上のテラスを有するSrT
iO3 単結晶の(100)面を用い、下部と上部の超伝
導層としてBi2 Sr2 CaCu2 Ox (2212)、
もしくはBi2 Sr2 Ca2 Cu3 Ox (2223)
を、また中間層としてBi2 Sr2 CuOx (220
1)を有し、それら各層の結晶方向は一義的に揃い、か
つ下部層と中間層、中間層と上部層とは基板形状に起因
して形成されるステップを介して、それぞれのa−b面
内のCu−O層どうしが接触するような積層構造を形成
することを特徴とする酸化物超伝導体接合により良好な
DCジョセフソン効果を得られる。また、超伝導層形成
前にBi2 Sr2 CuOx バッファー層を形成すること
でさらに信頼性を向上できる。この接合においては中間
層のBi2 Sr2 CuOx の代わりにIII a族元素M及
びVa族元素Nを含むBi 2 Sr 2-z M z Cu 1-y N y
O x を用いてもよい。またこれらの酸化物超伝導体接合
においては、基板面の法線が[111]方向に傾斜した
傾斜SrTiO3 基板を用いる。またSrTiO3 基板
の(100)面上に[110]方向にステップが形成さ
れるように極めて浅い溝を[110]方向に並べて加工
形成した基板を用いてもよい。That is, in the present invention, steps having a height of 0.38 nm or an integral multiple thereof are arranged in the [110] direction,
SrT having a terrace with a width of at least 0.54 nm
Using the (100) plane of the iO 3 single crystal, Bi 2 Sr 2 CaCu 2 O x (2212) as the lower and upper superconducting layers,
Or Bi 2 Sr 2 Ca 2 Cu 3 O x (2223)
And Bi 2 Sr 2 CuO x (220
1), the crystal directions of the respective layers are uniquely aligned, and the lower layer and the intermediate layer, and the intermediate layer and the upper layer are formed due to the substrate shape. A favorable DC Josephson effect can be obtained by an oxide superconductor junction characterized by forming a laminated structure in which in-plane Cu-O layers are in contact with each other. Further, the reliability can be further improved by forming the Bi 2 Sr 2 CuO x buffer layer before forming the superconducting layer. In this junction, Bi 2 Sr 2-z M z Cu 1-y N y containing III a group element M and Va group element N instead of Bi 2 Sr 2 CuO x of the intermediate layer is used.
It may be used O x. Further, in these oxide superconductor junctions, an inclined SrTiO 3 substrate in which the normal line of the substrate surface is inclined in the [111] direction is used. Alternatively, a substrate formed by arranging extremely shallow grooves in the [110] direction so as to form steps in the [110] direction on the (100) plane of the SrTiO 3 substrate may be used.
【0011】またこれらの接合は、結晶成長前にSrT
iO3 基板を原子状酸素雰囲気中において加熱処理を行
うこと、または下部Bi2 Sr2 CaCu2 Ox 層もし
くはBi2 Sr2 Ca2 Cu3 Ox 層の形成時におい
て、成長初期にBiの組成比を増やすことでより信頼性
の高い接合形成がなされる。Further, these junctions are formed by SrT before crystal growth.
When the iO 3 substrate is heat-treated in an atomic oxygen atmosphere, or when the lower Bi 2 Sr 2 CaCu 2 O x layer or the Bi 2 Sr 2 Ca 2 Cu 3 O x layer is formed, the composition of Bi at the initial growth stage Increasing the ratio results in more reliable bond formation.
【0012】[0012]
【実施例】(実施例1)図1に本発明にかかるBi系超
伝導体によるジョセフソン素子の断面図を示す。この実
施例では成膜方法としてイオンビームスパッタ法を用
い、超伝導薄膜形成中の基板温度が2212・2223
超伝導層形成時には700℃としている。また成膜中は
原子状酸素を基板表面で2×10- 3 トールとなるよう
に設定し、多層のBi系超伝導薄膜はin−situに
形成される。基板1には[111]方向に約4℃傾斜研
磨したSrTIO3 の(100)面を用いた。この場合
基板表面には[110]方向に並ぶ高さ0.38nmの
ステップが幅約2.5nm間隔でかなり規則的に形成さ
れる。これは、高分解能断面TEM,及び基板1のRH
EEDパターンから容易に確認できた。このような基板
は通常大気に触れることで基板表面に不純物が容易に付
着する。この不純物は綿密に洗浄を施しても完全に除去
することは困難であり、基板1を真空槽にいれて加熱し
た段階で基板表面に炭化物として強固に付着し、超伝導
薄膜形成時に異相の核形成サイトになり基板表面の異物
形成の原因となる。この不純物に対し、超伝導薄膜形成
温度程度で原子状酸素を基板1に吹き付け処理を施する
ことで基板表面の炭化物を酸化して取り除くことが可能
である。このような原子状酸素による基板表面の清浄工
程は素子形成プロセス上極めて有効であり、その効果は
SEM,AFM(原子間力顕微鏡)等により容易に確認
される。このことは基板1のRHEEDパターンの観測
結果として清浄工程前後で炭化物による反射スポットが
消滅し、RHEED反射ストリークの強度が増大するこ
とからも明白である。更にこの清浄工程の後では、Sr
TiO3 基板1等では、表面の再起配列構造が観測され
るようになり、原子レベルでの表面清浄化が実現する。EXAMPLE 1 FIG. 1 is a sectional view of a Josephson device made of a Bi-based superconductor according to the present invention. In this embodiment, the ion beam sputtering method is used as the film forming method, and the substrate temperature during the formation of the superconducting thin film is 2212 and 2223.
The temperature is 700 ° C. when the superconducting layer is formed. During film formation, atomic oxygen is set to 2 × 10 −3 Torr on the surface of the substrate, and a multilayer Bi-based superconducting thin film is formed in-situ. As the substrate 1, a (100) plane of SrTIO 3 which was polished at about 4 ° C. in the [111] direction was used. In this case, steps having a height of 0.38 nm arranged in the [110] direction are fairly regularly formed at intervals of about 2.5 nm on the substrate surface. This is a high-resolution cross-sectional TEM and the RH of the substrate 1.
It was easily confirmed from the EED pattern. When such a substrate is normally exposed to the atmosphere, impurities easily adhere to the substrate surface. It is difficult to completely remove this impurity even if it is thoroughly washed. When the substrate 1 is placed in a vacuum chamber and heated, it firmly adheres to the surface of the substrate as a carbide, and when the superconducting thin film is formed, nuclei of different phases are formed. It becomes a formation site and causes the formation of foreign matter on the substrate surface. It is possible to oxidize and remove the carbide on the surface of the substrate by spraying atomic oxygen to the substrate 1 at about the superconducting thin film forming temperature with respect to this impurity. Such a substrate surface cleaning step using atomic oxygen is extremely effective in the element formation process, and its effect can be easily confirmed by SEM, AFM (atomic force microscope) or the like. This is also apparent from the observation result of the RHEED pattern of the substrate 1 that the reflection spots due to the carbide disappear before and after the cleaning step, and the intensity of the RHEED reflection streak increases. Furthermore, after this cleaning step, Sr
In the TiO 3 substrate 1 or the like, a recurrence arrangement structure on the surface is observed, and surface cleaning at the atomic level is realized.
【0013】次にこの基板1上へのベース超伝導体の2
212もしくは2223系超伝導層の形成について述べ
る。2212、2223系超伝導層ともにインターグロ
ースの結晶成長機構を持つが、このインターグロースを
促進するためにBi組成を超伝導層形成初期に増やすこ
とで結晶欠陥の修復が早い時期に完了し、ベース超伝導
層として良好なエピタキシャル単結晶薄膜を形成するこ
とが可能である。その効果はSEM,AFM等により容
易に確認される。本実施例では最初の3nm程度の膜成
長中にBiの化学組成比(通常2)を2.3に増やし
た。一般にペロブスカイトの単層薄膜(例えばBaTi
O3 )では通常基板から200nm程度基板による束縛
歪が入るが、本発明の2212系超伝導薄膜は20nm
の薄膜でも70K程度の良好な超伝導性を示す。このこ
とから、バッファー層3と超伝導層の初期のBi組成調
整が超伝導薄膜中の結晶欠陥低減に、ひいては良好な超
伝導特性を得る上で大変効果的であることを示してい
る。Next, two base superconductors on the substrate 1
The formation of the 212 or 2223-based superconducting layer will be described. Both the 2212 and 2223 series superconducting layers have an intergrowth crystal growth mechanism, but by increasing the Bi composition in the early stage of superconducting layer formation in order to promote this intergrowth, the repair of crystal defects is completed early and It is possible to form a good epitaxial single crystal thin film as a superconducting layer. The effect is easily confirmed by SEM, AFM and the like. In this embodiment, the chemical composition ratio of Bi (usually 2) was increased to 2.3 during the initial film growth of about 3 nm. Generally, a single layer thin film of perovskite (for example, BaTi
In the case of O 3 ), the binding strain due to the substrate is usually about 200 nm from the substrate, but the 2212 series superconducting thin film of the present invention has a thickness of 20 nm.
Even the thin film of the above shows a good superconductivity of about 70K. From this, it is shown that the initial Bi composition adjustment of the buffer layer 3 and the superconducting layer is very effective in reducing the crystal defects in the superconducting thin film and, in turn, in obtaining good superconducting properties.
【0014】次いで、エピタキシャル単結晶薄膜成長に
よってBi系超伝導体の単位格子に相当する1.5nm
(2212層の場合)のステップが表面に形成される。
膜は基本的にステップフローの結晶成長をするためにこ
の1.5nmのステップ構造が表面に維持される。この
ベース超伝導体を所定の膜厚分形成した後、中間層5、
上部超伝導層6を形成する。SNS接合を形成する場合
は中間層5の常伝導層としてバッファー層3と同じ22
01層を用いる。下部超伝導層4と中間層5とはステッ
プ壁面とテラス面とを介して接触する。同様に上部超伝
導層6と中間層5もステップ壁面とテラス面とを介して
接触するような構造になる。Bi系超伝導体の結晶成長
様式は前述したとおりにステップフローであるためにス
テップ壁面、テラス面がSN界面となり、その界面近傍
での超伝導層の結晶構造に欠陥は少なく、超伝導層のス
テップ近傍での超伝導特性は良好である。さらにステッ
プ壁面(界面)には超伝導層のab面が露出しているこ
とが特徴である。即ち常伝導層を挟んで上下の超伝導層
がコヒーレンス長の長いab軸方向で接合を形成する構
造になる。従来のSrTiO3 の(110)面を用いる
場合には膜の表面があまりに凹凸が激しく、ab軸方向
の接合形成がほとんど困難であったのに対して、本発明
にかかる傾斜基板を用いる方法では容易にab軸方向で
の接合が形成される。Then, an epitaxial single crystal thin film was grown to a thickness of 1.5 nm corresponding to the unit cell of the Bi-based superconductor.
Steps (for 2212 layers) are formed on the surface.
The 1.5 nm step structure is maintained on the surface of the film in order to basically perform step-flow crystal growth. After forming this base superconductor to a predetermined thickness, the intermediate layer 5,
The upper superconducting layer 6 is formed. When forming an SNS junction, it is the same as the buffer layer 3 as the normal conductive layer of the intermediate layer 22.
01 layers are used. The lower superconducting layer 4 and the intermediate layer 5 are in contact with each other via the step wall surface and the terrace surface. Similarly, the upper superconducting layer 6 and the intermediate layer 5 are also in contact with each other via the step wall surface and the terrace surface. Since the crystal growth mode of the Bi-based superconductor is the step flow as described above, the step wall surface and the terrace surface serve as the SN interface, and the crystal structure of the superconducting layer near the interface has few defects. The superconducting property near the step is good. Furthermore, the ab plane of the superconducting layer is exposed on the step wall surface (interface). That is, the structure is such that the upper and lower superconducting layers sandwiching the normal conducting layer form a junction in the ab axis direction having a long coherence length. When the (110) plane of the conventional SrTiO 3 is used, the surface of the film is so uneven that it is almost difficult to form a bond in the ab axis direction. On the other hand, in the method using the inclined substrate according to the present invention. A bond is easily formed in the ab axis direction.
【0015】(実施例2)図3に本発明にかかるBi系
超伝導体によるジョセフソン素子の断面図を示す。この
実施例では基板1上に2201バッファー層3を設けて
ある。この実施例では成膜方法としてイオンビームスパ
ッタ法を用い、超伝導薄膜形成中の基板温度が2201
バッファー層3で550℃、2212・2223超伝導
層形成時は実施例1と同様に700℃としている。以
後、実施例1と同様に基板1を作成した後、バッファー
層3を作成する。この傾斜SrTiO3 基板1上に、2
201バッファー層3は基板1のステップに束縛され膜
のa,b,c軸が規則性を持って結晶成長する。即ちc
軸は基板1のテラスに垂直、膜のa軸はステップエッジ
2に平行で、b軸(整合不整合変調構造を含む方向)は
ステップエッジ2に直交する。このために膜は面内にド
メイン構造を形成しない。このバッファー層3の形成で
は、基板温度は500〜600℃が適当である。この温
度以下では、2201層の結晶性が悪くなり、多くの結
晶欠陥を含むようになる。またこの温度以上では220
1層と平衡相として生成しやすいBi,Sr,Oが異相
として発生する。このため膜中の結晶欠陥と異相を低減
する目的で導入する2201層がバッファー層として機
能しなくなる。(Embodiment 2) FIG. 3 is a sectional view of a Josephson device made of a Bi-based superconductor according to the present invention. In this embodiment, a 2201 buffer layer 3 is provided on the substrate 1. In this embodiment, the ion beam sputtering method is used as the film forming method, and the substrate temperature during the formation of the superconducting thin film is 2201.
When the buffer layer 3 is formed at 550 ° C. and 2212/2223 superconducting layer, the temperature is 700 ° C. as in the first embodiment. After that, after forming the substrate 1 in the same manner as in Example 1, the buffer layer 3 is formed. On this inclined SrTiO 3 substrate 1, 2
The 201 buffer layer 3 is constrained by the steps of the substrate 1, and the a, b, and c axes of the film have a regular crystal growth. That is, c
The axis is perpendicular to the terrace of the substrate 1, the a-axis of the film is parallel to the step edge 2, and the b-axis (direction including the matching mismatched modulation structure) is orthogonal to the step edge 2. Because of this, the film does not form in-plane domain structures. In forming the buffer layer 3, a substrate temperature of 500 to 600 ° C. is suitable. Below this temperature, the crystallinity of the 2201 layer deteriorates and many crystal defects are included. 220 above this temperature
Bi, Sr, and O, which are likely to be generated as an equilibrium phase with one layer, are generated as different phases. Therefore, the 2201 layer introduced for the purpose of reducing crystal defects and different phases in the film does not function as a buffer layer.
【0016】ここで形成した2201バッファー層3
は、次に連続的に成長させる2212もしくは2223
系超伝導層に対して異相発生をおさえ、その結晶方位を
規定する働きをする。しかし基板1のステップ(0.3
8nm)で形成されたバッファー層3中の欠陥はそのま
まバッファー層3中に残る。このバッファー層3中に残
った結晶欠陥は次の2212もしくは2223系超伝導
体形成時にBi系超伝導体特有の結晶成長様式であるイ
ンターグロースの成長機構によって自動的に修復され
る。このような2201バッファー層3はバッファーと
して機能するためには2201結晶格子の最小単位、約
1.2nmあればよい。しかし実際の膜形成で基板表面
のマイグレーションのばらつき等を考慮して約5nm程
度成長させることで十分にバッファーとしての機能が期
待できる。2201 buffer layer 3 formed here
2212 or 2223 which is continuously grown next
It suppresses the generation of different phases in the superconducting system layer and regulates the crystal orientation. However, the steps (0.3
Defects in the buffer layer 3 formed by 8 nm) remain in the buffer layer 3 as they are. The crystal defects remaining in the buffer layer 3 are automatically repaired by the intergrowth growth mechanism which is a crystal growth mode peculiar to the Bi-based superconductor when the next 2212 or 2223-based superconductor is formed. In order for the 2201 buffer layer 3 to function as a buffer, the minimum unit of the 2201 crystal lattice, about 1.2 nm, is sufficient. However, in actual film formation, a function as a buffer can be expected sufficiently by growing the film by about 5 nm in consideration of variations in migration on the substrate surface.
【0017】次にこの2201バッファー層3上への実
施例1と同じ接合を形成する。ab軸方向の接合形成が
ほとんど困難であったのに対して、本発明にかかる傾斜
基板1を用いる方法では容易にab軸方向での接合が形
成され、さらにバッファー層3を用いることで信頼性の
高い素子を提供することが可能となる。Next, the same junction as in Example 1 is formed on the 2201 buffer layer 3. While it was almost difficult to form a bond in the ab-axis direction, the method using the tilted substrate 1 according to the present invention easily forms a bond in the ab-axis direction, and the use of the buffer layer 3 improves reliability. It is possible to provide an element with high cost.
【0018】(実施例3)次に、本発明にかかるステッ
プエッジ2の壁面を接合面とする超伝導素子の形成方法
に関して、傾斜させた基板7を用いる以外の方法につい
ての実施例を述べる。(Embodiment 3) Next, an embodiment of a method for forming a superconducting device having a wall surface of the step edge 2 as a joint surface according to the present invention will be described except that a tilted substrate 7 is used.
【0019】図4に示した基板7は通常の(100)面
のSrTiO3 基板7であるが、接合形成部分をイオン
ミリングの手法を用いて浅くエッチング処理し、基板表
面に谷を形成したものである。本実施例の場合、リソグ
ラフィーを用い幅20μmのレジストスリットを形成
し、イオンミリングでこれを斜めエッチングする事によ
り、約500nm程度の谷を中心部に形成した。この場
合、基板7に形成されるステップ間隔は7.5nmで、
約3度の傾斜基板と同様になる。このように素子部分だ
けに傾斜を形成し、下部超伝導電極、及び超伝導配線部
分は臨界電流密度の十分に大きなa面を用いるように加
工処理することにより、超伝導配線部分の設計自由度を
与えることが可能となる。The substrate 7 shown in FIG. 4 is a normal (100) plane SrTiO 3 substrate 7, but the junction formation portion is shallowly etched by using an ion milling method to form a valley on the substrate surface. Is. In the case of this example, a resist slit having a width of 20 μm was formed by lithography and was obliquely etched by ion milling to form a valley of about 500 nm in the center. In this case, the step interval formed on the substrate 7 is 7.5 nm,
Similar to a tilted substrate of about 3 degrees. In this way, the inclination is formed only in the element portion, and the lower superconducting electrode and the superconducting wiring portion are processed so as to use the a-plane having a sufficiently large critical current density. Can be given.
【0020】つまり、素子に流す超伝導電流はベース超
伝導電極を経由して外部素子に接続されることになる
が、ベース超伝導層は傾斜基板1上に形成されているた
めに傾斜方向が[111]方向であると、[110]方
向への電流パスは必ずc軸方向に通過しなければならな
い。このc軸方向の常伝導抵抗はab軸方向よりも1万
倍高くなり、超伝導電流臨界密度は千分の一程度であ
る。素子設計上の制約は、良好な超伝導素子ほどその最
大電流密度は高くなるために大きくなる。しかし、図4
に示した方法によりこの問題を解決することが可能とな
り、超伝導素子の集積化等が可能となる。That is, the superconducting current flowing through the element is connected to the external element via the base superconducting electrode, but since the base superconducting layer is formed on the inclined substrate 1, the inclination direction is In the [111] direction, the current path in the [110] direction must always pass in the c-axis direction. The normal conduction resistance in the c-axis direction is 10,000 times higher than that in the ab-axis direction, and the superconducting current critical density is about one thousandth. The constraint on the device design increases because the maximum current density of a good superconducting device increases. However, FIG.
It becomes possible to solve this problem by the method shown in (1), and it becomes possible to integrate the superconducting elements.
【0021】(実施例4)さらに、図5に実施例3の応
用例を示す。幅1μm幅のレジストストライプパターン
を用い、中心部の深さが約25nm程度であるようにイ
オンミリング処理を施し、基板7の素子形成部分に浅い
複数の谷を形成した。この場合も実質的な基板表面のス
テップ間隔は3度傾斜の場合と同様である。このように
浅い谷を形成することによってリソグラフィープロセス
も容易となり、さらなる集積化が可能となる。(Fourth Embodiment) FIG. 5 shows an application example of the third embodiment. Using a resist stripe pattern with a width of 1 μm, ion milling treatment was performed so that the central portion had a depth of about 25 nm, and a plurality of shallow valleys were formed in the element formation portion of the substrate 7. In this case as well, the step interval on the substrate surface is substantially the same as that in the case of the inclination of 3 degrees. By forming such shallow valleys, the lithographic process is facilitated and further integration is possible.
【0022】(実施例5)基板7のストライプ幅を50
0nm程度、基板7の凹凸を5nm程度とした実施例を
図6に示す。このような凹凸を形成することで2201
バッファー層3の形成段階で基板7の凹凸はほとんど吸
収される。しかし基板7に形成されたステップによって
バッファー層3の結晶成長方位は束縛されているため面
内の結晶方位がそろった平坦な単結晶薄膜が形成され
る。この単結晶部分には前述した膜中のドメイン構造を
含まないために、素子部分には粒界を含まない。これ
は、図2で述べた従来例と同じ素子構造であるが、素子
中には粒界を含まないこと、バッファー層3の効果とし
て膜中/界面に含まれる異相がまったくないことが異な
る。この方法を用いたSNS素子では、c軸方向の接合
を利用にてはいるものの、SN界面の平坦性にたいへん
優れ、磁場に対するDCジョセフソン効果においても超
伝導電流Icの完全サップレッションが観測された。(Embodiment 5) The stripe width of the substrate 7 is set to 50.
FIG. 6 shows an example in which the unevenness of the substrate 7 is about 0 nm and the unevenness of the substrate 7 is about 5 nm. By forming such unevenness 2201
Most of the unevenness of the substrate 7 is absorbed during the formation of the buffer layer 3. However, since the crystal growth orientation of the buffer layer 3 is restricted by the steps formed on the substrate 7, a flat single crystal thin film having a uniform in-plane crystal orientation is formed. Since the single crystal portion does not include the domain structure in the film described above, the element portion does not include grain boundaries. This has the same device structure as the conventional example described in FIG. 2, but is different in that the device does not include a grain boundary, and as a result of the buffer layer 3, there is no foreign phase contained in the film / interface. In the SNS element using this method, although the junction in the c-axis direction is used, the flatness of the SN interface is very excellent, and the complete suppression of the superconducting current Ic is observed even in the DC Josephson effect with respect to the magnetic field. It was
【0023】(実施例6)中間層5の一部元素置換を行
い、中間層5の膜厚を大幅に薄くすることで、SIS接
合が形成される。例えば、Bi2 Sr2 CuOx のa・
b軸方向の比抵抗は4.2Kにおいて約1ミリオーム程
度、またc軸方向は10ミリオーム程度である。ここで
Srに対してIIIa族のYを30%元素程度置換する
とab軸の比抵抗で2桁程度、またCuに対してNbを
10%程度置換すると同様にその比抵抗が2桁程度あが
る。これらの元素置換を実行することで、中間層5の比
抵抗を高くし、トンネルバリアとして機能し得る十分に
薄い膜厚で十分なバリアハイトを確保することが可能と
なる。(Example 6) By substituting some elements in the intermediate layer 5 to make the thickness of the intermediate layer 5 much smaller, a SIS junction is formed. For example, a 2 % of Bi 2 Sr 2 CuO x
The specific resistance in the b-axis direction is about 1 milliohm at 4.2K, and in the c-axis direction is about 10 milliohms. Here, substitution of about 30% of IIIa group Y for Sr raises the specific resistance of the ab axis by about two digits, and substitution of Nb by about 10% of Cu similarly raises the specific resistance by about two digits. By performing these element substitutions, it becomes possible to increase the specific resistance of the intermediate layer 5 and to secure a sufficient barrier height with a sufficiently thin film thickness that can function as a tunnel barrier.
【0024】以上、本発明においてはイオンビームスパ
ッタ法を用いてその有効性を検証したが、薄膜の合成手
法としては蒸着法、レーザスパッタ法、RFスパッタ法
等いずれの手法においても応用できることは明白であ
る。As described above, the effectiveness of the present invention is verified by using the ion beam sputtering method, but it is obvious that the thin film synthesizing method can be applied to any of the vapor deposition method, laser sputtering method, RF sputtering method and the like. Is.
【0025】[0025]
【発明の効果】以上の様に本発明により、容易にかつ良
好なSNSもしくはSIS接合を形成できる。積層型超
伝導層素子形成に必要な積層構造を、その動作に必要な
界面構造を確実に制御しながらエピタキシャル成長させ
ることにより、各ロット間においても、叉は1枚のウエ
ハー内においても良好な再現性が得られる。これより、
素子の量産化、集積化が可能となる。As described above, according to the present invention, an excellent SNS or SIS junction can be easily formed. Laminated superconducting layer The laminated structure required for device formation is epitaxially grown while reliably controlling the interface structure necessary for its operation, so that it can be reproduced well between lots or even within a single wafer. Sex is obtained. Than this,
It enables mass production and integration of devices.
【図1】本発明による積層型超伝導素子の代表的な素子
構造の図である。FIG. 1 is a diagram of a typical device structure of a stacked superconducting device according to the present invention.
【図2】従来法による積層型超伝導素子の素子構造図で
ある。FIG. 2 is a device structure diagram of a stacked superconducting device according to a conventional method.
【図3】本発明による積層型超伝導素子の代表的な素子
構造の図である。FIG. 3 is a diagram of a typical device structure of a stacked superconducting device according to the present invention.
【図4】本発明による積層型超伝導素子の応用例を示す
素子構造の図である。FIG. 4 is a diagram of an element structure showing an application example of the stacked superconducting element according to the present invention.
【図5】本発明による積層型超伝導素子の応用例を示す
素子構造図である。FIG. 5 is an element structure diagram showing an application example of the stacked superconducting element according to the present invention.
【図6】本発明による積層型超伝導素子の応用例を示す
素子構造の図である。FIG. 6 is a diagram of an element structure showing an application example of the stacked superconducting element according to the present invention.
1 傾斜SrTiO3 基板 2 基板上に形成されたステップエッジ 3 Bi2 Sr2 CuOx バッファー層 4 下部超伝導層 5 中間2201層 6 上部超伝導層 7 加工処理したSrTiO3 基板 8 MgO基板1 Slanted SrTiO 3 substrate 2 Step edge formed on a substrate 3 Bi 2 Sr 2 CuO x buffer layer 4 Lower superconducting layer 5 Intermediate 2201 layer 6 Upper superconducting layer 7 Processed SrTiO 3 substrate 8 MgO substrate
Claims (7)
のステップが[110]方向に並び、少なくとも幅0.
54nm以上のテラスを有するSrTiO3単結晶の
(100)面を用い、下部と上部の超伝導層としてBi
2 Sr2 CaCu2 Ox (2212)、もしくはBi2
Sr2 Ca2 Cu3 Ox (2223)を、また中間層と
してBi2 Sr2 CuOx (2201)を有し、それら
各層の結晶方向は一義的に揃い、かつ下部層と中間層、
中間層と上部層は基板形状に起因して形成されるステッ
プを介して、それぞれのa−b面内のCu−O層どうし
が接触するような積層構造を形成することを特徴とする
酸化物超伝導体接合。1. A step having a height of 0.38 nm or an integral multiple thereof is arranged in the [110] direction and has a width of at least 0.
The (100) plane of SrTiO 3 single crystal having a terrace of 54 nm or more is used, and Bi is used as the lower and upper superconducting layers.
2 Sr 2 CaCu 2 O x (2212) or Bi 2
Sr 2 Ca 2 Cu 3 O x (2223) and Bi 2 Sr 2 CuO x (2201) as an intermediate layer, the crystal directions of these layers are uniquely aligned, and the lower layer and the intermediate layer,
An oxide characterized in that the intermediate layer and the upper layer form a laminated structure such that the Cu-O layers in the a-b plane are in contact with each other through a step formed due to the shape of the substrate. Superconductor bonding.
のステップが[110]方向に並び、少なくとも幅0.Are aligned in the [110] direction and have a width of at least 0.
54nm以上のテラスを有するSrTiOSrTiO having a terrace of 54 nm or more 33 単結晶のSingle crystal
(100)面を用い、下部と上部の超伝導層としてBiThe (100) plane is used, and Bi is used as the lower and upper superconducting layers.
2 2 SrSr 2 2 CaCuCaCu 2 2 OO x x (2212)、もしくはBi(2212), or Bi 2 2
SrSr 2 2 CaCa 2 2 CuCu 3 3 OO x x (2223)を、また中間層と(2223) as the intermediate layer
してIII a族元素M及びVa族元素Nを含むBiContaining IIIa group element M and Va group element N 2 2 SrSr
2-z 2-z MM zz CuCu 1-y 1-y NN y y OO x x を有し、それら各層の結晶方And the crystal directions of those layers
向は一義的に揃い、かつ下部層と中間層、中間層と上部The orientations are uniquely aligned, and the lower and middle layers, and the middle and upper layers
層は基板形状に起因して形成されるステップを介して、The layer is formed through the steps due to the substrate shape,
それぞれのa−b面内のCu−O層どうしが接触するよCu-O layers in each a-b plane contact each other
うな積層構造を形成することを特徴とする酸化物超伝導Oxide superconductivity characterized by forming such a laminated structure
体接合。Body joining.
バッファー層を形成することを特徴とする請求項1又はA buffer layer is formed, The method of claim 1 or
2記載の酸化物超伝導体接合。2. The oxide superconductor junction according to 2.
た(100)SrTiO(100) SrTiO 3 3 基板を用いることを特徴とすCharacterized by using a substrate
る請求項1又は2記載の酸化物超伝導体接合。The oxide superconductor junction according to claim 1 or 2.
[110]方向にステップが形成されるように極めて浅Extremely shallow so that steps are formed in the [110] direction
い溝を[110]方向に並べて加工形成した基板を用いUsing a substrate with grooves formed in the [110] direction
ることを特徴とした請求項1又は2記載の酸化物超伝導The oxide superconductor according to claim 1 or 2, characterized in that
体接合。Body joining.
酸素雰囲気中において加熱処理することを特徴とする請A contract characterized by heat treatment in an oxygen atmosphere
求項1又は2記載の酸化物超伝導体接合の形成方法。The method for forming an oxide superconductor junction according to claim 1 or 2.
くはBiKuha Bi 2 2 SrSr 2 2 CaCa 2 2 CuCu 3 3 OO x x 層の形成時においDude when forming layers
て、成長初期にBiの組成比を増やすことを特徴とするAnd increasing the composition ratio of Bi at the initial stage of growth.
請求項1又は2記載の酸化物超伝導体接合の形成方法。A method for forming an oxide superconductor junction according to claim 1 or 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4292849A JPH07114297B2 (en) | 1992-10-30 | 1992-10-30 | Oxide superconductor junction and method for forming the same |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4292849A JPH07114297B2 (en) | 1992-10-30 | 1992-10-30 | Oxide superconductor junction and method for forming the same |
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| Publication Number | Publication Date |
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| JPH07114297B2 true JPH07114297B2 (en) | 1995-12-06 |
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