JPH07118428B2 - Reactor for semiconductor circuit - Google Patents
Reactor for semiconductor circuitInfo
- Publication number
- JPH07118428B2 JPH07118428B2 JP59019337A JP1933784A JPH07118428B2 JP H07118428 B2 JPH07118428 B2 JP H07118428B2 JP 59019337 A JP59019337 A JP 59019337A JP 1933784 A JP1933784 A JP 1933784A JP H07118428 B2 JPH07118428 B2 JP H07118428B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor circuit
- reactor
- current
- semiconductor
- core
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F3/00—Cores, Yokes, or armatures
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Filters And Equalizers (AREA)
Description
【発明の詳細な説明】 〔発明の技術分野〕 本発明は電流スパイク、電流リンギングを抑制するため
の半導体回路用リアクトルに関する。Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to a semiconductor circuit reactor for suppressing current spikes and current ringing.
従来より、高周波領域で大電流の制御を行なう、例えば
スイツチング電源等の半導体回路においては、半導体自
身の性質や他の回路的要因により電流のオン・オフ時の
過渡現象に基づく規格値以上のピーク電流、すなわち電
流スパイクやパルス電流の揺らぎ、すなわち電流リンギ
ングが発生し易いという問題があつた。これらの現象は
回路動作の正常化を妨げ、ついには半導体を破壊してし
まうおそれがあつた。さらに、このような急激な電流変
化は機器のノイズの最大の原因となつていた。Conventionally, in a semiconductor circuit such as a switching power supply that controls a large current in a high frequency range, a peak value higher than a standard value based on a transient phenomenon at the time of turning the current on and off due to the characteristics of the semiconductor itself and other circuit factors. There is a problem that current, that is, current spikes and pulse current fluctuations, that is, current ringing easily occurs. These phenomena hinder the normalization of circuit operation and may eventually destroy the semiconductor. Further, such a rapid change in current has been a major cause of device noise.
近年、このようなノイズ障害に対する国際的な対策強化
の要請により、効率η(出力/入力)を低下させず半導
体使用機器の発生ノイズを防止する対策が強化されつつ
あり、ノイズの防止が重要な問題となつてきている。In recent years, in response to a request for strengthening international measures against such noise disturbances, measures for preventing noise generated by devices using semiconductors without decreasing efficiency η (output / input) are being strengthened, and prevention of noise is important. It's becoming a problem.
このような電流スパイクや電流リンギングを抑制するた
め、半導体回路に半導体回路用リアクトルを配置するこ
とが行われているが従来の半導体回路用リアクトルのコ
アはフエライトあるいはパーマロイ等で形成されている
ため、十分な抑制を行なうことができなかつた。In order to suppress such current spikes and current ringing, a semiconductor circuit reactor is arranged in a semiconductor circuit, but the core of a conventional semiconductor circuit reactor is formed of ferrite or permalloy, etc., It was impossible to carry out sufficient suppression.
すなわちフエライト製のコアを使用した場合は、角形比
(Br/B1)および飽和磁束密度が小さいため抑制効果が
小さく、有効にするためにはコアの形状を大きくする必
要がありパーマロイ製のコアを使用した場合は、保磁力
(Hc)が大きくて、高周波化に対応できないという難点
があつた。That is, when a ferrite core is used, the suppression ratio is small because the squareness ratio (Br / B 1 ) and the saturation magnetic flux density are small, and it is necessary to enlarge the shape of the core to make it effective. When using, the coercive force (Hc) was large, and there was the problem that it could not be applied to higher frequencies.
本発明はこのような難点を解消するためなされたもの
で、効率ηをほとんど低下させずにノイズを発生する原
因である電流スパイクや電流リンギングを防止すること
のできる半導体回路用リアクトルを提供することを目的
とする。The present invention has been made to solve such a problem, and provides a reactor for a semiconductor circuit capable of preventing current spikes and current ringing that cause noise without substantially lowering the efficiency η. With the goal.
すなわち本発明の半導体回路用リアクトルは、非晶質磁
性合金で形成したコアと、導体とを組合せてなる、半導
体に直列に挿入される半導体回路用リアクトルにおい
て、上記非晶質磁性合金が (t−)/t≦0.30 (ここでtは最大板厚、は平均板厚) の表面粗さを有する薄板であることを特徴とする半導体
回路用リアクトルである。That is, the semiconductor circuit reactor of the present invention is a reactor for a semiconductor circuit, which is formed by combining a core formed of an amorphous magnetic alloy and a conductor, and is inserted in series with a semiconductor. A reactor for a semiconductor circuit, which is a thin plate having a surface roughness of −) / t ≦ 0.30 (where t is the maximum plate thickness, is the average plate thickness).
ここでtは上記薄板に関する実測値として求められ、
は上記薄板の重量、幅、長さ、密度をそれぞれW,d,l,ρ
としたときに=W/d・l・ρの式から算出される計算
値である。Here, t is obtained as an actual measurement value for the thin plate,
Is the weight, width, length and density of the above thin plate, respectively W, d, l, ρ
Is a calculated value calculated from the formula of W / d · l · ρ.
この(t−)/tの値が、0.30を超えると該薄帯の表面
凹凸の状態が顕著になり(表面が粗くなり)、高周波領
域での鉄損が著しく大きくなつて使用に適さなくなる。
また、表面粗さが大きいと、コアのパツキングフアクタ
が小さくなるため結果として総磁束が小さくなり好まし
くない。When the value of (t-) / t exceeds 0.30, the surface irregularity of the ribbon becomes remarkable (the surface becomes rough), and the iron loss in the high frequency region becomes significantly large, which makes it unsuitable for use.
Further, if the surface roughness is large, the packing factor of the core becomes small, and as a result, the total magnetic flux becomes small, which is not preferable.
また、上記薄板にあつて、厚み最大値(t)が5μm未
満の場合には、得られた磁心の巻回時において層間絶縁
体を大量に必要とするためその占積率が著しく低下し実
用的でなくなる。更に、tが40μmを超えると高周波領
域における鉄損が著しく増大し電流スパイク等を抑制す
る効果が減少する。したがつて、本発明の磁心にあつて
は、その薄帯の厚み最大値が5μm≦t≦50μmの範囲
に設定することが好ましい。When the maximum thickness (t) of the above thin plate is less than 5 μm, a large amount of interlayer insulator is required when winding the obtained magnetic core, so that the space factor thereof is remarkably reduced and practical use occurs. It becomes untargetable. Further, when t exceeds 40 μm, iron loss in the high frequency region remarkably increases and the effect of suppressing current spikes and the like decreases. Therefore, in the magnetic core of the present invention, it is preferable to set the maximum thickness of the ribbon in the range of 5 μm ≦ t ≦ 50 μm.
本発明に使用する非晶質磁性合金としては一般にMaNbYc
で表わされる合金が考えられる。この場合MはFe,Coか
ら選ばれる少なくとも1種の元素、NはFe,Co以外の遷
移金属から選ばれる少なくとも1種の元素、YはSi,B,
P,C,Ge,Alから選ばれる少なくとも1種の元素であり、
0.60≦a≦0.90,0≦b≦0.15,0.10≦C≦0.35の組成で
あることが好ましい。Generally, MaNbYc is used as the amorphous magnetic alloy used in the present invention.
An alloy represented by In this case, M is at least one element selected from Fe and Co, N is at least one element selected from transition metals other than Fe and Co, and Y is Si, B,
At least one element selected from P, C, Ge, Al,
The composition is preferably 0.60 ≦ a ≦ 0.90, 0 ≦ b ≦ 0.15, 0.10 ≦ C ≦ 0.35.
本発明においては、非晶質磁性合金を単ロール法により
リボン状にして巻回することによりトロイダルコアを形
成、あるいはリング状に打抜いたものを積層してトロイ
ダルコアを形成し、このコアに複数個の巻線を施すこと
により半導体回路用リアクトルが得られる。この半導体
回路用リアクトルを半導体に直列に挿入することにより
半導体回路の電流スパイクやリンギングを抑制すること
ができる。In the present invention, a toroidal core is formed by winding an amorphous magnetic alloy into a ribbon shape by a single roll method, or a toroidal core is formed by stacking punched pieces in a ring shape, and the core is formed on this core. A semiconductor circuit reactor is obtained by providing a plurality of windings. By inserting this semiconductor circuit reactor in series with the semiconductor, current spikes and ringing of the semiconductor circuit can be suppressed.
次に本発明の実施例を説明する。 Next, examples of the present invention will be described.
実施例1 (Co0.87Fe0.05Ni0.04Mn0.02Nb0.02)73Si13B14で表わさ
れる非晶質磁性合金を板厚が25μmで、表面粗さが種々
変化させたリボン状薄板にし、内径6mmで約20回巻回し
てトロイダルコアとし、これに巻線を施こして半導体回
路用リアクトルを形成した。Example 1 (Co 0.87 Fe 0.05 Ni 0.04 Mn 0.02 Nb 0.02 ) 73 Si 13 B 14 was formed into a ribbon-shaped thin plate having a plate thickness of 25 μm and various surface roughness, and an inner diameter of 6 mm. Was wound about 20 times to form a toroidal core, which was then wound to form a reactor for semiconductor circuits.
これらの半導体回路用リアクトルをダイオードに直列に
挿入してスイツチング電源として100kHzにおける効率η
(出力/入力)を求めたところ第1図に示す結果が得ら
れた。これより表面粗さが0.30以下の場合に効率が良好
であることがわかる。By inserting these semiconductor circuit reactors in series with the diode, the efficiency η at 100kHz can be used as a switching power supply.
When the (output / input) was determined, the results shown in FIG. 1 were obtained. From this, it can be seen that the efficiency is good when the surface roughness is 0.30 or less.
また、表面粗さ0.30以下のものは電流スパイクおよび電
流リンギングは大きく抑制されほとんど見られなかつ
た。Moreover, the current spikes and the current ringing were largely suppressed and the surface roughness of 0.30 or less was hardly seen.
実施例2 (Co0.90Fe0.06Cr0.04)74Si14B12で表わされる非晶質磁
性合金を単ロール法により表面粗さが0.20〜0.23で、板
厚が各々18μm,25μm,45μmのリボン状の薄板にし、酸
化マグネシウム粉末で層間絶縁し、内径6mmで20回巻い
てトロイダルコアとし、各々のトロイダルコアに巻線を
施こし半導体回路用リアクトルを形成した。Example 2 (Co 0.90 Fe 0.06 Cr 0.04 ) 74 An amorphous magnetic alloy represented by Si 14 B 12 was formed in a ribbon shape having a surface roughness of 0.20 to 0.23 and a plate thickness of 18 μm, 25 μm and 45 μm by a single roll method. The thin plate of Fig. 2 was inter-layer insulated with magnesium oxide powder, wound 20 times with an inner diameter of 6 mm to form a toroidal core, and winding was applied to each toroidal core to form a semiconductor circuit reactor.
これらの半導体回路用リアクトルをダイオードに直列に
挿入してスイツチング電源として100kHzにおける効率η
(出力/入力)を求めたところ表のような結果が得られ
た。By inserting these semiconductor circuit reactors in series with the diode, the efficiency η at 100kHz can be used as a switching power supply.
When (output / input) was obtained, the results shown in the table were obtained.
〔発明の効果〕 本発明の半導体回路用リアクトルは効率(出力/入力)
をほとんど低下させることなく電流スパイクや電流リン
ギングを防止することができる。 [Advantages of the Invention] The reactor for a semiconductor circuit of the present invention has efficiency (output / input).
It is possible to prevent current spikes and current ringing with almost no decrease in voltage.
第1図は表面粗さに対する効率ηを示すグラフである。 FIG. 1 is a graph showing efficiency η with respect to surface roughness.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 広瀬 順夫 神奈川県横浜市磯子区新杉田町8 東京芝 浦電気株式会社横浜金属工場内 (56)参考文献 特開 昭58−44702(JP,A) 特開 昭58−44704(JP,A) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Juno Hirose 8 Shinsita-cho, Isogo-ku, Yokohama-shi, Kanagawa Tokyo Shibaura Electric Co., Ltd. Yokohama Metal Factory (56) Reference JP-A-58-44702 (JP, A) Kaisho 58-44704 (JP, A)
Claims (2)
組合せてなる、半導体に直列に挿入される半導体回路用
リアクトルにおいて、上記非晶質磁性合金が (t−)/t≦0.30 (ここでtは最大板厚、は平均板厚) の表面粗さを有する薄板であることを特徴とする半導体
回路用リアクトル。1. A reactor for a semiconductor circuit, which is formed by combining a core made of an amorphous magnetic alloy and a conductor and is inserted in series with a semiconductor, wherein the amorphous magnetic alloy is (t −) / t ≦ 0.30. A reactor for a semiconductor circuit, which is a thin plate having a surface roughness of (where, t is the maximum plate thickness and is the average plate thickness).
板厚の薄板であることを特徴とする特許請求の範囲第1
項記載の半導体回路用リアクトル。2. The amorphous magnetic alloy is a thin plate having a plate thickness of 5 μm or more and 40 μm or less.
A semiconductor circuit reactor according to the paragraph.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59019337A JPH07118428B2 (en) | 1984-02-07 | 1984-02-07 | Reactor for semiconductor circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59019337A JPH07118428B2 (en) | 1984-02-07 | 1984-02-07 | Reactor for semiconductor circuit |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8269078A Division JP2854846B2 (en) | 1996-09-20 | 1996-09-20 | Manufacturing method of semiconductor circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60164312A JPS60164312A (en) | 1985-08-27 |
| JPH07118428B2 true JPH07118428B2 (en) | 1995-12-18 |
Family
ID=11996585
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59019337A Expired - Lifetime JPH07118428B2 (en) | 1984-02-07 | 1984-02-07 | Reactor for semiconductor circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07118428B2 (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5844702A (en) * | 1981-09-11 | 1983-03-15 | Toshiba Corp | Magnetic core of amorphous magnetic alloy for high frequency |
-
1984
- 1984-02-07 JP JP59019337A patent/JPH07118428B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60164312A (en) | 1985-08-27 |
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