JPH07118447B2 - Substrate for electric or optical integrated circuit and manufacturing method thereof - Google Patents

Description

TECHNICAL FIELD The present invention relates to a semiconductor crystal substrate used in an electrical or optical integrated circuit and a method for manufacturing the same.

(Prior Art and Problems to be Solved by the Invention) Conventionally, a silicon (Si) substrate, a GaAs substrate, an InP substrate, or the like has been used as a substrate for an electrical or optical integrated circuit. However, these are all substrates of Si simple substance, GaAs simple substance, and InP simple substance.
To date, there have been few substrates that combine nP.
Recently, due to the development of superlattice manufacturing technology, a method for manufacturing a GaAs crystal on a Si substrate has been developed.
It is technically difficult to use as a substrate. Moreover, it is still difficult to grow InP crystals on a Si substrate.

On the other hand, when considering an electric integrated circuit, the integrated circuit based on Si has a large storage capacity, and the integrated circuit based on GaAs has a high information processing speed. If it can be compounded, its meaning is great. Easy to fabricate glass waveguides in optical integrated circuits
GaAs, In which Si substrate and light emitting element, light receiving element, etc. can be manufactured
If P-based materials can be compounded, the structure of optical integrated circuits can be dramatically multi-functionalized. However, it is difficult to combine Si-based devices, GaAs, and InP-based devices with current substrates.

(Means for Solving Problems) An object of the present invention is to solve the above problems and to provide a substrate capable of forming a composite of a Si substrate and a GaAs-based material or an InP-based material. Furthermore, the present invention provides a high-performance electric and optical integrated circuit in which an element based on Si, an element based on GaAs, and an element based on InP are produced on the same substrate by combining the above materials. The purpose is to enable the provision of.

In order to achieve the above object, the present invention provides SiO ₂ on a Si substrate.
A glass material whose main constituent is GeO ₂ and a glass layer whose composition is gradually changed, and a glass layer whose composition is gradually changed is adhered to the glass layer to adhere to the GaAs-based material, GaP-based material, or InP-based material.
The subject of the invention is a substrate for electric or optical integrated circuits, which is characterized by having a semiconductor crystal layer made of a system material.

Furthermore, the present invention is a method in which glass particles synthesized by flame are
When depositing on the substrate, change the composition of the glass particles to Si.
A step of gradually changing the composition containing O ₂ as a main component to a composition containing GeO ₂ as a main component to form a porous glass fine particle layer;
An As-based, GaP-based or InP-based semiconductor crystal plate is placed on the porous glass fine particle layer and heated in an electric furnace.
A step of obtaining a substrate having a three-layer structure in which the porous glass fine particle layer on the Si substrate is a transparent glass layer, and the transparent glass layer and the GaAs-based, GaP-based or InP-based semiconductor crystal plate are adhered to the Si substrate The gist of the invention is a method for manufacturing a substrate for an electric or optical integrated circuit, which comprises:

The substrate of the present invention has, on a Si substrate, a glass layer whose composition is gradually changed from a composition containing SiO ₂ as a main component to a composition containing GeO ₂ as a main component, and a GaAs-based material that is in close contact with the glass layer. , Ga
Having a P-based or InP-based semiconductor crystal layer, that is, a Si substrate, a glass layer with a composition that changes gradually, GaAs, GaP or InP crystal layer having a three-layer structure is the most major feature, This is essentially different from the conventional substrate in which a GaAs crystal film is formed directly on Si, GaAs, GaP, InP or Si. 1 (a) and 1 (b) are basic configuration diagrams of the substrate of the present invention. In FIG. 1 (a), 1 is a Si substrate, 2 is a glass layer whose composition gradually changes, 3 is a GaAs system,
It is a GaP-based or InP-based semiconductor crystal layer. Further, FIG. 1 (b) shows changes in the composition in the glass layer.
The glass composition at the boundary with the Si substrate is 80 mol% SiO ₂ −20 mol% GeO ₂ , and the glass composition at the boundary with the semiconductor crystal layer is 10 mol%.
Mol% SiO ₂ −90 mol% GeO ₂ . Regarding the glass composition near the boundary with the semiconductor crystal layer, it is necessary to change the semiconductor crystal depending on whether the semiconductor crystal is GaAs, GaP or InP in order to adjust the thermal expansion coefficient and softening temperature, and Ga ₂ O ₃ and P ₂ O ₅ are mixed. By doing so, the bonding between the glass layer and the semiconductor layer is further improved. Thus, Si, GaAs, I
The present invention enables compounding of semiconductor materials such as nP and GaP.

Further, the substrate manufacturing method has also been conventionally carried out by MOCVD method or MBE method, etc., but in the present invention, glass fine particles synthesized in a flame are deposited on a Si substrate to form a porous layer, By placing a semiconductor crystal plate on the porous layer and sintering it in an electric furnace, the Si substrate and the semiconductor crystal plate are brought into close contact with each other to produce a composite substrate.

Next, an embodiment of the present invention will be described with reference to the accompanying drawings.

Needless to say, the embodiment is merely an example, and various modifications and improvements can be made without departing from the spirit of the present invention.

(Embodiment 1) FIG. 2 and FIG. 3 show an apparatus for manufacturing a substrate for electric or optical integrated circuit of the present invention. 21 in FIG.
Is a heating element, 22 is a Si substrate, 23 is a porous glass fine particle layer (hereinafter referred to simply as a “porous layer”, a deposited substrate, 24 is a synthetic torch, 25 is a position controller, 26 is a glass material composition adjuster, 27
Indicates a flame gas flow regulator. Next, in FIG. 3, 31 is a core layer, 32 is a heating element, 33 is a support, 34 is a three-layer substrate, 35 is a semiconductor crystal plate, 36 is a porous layer, and 37 is a Si substrate.

FIG. 2 shows an apparatus for forming the porous layer 23 on the substrate 22. In FIG. 2, the Si substrate is placed on the rotating heating element 21.
22 is placed, glass fine particles are synthesized in a flame 28 blown out from the synthetic torch 24, and a porous layer 23 is formed on the Si substrate. At this time, the composition of the glass raw material supplied to the synthetic torch 24 is changed by the composition adjuster 26. Therefore, the substrate
In the porous layer deposited on the 22 glass particles of different composition will be deposited layer by layer or every few layers. As a result, the substrate 22 is made of a glass material containing SiO ₂ as a main component.
A porous layer having a different composition is gradually formed on the glass material containing GeO ₂ as a main component. Further, in order to make the thickness of the porous layer to be deposited uniform, the position control device 25 is used to move the synthetic torch, and the flame gas flow rate regulator is used to change the glass raw material composition. Adjust the gas flow rate and control the flame temperature. In particular, when synthesizing a glass composition containing GeO ₂ as a main component, it is necessary to extremely lower the flame temperature, and therefore, a flammable gas (H ₂ , CH ₄ , C ₃ H _8, etc.) is used as an inert gas (He, It is necessary to use a mixed gas of N ₂ , Ar, etc.) as the combustion gas or carbon monoxide as the combustion gas.

Next, FIG. 3 shows a heating furnace for producing a substrate having a three-layer structure by sintering the porous layer. In FIG. 3, the semiconductor crystal plate 35 is placed on the porous layer 36 produced in FIG. 2 to form a three-layer substrate 34, which is sealed in the furnace core tube 31 and heat-treated. At this time, an inert gas such as Ar, He, N ₂ flows into the core tube 31. The heating temperature depends on the type of semiconductor crystal used or GeO ₂
And SiO ₂ vary depending on the composition ratio.

For example, Si as the substrate and GaAs as the semiconductor crystal.
When used, the softening temperature of Si (hereinafter referred to as MP) is 141
4 ℃, MP of GaAs is 1238 ℃, thermal expansion coefficient of Si (hereinafter referred to as TE) is 2.6 × 10 ^-6 (/ degree), TE of GaAs is 5.7 × 10
^-6 (/ degree). Meanwhile MP of SiO ₂ is a basic composition of the glass layer to be deposited 1680 ° C., MP of GeO ₂ is 1080 ° C., the SiO ₂ T.
E is 0.5 × 10 ^-6 (/ degree) and TE of GeO ₂ is 7.0 × 10 ^-6 (/ degree). Therefore, the composition of the glass layer deposited on the Si substrate (hereinafter referred to as “Go”) is 70 mol% SiO ₂ −.
About 30 mol% GeO ₂ is good. With this glass composition, MP = 1
It is about 300 ℃ and TE = 1.5 × 10 ^-6 (/ degree). Then sequentially
A glass layer having a small amount of SiO ₂ and a large amount of GeO _{2, that} is, a glass layer having a low softening temperature and a large thermal expansion coefficient is deposited to change the composition in the glass layer into a layered form. For GaAs, MP is 1238 ℃ TE
Is 5.7 × 10 ^-6 (/ degree), the composition of the glass layer (G ₁ ) that adheres to GaAs is 10 mol% SiO ₂ , 90 mol% GeO ₂
The degree is good. With this glass composition, MP = 1150 ℃, TE = 5
It becomes about × 10 ^-6 (/ degree). In this way, a porous layer having a thickness of about 100 μm was formed on the Si substrate having a thickness of 0.5 mm by gradually changing the composition in about 10 steps from G ₀ to G ₁ by the apparatus shown in FIG. The heating temperature of the heating element is 400 ° C, the rotation speed is 5
rpm. Also, to the synthesis torch, SiCl ₄ gas and GeCl ₄
The combined gas was supplied at 100 cc / min, the combustion gas (H ₂ + He) at 10 / min, and the supporting gas (O ₂ ) at 10 / min. The mixing of He in the combustion gas is for controlling the flame temperature. A similar porous layer could be formed by using carbon monoxide (CO) as the combustion gas.

Next, a thickness is formed on the porous layer (the glass composition of the uppermost layer G ₁ is 10 mol% SiO ₂ −90 mol% GeO ₂ ) formed as described above.
A 0.3 mm GaAs plate was placed and sintered in the heating furnace shown in FIG. The maximum heating temperature was 1100 ° C., and He gas as an inert gas was flowed in at 5 per minute. The heating time to the maximum temperature required about 5 hours, and the maximum temperature was maintained for 1 hour. As a result, the Si substrate and the GaAs plate were bonded via the glass layer, and a substrate having a three-layer structure was obtained.

A substrate with a three-layer structure was obtained by the same process when GaP was used as the crystal plate.

In addition, when GaCl ₃ was supplied together with SiCl ₄ GeCl ₄ when forming the porous layer to synthesize a glass layer containing Ga ₂ O ₃ , GaA
The bond with s was more stable. In addition, the improvement of bonding was also observed when As ₂ O ₃ was added.

(Example 2) When InP is used as a semiconductor crystal, MP of InP is 1070
Since the temperature and the TE are 4.5 × 10 ⁻⁶ (/ degree), the heat treatment temperature for adhesion to the glass layer needs to be 1000 ° C. or lower. Therefore, in this case, the gas layer formed by gradually changing the composition on the Si substrate by the apparatus shown in FIG. 2 is changed into the transparent glass layer once in the heating furnace shown in FIG. Porous layer of glass composition (G
₂ ) is formed, and an InP plate is placed and processed in a heating furnace to be bonded to the InP crystal plate. FIG. 4 shows a sectional view of the substrate. In FIG. 4, 41 is a Si substrate, 42 is a glass layer (G _{0 to} G ₁ ), 43 is a glass layer (G ₂ ), and 44 is an InP crystal plate.

When actually manufacturing this substrate, the following is performed.
That is, in the manufacturing apparatus shown in FIG. 2, the glass layers G ₀ to G ₁ are formed on the Si substrate in the same manner as in Example 1 above. Then, again on the glass layer, 10 mol% P ₂
After forming a porous layer (G ₂ ) having a glass composition of O ₅ -90 mol% GeO ₂ , place an InP crystal plate and heat-treat at about 950 ° C.
It bonds the P crystal plate and the glass layer. Since the glass composition of G ₂ has an MP of 1000 ° C. and a TE of 5 × 10 ⁻⁶ (/ degree), the adhesion to the InP crystal plate is extremely good. Also in this case, P ₂ O ₅ contained in the GeO ₂ glass at 10 mol% has an effect of improving the adhesion with InP.

(Embodiment 3) In the above Embodiments 1 and 2, a crystal plate of GaAs, InP or the like is placed on the porous layer formed on the Si substrate, heat-sintered, and S
i, an example of producing a substrate having a three-layer structure of a glass layer GaAs (or GaP, InP) is shown, but a crystal plate is not used, and a MOCVD method, a PE method, an MBE method or the like is used on the glass layer. GaAs type, GaP type I
An nP-based semiconductor crystal layer can be formed. Also in this case, the composition of the glass layer is changed according to the material of the semiconductor crystal layer to match MP and TE with the characteristics of the semiconductor material.
Ga ₂ O ₃ in the glass mainly composed of GeO ₂ for GaAs, As ₂
O ₃ The glass composition plus the like, GaP, for InP Ya P ₂ O ₅
The composition with Ga ₂ O ₃ added is good.

(Example 4) A Si substrate, a glass layer, manufactured as in Examples 1 to 3,
A substrate having a three-layer structure of semiconductor crystal layers can be processed by plasma etching, electron beam exposure or the like to form a desired pattern. FIG. 5 shows a sectional view of the substrate processed by plasma etching. In FIG. 5, 51 is a Si substrate,
52 is a glass layer and 53 is a GaAs layer. By plasma etching, a pattern with a width of 1 μm to 100 μm could be easily formed. Further, the electron beam exposure made it possible to form a pattern having a width of 1 μm or less.

(Embodiment 5) FIG. 6 is a production example of an optical and electric integrated circuit produced by using the substrate of the present invention. In FIG. 6, 61 is a Si substrate and 62 is a Si substrate.
Memory part on the substrate, 63 is a coupling path, 64 is a GaAs system operation part, 65
Is a coupling path, 66 is light, an electric conversion part, and 67 is an optical fiber. In FIG. 6, the pulse introduced by the fiber of 67 is converted into an electric signal by the light / electric conversion unit of 66, processed by the arithmetic unit of 64, and then the memory unit 62 on the Si substrate 61. It is a memory.

(Example 6) As a semiconductor crystal plate or a crystal layer, GaAs described above is used.
In addition to Ga-based, GaP-based, InP-based, Ge semiconductor crystal layers can also be used. In this case, since good particularly adhesion and GeO _2, and燃結at a GeO ₂ crystal plates on the GeO ₂ based porous layer glass layer Si
You can also form a substrate, glass layer, Ge crystal layer,
It is also possible to synthesize a Ge crystal layer on the GeO ₂ glass layer. Further, a Ge light receiving element or the like can be formed based on this Ge crystal layer.

When the porous glass fine particle layer is heated in an electric furnace to be transparent vitrified, it is difficult to vitrify when the heating temperature is 800 ° C to 1400 ° C and is less than 800 ° C. This is because if the content exceeds the upper limit, the melting point becomes higher than the melting point and the predetermined shape cannot be maintained. Further, when the semiconductor glass sheets are placed on the porous glass fine particle layer containing GeO ₂ as a main component and heated to be a transparent vitrification, the heating temperature is set to 500 ° C to 1000 ° C because vitrification is difficult at less than 500 ° C. Yes, 1000 ℃
This is because the shape cannot be maintained when the value exceeds.

(Effects of the Invention) As described above, according to the present invention, a glass layer is formed on a Si substrate, and a semiconductor crystal layer of GaAs, InP, GaP, Ge or the like is formed on the glass layer to form a three-layer structure. There is an advantage that the substrate can be easily manufactured. In addition, GaAs, In and
There is an advantage that a light emitting / light receiving element can be easily formed using P, GaP, Ge or the like, and an optical integrated circuit can be manufactured by combining this with an optical waveguide. In addition, the Si substrate is used as the memory part, and this and Ga
An optical / electrical integrated circuit can be realized by combining an As-based high-speed arithmetic unit and connecting the light receiving / light emitting unit.

Further, according to the present invention, since a semiconductor crystal layer insulated by a glass layer can be formed on a Si substrate, there is an advantage that a high breakdown voltage electric integrated circuit can be formed.

[Brief description of drawings]

1a and 1b are basic structural diagrams of the present invention, FIGS. 2 and 3 are device configuration diagrams for manufacturing a substrate, FIG. 4 is a sectional view of the substrate, and FIG. 5 is an etched substrate. FIG. 6 is a sectional view showing the configuration of an optical / electrical integrated circuit. 1 ... Si substrate, 2 ... glass layer, 3 ... semiconductor crystal layer,
21 ... Heating element, 22 ... Si substrate, 23 ... Porous layer, 24 ...
Synthetic torch, 25 …… Position controller, 26 …… Composition adjuster, 27
...... Flow rate adjuster, 31 …… Core tube, 32 …… Heating element, 33 ……
Support base, 34 …… Trilayer substrate, 35 …… Semiconductor crystal plate, 36 ……
Porous layer, 37 …… Si substrate, 41 …… Si substrate, 42 …… Glass layer, 43 …… Glass layer, 44 …… InP crystal plate, 51 …… Si substrate, 52 …… Glass layer, 53 …… GaAs layer, 61 ... Si substrate, 62
...... Si memory section, 63 ...... coupling path, 64 …… GaAs operation section,
65 ... Coupling path, 66 ... Optical / electrical converter, 67 ... Optical fiber.

Claims (4)

[Claims] 1. A glass layer having a composition gradually changing from a glass material having SiO ₂ as a main component to a glass material having GeO ₂ as a main component on a Si substrate, and the glass layer is closely adhered to the glass layer to form a GaAs material. A substrate for an electric or optical integrated circuit having a semiconductor crystal layer made of a GaP-based material or an InP-based material. 2. The substrate for electric or optical integrated circuits according to claim 1, wherein Ga and P are contained in the glass layer having gradually different compositions. 3. When depositing glass particles synthesized by a flame on a Si substrate, the composition of the glass particles is gradually changed from a composition containing SiO ₂ as a main component to a composition containing GeO as a main component, and porous glass is obtained. Step of forming fine particle layer and GaAs
-Based, GaP-based or InP-based semiconductor crystal plate is placed on the porous glass particle layer and heated in an electric furnace to remove the Si.
The porous glass fine particle layer on the substrate is a transparent glass layer,
A substrate for electrical or optical integrated circuit, comprising a step of obtaining a substrate having a three-layer structure in which the transparent glass layer and the GaAs-based, GaP-based or InP-based semiconductor crystal plate are adhered to the Si substrate. Production method. 4. Prior to placing a GaAs-based, GaP-based or InP-based semiconductor crystal plate on the porous glass fine particle layer, the porous glass fine particle layer is once heated in an electric furnace at 800 ° C. to 1 ° C.
After heating at 400 ° C and vitrification, a porous glass fine particle layer containing GeO ₂ as a main component is formed again, after which the semiconductor crystal plate is placed and heated at a temperature of 500 ° C to 1000 ° C. The method for producing a substrate for an electrical or optical integrated circuit according to claim 3, wherein the substrate is a transparent glass.