JPH07118575B2 - Thick film circuit board and manufacturing method thereof - Google Patents
Thick film circuit board and manufacturing method thereofInfo
- Publication number
- JPH07118575B2 JPH07118575B2 JP61054858A JP5485886A JPH07118575B2 JP H07118575 B2 JPH07118575 B2 JP H07118575B2 JP 61054858 A JP61054858 A JP 61054858A JP 5485886 A JP5485886 A JP 5485886A JP H07118575 B2 JPH07118575 B2 JP H07118575B2
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- Prior art keywords
- layer
- firing
- conductive paste
- electrode layer
- thick film
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- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】 〔発明の技術分野〕 本発明は大容量の印刷コンデンサを有する厚膜回路基板
とその製造方法に関する。Description: TECHNICAL FIELD The present invention relates to a thick film circuit board having a large-capacity printed capacitor and a method for manufacturing the same.
近年、電子機器の小形軽量化を図るために、ハイブリッ
ドICが多用されて来ている。このハイブリッドICは、一
般に、アルミナ等の絶縁基板に導電性ペーストや抵抗ペ
ーストを印刷・焼成して配線パターンや抵抗体を形成し
た厚膜回路基板に、リード線のないチップタイプの受動
素子や能動素子(以下チップ部品という)を実装したも
のである。上記ハイブリッドICを更に高密度、高機能化
するために、上記チップ部品のうち大容量のコンデンサ
も誘導体ペーストを印刷・焼成して膜状に形成する印刷
コンデンサ付の厚膜回路基板の実用化が進んで来てい
る。In recent years, hybrid ICs have been widely used to reduce the size and weight of electronic devices. In general, this hybrid IC is a chip-type passive element with no lead wire or active element on a thick film circuit board where wiring patterns and resistors are formed by printing and firing conductive paste or resistance paste on an insulating substrate such as alumina. An element (hereinafter referred to as a chip component) is mounted. In order to further increase the density and functionality of the above hybrid ICs, a thick film circuit board with a printed capacitor, in which a large-capacity capacitor of the above chip components is printed and fired with a dielectric paste to form a film, has been put into practical use. It is coming.
このような従来の厚膜回路基板を示す第3図において、
30はアルミナ等のセラミック材料で形成された絶縁基板
である。この絶縁基板30には、銀/パラジウム(Ag/P
d)系の導電性ペーストを印刷・焼成して、膜コンデン
サの下部電極31及び配線パターン層32が形成される。次
に、鉛系ガラスを含むチタン酸バリウム系等の高誘電率
の誘電体ペーストを、上記下部電極31の上に印刷・焼成
して誘電体層33を形成する。そして、この誘電体層33の
上に、再び銀/パラジウム系の導電性ペーストを印刷・
焼成して上部電極34を形成するものである。以上によ
り、印刷コンデンサが絶縁基板30上に形成される。な
お、上記厚膜材料の焼成は、空気中で900℃前後で行な
われる。In FIG. 3 showing such a conventional thick film circuit board,
Reference numeral 30 is an insulating substrate formed of a ceramic material such as alumina. This insulating substrate 30 has silver / palladium (Ag / P
The lower electrode 31 and the wiring pattern layer 32 of the membrane capacitor are formed by printing and firing a d) type conductive paste. Next, a high dielectric constant dielectric paste such as barium titanate containing lead glass is printed and fired on the lower electrode 31 to form the dielectric layer 33. Then, a silver / palladium-based conductive paste is printed again on the dielectric layer 33.
The upper electrode 34 is formed by firing. As described above, the printed capacitor is formed on the insulating substrate 30. The thick film material is fired in air at about 900 ° C.
上述した従来の印刷コンデンサを有する厚膜回路基板
は、その配線材料として銀/パラジウム系の導電性ペー
ストを使用している。この導電性ペーストはシート抵抗
が20〜50mΩ/□と高いので、配線パターン層32の導電
率が低く、つまりパターン抵抗が高くなってしまう。ま
た、吸湿により銀の移行現象(マイグレーション)が発
生するので、パターン間の絶縁劣化が生じ易くなる。さ
らには、貴金属であるため、ペーストコストが高くなる
という欠点がある。The thick film circuit board having the above-mentioned conventional printed capacitor uses a silver / palladium-based conductive paste as its wiring material. Since this conductive paste has a high sheet resistance of 20 to 50 mΩ / □, the conductivity of the wiring pattern layer 32 is low, that is, the pattern resistance is high. Moreover, since a migration phenomenon of silver occurs due to moisture absorption, insulation deterioration between patterns is likely to occur. Further, since it is a noble metal, there is a drawback that the paste cost becomes high.
そこで、最近のハイブリッドICでは、配線材料として銅
系の導電性ペーストを用い、これが酸化しないよう窒素
ガス等の不活性雰囲気中で低温焼成することが行なわれ
ている。この導電性ペーストはシート抵抗が2〜5mΩ/
□と低く、また移行現象も生じにくいという利点を有す
るものである。Therefore, in recent hybrid ICs, a copper-based conductive paste is used as a wiring material, and low-temperature firing is performed in an inert atmosphere such as nitrogen gas so as not to oxidize it. This conductive paste has a sheet resistance of 2-5mΩ /
It has the advantages that it is as low as □ and that the transition phenomenon is unlikely to occur.
しかしながら、上記銅系の導電性ペーストを、従来の印
刷コンデンサを有する厚膜回路基板における銀/パラジ
ウム系の導電性ペーストに置き換えることはできない。
一般的に、高誘電率の誘電体ペーストは鉛系化合物を含
んでいるため、不活性雰囲気中で焼成するとこの鉛化合
物が還元されて金属鉛となってしまう。そのため、単に
銅系の導電性ペーストによる製造工程を適用すると、膜
コンデンサの容量が大幅に低下すると共に、上下電極間
の絶縁抵抗も大幅に低下してしまい、膜コンデンサとし
ての機能を果さなくなってしまう。However, the copper-based conductive paste cannot be replaced with a silver / palladium-based conductive paste in a thick film circuit board having a conventional printed capacitor.
In general, since a high-dielectric-constant dielectric paste contains a lead-based compound, the lead compound is reduced to metallic lead when fired in an inert atmosphere. Therefore, simply applying the manufacturing process using a copper-based conductive paste will significantly reduce the capacitance of the membrane capacitor and also significantly reduce the insulation resistance between the upper and lower electrodes, and the function as a membrane capacitor will not be fulfilled. Will end up.
以上説明したように、大容量の印刷コンデンサを有し、
かつ配線パターンの特性が優れた厚膜回路基板を、従来
実現することはできなかった。As explained above, it has a large-capacity printed capacitor,
In addition, it has not been possible to realize a thick film circuit board having excellent wiring pattern characteristics.
特に、数1000pFの大容量のパスコンデンサを多数有する
テレビ受像機の電子同調チューナ等では、コンデンサの
厚膜化による高密度実装が望まれるが、従来の銀/パラ
ジウム系の導電性ペーストを用いた厚膜回路基板では、
回路の配線パターンの導電率が低いため、高周波特性が
悪くなり、実用化は不可能であった。In particular, in electronic tuning tuners for television receivers that have a large number of large-capacity pass capacitors of several thousand pF, high-density mounting by thickening the capacitor is desired, but the conventional silver / palladium-based conductive paste was used. For thick film circuit boards,
Since the conductivity of the circuit wiring pattern is low, the high-frequency characteristics are poor, and practical application is impossible.
本発明の目的は、大容量の印刷コンデンサを有し、かつ
配線パターンの特性が優れた厚膜回路基板とその製造方
法を提供することにある。An object of the present invention is to provide a thick film circuit board having a large capacity printed capacitor and excellent wiring pattern characteristics, and a method for manufacturing the same.
この発明では、鉛系化合物含有の高誘電率ペーストで形
成される誘電体層が還元しないよう下部及び上部電極に
空気中焼成型の導電性ペーストを用いて大容量の印刷コ
ンデンサを形成し、さらに上記下部及び上部電極の引き
出し配線パターンを含む導体配線層を不活性雰囲気中焼
成型の銅系の導電性ペーストで形成して配線パターンの
特性向上を図る。この焼成の際に生じる上記誘電体層の
還元を防止するため、上記印刷コンデンサを被覆層で被
覆することによって、上記目的を達成している。In this invention, a large-capacity printed capacitor is formed by using an in-air firing type conductive paste for the lower and upper electrodes so that the dielectric layer formed of the high dielectric constant paste containing a lead-based compound is not reduced, and The conductor wiring layer including the lead wiring patterns for the lower and upper electrodes is formed of a copper-based conductive paste that is fired in an inert atmosphere to improve the characteristics of the wiring pattern. In order to prevent reduction of the dielectric layer that occurs during firing, the printed capacitor is covered with a coating layer to achieve the above object.
以下、本発明の一実施例について図面を参照して詳細に
説明する。An embodiment of the present invention will be described in detail below with reference to the drawings.
第1図(a)において、10はアルミナ等のセラミック材
料で形成された絶縁基板で、銀/パラジウム系等の空中
焼成型の導電性ペーストを印刷し、空気中で900℃〜950
℃で約1時間焼成して、コンデンサの下部電極11を形成
する。次に第1図(b)に示すように、鉛系化合物を含
む高誘電率の誘電体ペーストを上記下部電極11上に印刷
し、空気中で900℃〜950℃で約1時間焼成して、誘電体
層12を形成する。そして、この誘電体層12上に上部電極
13を、上記下部電極11と同様印刷・焼成して第1図
(c)の如く形成する。以上により、膜コンデンサが印
刷・形成される。In FIG. 1 (a), 10 is an insulating substrate formed of a ceramic material such as alumina, which is printed with an air-baking type conductive paste such as silver / palladium and is heated in the air at 900 ° C to 950 ° C.
The lower electrode 11 of the capacitor is formed by firing at 1 ° C. for about 1 hour. Next, as shown in FIG. 1 (b), a high dielectric constant dielectric paste containing a lead-based compound is printed on the lower electrode 11 and fired in air at 900 ° C. to 950 ° C. for about 1 hour. Forming the dielectric layer 12. Then, on this dielectric layer 12, the upper electrode
13 is printed and fired in the same manner as the lower electrode 11 to form as shown in FIG. By the above, the membrane capacitor is printed / formed.
次に、第1図(d)に示すように、上記下部電極11,誘
電体層12及び上部電極13をほぼ覆うようにして結晶性ガ
ラス等を主成分とした絶縁ペーストを印刷し、やはり90
0℃前後で約1時間焼成して被覆層14を形成する。この
とき、下部電極11及び上部電極13から配線パターンを引
き出すため、被覆層14には夫々開口部15,16を設けてお
く。また、誘電体層12は上述した還元を防止するため、
完全に被覆しておく必要がある。Next, as shown in FIG. 1 (d), an insulating paste containing crystalline glass or the like as a main component is printed so as to almost cover the lower electrode 11, the dielectric layer 12 and the upper electrode 13, and a 90
The coating layer 14 is formed by baking at about 0 ° C. for about 1 hour. At this time, in order to draw out the wiring pattern from the lower electrode 11 and the upper electrode 13, the coating layer 14 is provided with openings 15 and 16, respectively. Further, the dielectric layer 12 prevents the above-mentioned reduction,
Must be completely covered.
その後、第1図(e)の如く、上記開口部15,16を介し
て下部電極11及び上部電極13に接続する電極引き出し配
線パターン17,18と、回路基板の配線パターン19を、銅
系の電導性ペーストを用いて印刷し、窒素ガス等の不活
性雰囲気中で600℃〜900℃で約1時間焼成して形成す
る。Thereafter, as shown in FIG. 1 (e), the electrode lead-out wiring patterns 17 and 18 connected to the lower electrode 11 and the upper electrode 13 through the openings 15 and 16 and the wiring pattern 19 of the circuit board are made of copper-based material. It is formed by printing using an electrically conductive paste and firing at 600 ° C. to 900 ° C. for about 1 hour in an inert atmosphere such as nitrogen gas.
必要により、上述した厚膜回路全体をカバーするオーバ
ーコート層(図示せず)を形成する。これは一般的に、
低融点のガラス絶縁ペーストを印刷して600℃以下の低
温で窒素ガス中で焼成するか、または有機系絶縁樹脂ペ
ーストを印刷、硬化して行なわれる。If necessary, an overcoat layer (not shown) that covers the entire thick film circuit described above is formed. This is generally
It is performed by printing a low-melting-point glass insulating paste and baking it at a low temperature of 600 ° C. or lower in nitrogen gas, or by printing and curing an organic insulating resin paste.
上記実施例では、下部及び上部電極11,13を空気中焼成
型の導電性ペーストで形成しているので電極11,13の形
成時に誘電体層12の還元は発生しない。さらに、被覆層
14が誘電体層12を完全に被覆して不活性雰囲気から分離
している。従って、鉛系化合物を含む高誘電率ペースト
で形成される誘電体層12は、回路の配線パターン17〜19
の形成に必要な銅系の導電性ペーストの焼成時にも還元
されることがなく、大容量の印刷コンデンサを形成する
ことができる。In the above embodiment, since the lower and upper electrodes 11 and 13 are formed of the air-baking type conductive paste, reduction of the dielectric layer 12 does not occur when the electrodes 11 and 13 are formed. Furthermore, the coating layer
14 completely covers the dielectric layer 12 and separates it from the inert atmosphere. Therefore, the dielectric layer 12 formed of the high-dielectric-constant paste containing the lead-based compound has the wiring patterns 17 to 19 of the circuit.
It is possible to form a large-capacity printed capacitor without being reduced even when the copper-based conductive paste required for the formation of the above is baked.
次に、上記実施例により形成された印刷コンデンサの特
性について説明する。Next, the characteristics of the printed capacitor formed by the above embodiment will be described.
ここでは、各層の整合性等の相性を考慮して、電極11,1
3の銀/パラジウム系導電性ペーストとしてデュポン社
製#9843、誘電体層12の鉛系化合物を含む高誘電率ペー
ストとして同#5217、被覆層14を形成する結晶質ガラス
系オーバーコートとして同#9688、配線パターン17〜19
を形成する低温焼成型の銅系導電性ペーストとして同#
6001Dを用いた。Here, considering the compatibility such as the matching of each layer, the electrodes 11, 1
DuPont's # 9843 as the silver / palladium-based conductive paste of No. 3, # 5217 as the high dielectric constant paste containing the lead-based compound of the dielectric layer 12, and # 5 as the crystalline glass-based overcoat forming the coating layer 14. 9688, wiring patterns 17-19
As a low temperature firing type copper-based conductive paste that forms
6001D was used.
次表に、誘電体層12の焼成後の膜厚を約50μmに形成し
た場合における、印刷コンデンサの諸特性を示す。な
お、比較例として還元防止用の被覆層14を形成しないで
配線パターン17〜19を印刷し、窒素ガス中で焼成した場
合の印刷コンデンサの諸特性も併せて示す。The following table shows various characteristics of the printed capacitor when the film thickness of the dielectric layer 12 after firing is formed to about 50 μm. As a comparative example, various characteristics of the printed capacitor when the wiring patterns 17 to 19 are printed without forming the reduction preventing coating layer 14 and fired in nitrogen gas are also shown.
この表から、実施例によれば、大容量で上下電極間の絶
縁抵抗が大きく、かつ耐圧特性の優れた印刷コンデンサ
が形成でき、一方、比較例では誘電体層12の鉛化合物が
還元されて、コンデンサの性能として実用性のない事が
分かる。From this table, according to the example, it is possible to form a printed capacitor having a large capacity, a large insulation resistance between the upper and lower electrodes, and an excellent withstand voltage characteristic, while the lead compound of the dielectric layer 12 is reduced in the comparative example. , It can be seen that the performance of the capacitor is not practical.
以上説明したように本実施例によれば、鉛系化合物を含
む高誘電率ペーストを用いても、被覆層14により鉛系化
合物の還元を防止し得るので、大容量の厚膜コンデンサ
を形成することができる。 As described above, according to this embodiment, even if a high dielectric constant paste containing a lead-based compound is used, reduction of the lead-based compound can be prevented by the coating layer 14, so that a large-capacity thick film capacitor is formed. be able to.
配線材料として銅系の導電性ペーストを用い、これが酸
化しないように不活性雰囲気中で低温で焼成した。これ
により、銅系の導電性ペーストを用いることを可能とし
たため、移行現象の発生を抑えることができる。A copper-based conductive paste was used as the wiring material, and was baked at a low temperature in an inert atmosphere so that it would not be oxidized. This makes it possible to use a copper-based conductive paste, so that the occurrence of the migration phenomenon can be suppressed.
また、回路の主たる配線パターン17〜19を銅系の導電性
ペーストを用いて形成しているので、配線パターンのイ
ンピーダンスを極めて低くすることが可能となり、高周
波特性が向上する。従って数1000pFの大容量バスコンデ
ンサを多数有する電子同調チューナ等の高周波回路にも
実用可能な厚膜回路基板を得ることができる。Further, since the main wiring patterns 17 to 19 of the circuit are formed by using the copper-based conductive paste, the impedance of the wiring pattern can be made extremely low and the high frequency characteristics are improved. Therefore, it is possible to obtain a thick film circuit board that can be practically used for a high frequency circuit such as an electronic tuning tuner having a large number of large-capacity bus capacitors of several thousand pF.
さらに、銀/パラジウム系の導電性ペーストは上部電極
11、下部電極13のみの限られた部品にしか適用されてい
ないため、移行現象によるパターン間の絶縁劣化が極め
て生じにくい利点を有する。Furthermore, the silver / palladium-based conductive paste is used for the upper electrode.
11. Since it is applied only to a limited part of the lower electrode 13, it has an advantage that insulation deterioration between patterns due to a transition phenomenon is extremely unlikely to occur.
なお、厚膜回路基板として通常使われている印刷抵抗の
形成を本発明と組合せて、印刷抵抗及び印刷コンデンサ
を有する厚膜回路基板を得てもよい。It should be noted that the formation of a printed resistor commonly used as a thick film circuit board may be combined with the present invention to obtain a thick film circuit board having a printed resistor and a printed capacitor.
次に、本発明の他の実施例について、第2図を参照して
説明する。Next, another embodiment of the present invention will be described with reference to FIG.
第2図に示すものは、下部電極21及び上部電極23から配
線パターンを引き出すため被覆層24に開口部を設けるの
ではなく、夫々電極21,23の端部25,26を露出して被覆層
24を形成したものである。なお、この場合も誘電体層22
は被覆層24によって完全に被覆しておく。この実施例で
も、先の実施例と同様の効果を得ることができる。The structure shown in FIG. 2 does not have openings in the coating layer 24 to draw out the wiring pattern from the lower electrode 21 and the upper electrode 23, but exposes the ends 25 and 26 of the electrodes 21 and 23, respectively.
Formed 24. In this case also, the dielectric layer 22
Is completely covered by the coating layer 24. Also in this embodiment, the same effect as the previous embodiment can be obtained.
本発明によれば、大容量の印刷コンデンサを有し、さら
に配線パターンの特性が優れた厚膜回路基板とその製造
方法を提供することができる。According to the present invention, it is possible to provide a thick film circuit board having a large-capacity printed capacitor and excellent wiring pattern characteristics, and a method for manufacturing the same.
第1図は本発明の一実施例を示す側断面図、第2図は本
発明の他の実施例を示す側断面図、第3図は従来の厚膜
回路基板を示す側断面図である。 10……絶縁基板、11……下部電極、 12……誘電体層、13……上部電極、 14……被覆層、15,16……開口部、 17〜19……配線パターン。FIG. 1 is a side sectional view showing an embodiment of the present invention, FIG. 2 is a side sectional view showing another embodiment of the present invention, and FIG. 3 is a side sectional view showing a conventional thick film circuit board. . 10 ... Insulating substrate, 11 ... Lower electrode, 12 ... Dielectric layer, 13 ... Upper electrode, 14 ... Covering layer, 15,16 ... Opening, 17-19 ... Wiring pattern.
Claims (2)
体層及び前記下部電極層と同材料の上部電極層を積層
し、空気中で焼成して形成してなる印刷コンデンサと、 前記下部及び上部電極層の一部を残して被覆する被覆層
と、 前記被覆層が被覆されていない前記下部及び上部電極層
に接続する引き出し配線パターンを兼ね、不活性ガス雰
囲気中焼成型の銅系導電性ペーストで形成された導体配
線層とを具備したことを特徴とする厚膜回路基板。1. An insulating substrate, a lower electrode layer, a dielectric layer made of a lead-based compound, and an upper electrode layer made of the same material as the lower electrode layer are laminated on the insulating substrate and formed by firing in air. A printed capacitor, a coating layer that covers a part of the lower and upper electrode layers, and a lead-out wiring pattern that connects to the lower and upper electrode layers that are not covered with the coating layer, and is made of an inert gas. A thick film circuit board, comprising: a conductor wiring layer formed of a copper-based conductive paste that is fired in an atmosphere.
ペーストを印刷、焼成して下部電極層を形成する第1の
工程と、 前記下部電極層上に鉛系化合物を含む高導電率ペースト
を印刷、焼成して誘電体層を形成する第2の工程と、 前記誘導体層上に前記下部電極層と同材料の導電性ペー
ストを印刷、焼成して上部電極層を形成する第3の工程
と、 前記下部電極層、誘電体層及び上部電極層からなる印刷
コンデンサを被覆層を形成する第4の工程と、 前記被覆層で被覆された下部及び上部電極の引き出し配
線パターンを含む導体配線層を、不活性ガス雰囲気中焼
成型の銅系導電性ペーストを印刷焼成して形成する第5
の工程とを具備してなることを特徴とする厚膜回路基板
の製造方法。2. A first step of printing a firing type conductive paste in an air atmosphere on an insulating substrate and firing the paste to form a lower electrode layer, and a high conductivity containing a lead-based compound on the lower electrode layer. A second step of printing and firing a paste to form a dielectric layer; and a third step of printing and firing a conductive paste of the same material as the lower electrode layer on the dielectric layer to form an upper electrode layer. A fourth step of forming a coating layer on the printed capacitor including the lower electrode layer, the dielectric layer and the upper electrode layer; and a conductor wiring including a lead wiring pattern of the lower and upper electrodes coated with the coating layer. A fifth layer is formed by printing and firing a copper-based conductive paste that is fired in an inert gas atmosphere.
And a step of manufacturing the thick film circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61054858A JPH07118575B2 (en) | 1986-03-14 | 1986-03-14 | Thick film circuit board and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61054858A JPH07118575B2 (en) | 1986-03-14 | 1986-03-14 | Thick film circuit board and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62213194A JPS62213194A (en) | 1987-09-19 |
| JPH07118575B2 true JPH07118575B2 (en) | 1995-12-18 |
Family
ID=12982287
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61054858A Expired - Lifetime JPH07118575B2 (en) | 1986-03-14 | 1986-03-14 | Thick film circuit board and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07118575B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2795716B2 (en) * | 1989-02-21 | 1998-09-10 | タツタ電線株式会社 | Printed wiring board |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50110061A (en) * | 1974-02-13 | 1975-08-29 | ||
| JPS5879837A (en) * | 1981-10-31 | 1983-05-13 | Tdk Corp | Electrically conductive paste composition |
-
1986
- 1986-03-14 JP JP61054858A patent/JPH07118575B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62213194A (en) | 1987-09-19 |
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