JPH0719845B2 - Semiconductor integrated circuit device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a semiconductor integrated circuit device including multi-layer metal wiring.

2. Description of the Related Art A conventional example of a semiconductor integrated circuit device composed of multi-layer metal wiring,
An example of an N-channel MOS LSI is illustrated in FIG.
Figure 2 shows an N-channel MO consisting of two layers of aluminum wiring.
FIG. 3 is a cross-sectional view of a main part of SLSI. This LSI is a MOS field effect transistor which is formed on a p-type silicon substrate 1 and comprises a gate oxide film 3, a gate electrode 4 and a source / drain diffusion layer 5 which are formed in an active region separated by a field oxide film 2. (Hereinafter referred to as MOSFET) Q _A , Q _B , Q _C , Q _D
It is composed of an aluminum wiring 8 and a second aluminum wiring 10. The first interlayer insulating film 7 and the second aluminum wiring 8 are provided between the gate electrode 4 and the first aluminum wiring 8 and between the first aluminum wiring 8 and the second aluminum wiring 10, respectively.
Insulation is maintained by the interlayer insulating film 9.

In conventional multi-layer aluminum wiring LSI, M
Most of the OSFETs are similar to the MOSFET Q _B shown in FIG.
It is connected to the source / drain diffusion layer 5 of ET (Q _{A in} FIG. 2). However, like the MOSFET Q _C , its gate electrode 4 is connected to the source / drain diffusion layer 5 of another MOSFET (Q _{D in} the case of FIG. 2) through the first aluminum wiring 8 and the second aluminum wiring 10. There was also a MOSFET.

Problems to be Solved by the Invention In a manufacturing process of a semiconductor integrated circuit, a silicon substrate is subjected to plasma processing such as dry etching, plasma CVD, resist stripping, and RF sputtering. By such plasma treatment, the gate oxide film of the MOSFET and the gate oxide film-
It is known that there is so-called plasma damage that deteriorates the silicon interface. However, since the silicon substrate can be subjected to high-temperature processing before the aluminum wiring is formed, the above-described effects of plasma damage are greatly affected. It can be reduced. However, after the aluminum wiring is formed, the allowable heat treatment temperature is about 450 ° C. at the highest, so that it is not possible to recover the characteristic variation of the element due to plasma damage.

Fig. 3 shows changes in the characteristics of the two MOSFET types A and B before and after plasma treatment. Fig. 3 (a) is before plasma treatment and Fig. 3 (b) is after plasma treatment (drain current). ) ^1/2 shows the gate voltage characteristics. The characteristics of the type B MOSFET in which the gate electrode is connected to the diffusion layer do not change during plasma processing, but the characteristics of the type A MOSFET in which the gate electrode is floating with respect to the silicon substrate during plasma processing are The threshold voltage (the gate voltage at the point intersecting the horizontal axis by extending the linear portion of the characteristic shown in FIG. 3) is decreasing.

FIG. 3 shows an example in which the threshold voltage of the type A MOSFET is lowered by the plasma treatment, but the characteristic variation of the element by the plasma treatment differs depending on the structure of the plasma treatment apparatus, the treatment conditions, etc. , The threshold voltage fluctuates. Further, the MOSFET whose characteristics are changed as shown in FIG. 3 (b) is not completely recovered by the heat treatment at about 450.degree.

In the case of a MOS LSI formed with a single layer of aluminum wiring, all the gate electrodes of the MOSFETs that make up the circuit are connected to the source / drain diffusion layer or the pn junction diffusion layer when the aluminum wiring is formed. After the aluminum film for aluminum wiring is formed on the silicon substrate)
SFET type B whose characteristics do not change due to plasma treatment
It has a structure of. Therefore, in the case of a single-layer wiring MOSLSI, it is not adversely affected by the plasma treatment after the aluminum wiring is formed.

However, as shown in FIG. 2, in the case of the conventional two-layer aluminum wiring LSI, when the first-layer aluminum wiring 8 is formed like the transistor Q _C , the gate electrode 4 is
Some transistors are not connected to the drain diffusion layer 5. The gate electrode 4 of such a transistor is in a floating state with respect to the silicon substrate 1 until the second aluminum wiring 10 is formed, that is, has a type A structure shown in FIG. Thus transistors such as Q _C of FIG. 2, the plasma treatment between the first aluminum wiring formed to the second aluminum wiring formation, for example, aluminum dry etching, resist ashing, RF sputtering, plasma CVD or the like, characterized by a change However, there is a risk that the manufacturing yield of the LSI will be reduced.

Means for Solving the Problems The present invention has been made in order to solve such a drawback, and has all the MOS type field effect transistors having a plurality of layers of metal wiring films and constituting a circuit. A semiconductor integrated circuit device having a structure in which a gate electrode is in electrical contact with an impurity diffusion layer formed on a semiconductor substrate via a conductive film forming the gate electrode or a first-layer metal wiring film. .

Effect According to the present invention, at least the gate electrodes of all the MOSFETs forming the circuit are connected to the diffusion layer on the semiconductor substrate at the time of forming the first-layer metal film. The characteristics do not change.

Embodiment An embodiment of the semiconductor integrated circuit device of the present invention is shown in FIG. 1 in the case of being applied to an N-channel MOS LSI having a two-layer aluminum wiring. As shown in the cross-sectional view of the main part of the LSI of FIG. 1, the MOS LSI of this embodiment has a p-type silicon substrate 1
Formed thereon, the MOSFET Q _1, Q _2, Q _3, Q ₄ consisting of field oxide film 2 is formed on the isolated active region gate oxide film 3, the gate electrode 4 and the source and drain diffusion layers 5 which,
It is composed of an n ⁺ type diffusion layer 6, a first aluminum wiring 8 and a second aluminum wiring 10, which are not necessary for circuit operation. In addition, between the gate electrode 4 and the first aluminum wiring 8 and between the first aluminum wiring 8 and the second aluminum wiring 10
The first interlayer insulating film 7 and the second interlayer insulating film 9
Insulation is maintained.

Furthermore, in the LSI of this embodiment, all the MOSs that make up the circuit are
The gate electrode 4 of the FET is connected to the source / drain diffusion layer 5 of another MOSFET by the first aluminum wiring 8 (Q _{2 in} FIG. 1) or to the n ⁺ type diffusion layer 6 which is not necessary for the circuit operation. (Q _{3 in} Figure 1).

In the embodiment of FIG. 1, the n ⁺ diffusion layer 6 is arranged next to the MOSFET Q ₃ so that the chip area of the LSI is increased. However, in reality, the n ⁺ diffusion layer 6 and the MOSFET Q ₃ are separated from each other. Also,
Since it suffices that the first aluminum wiring 8 is connected to the n ⁺ diffusion layer 6 in the region where the gate electrode 4 of the MOSFET Q ₃ is open, even if the n ⁺ diffusion layer 6 is added, the chip area of the LSI is almost increased. do not do.

EFFECTS OF THE INVENTION According to the present invention, since the gate electrodes of all MOSFETs forming an LSI are connected to the source / drain diffusion layer or the impurity diffusion layer formed on the semiconductor substrate by the first-layer aluminum wiring, Since the characteristics of the MOSFET do not change in various plasma processing steps applied to the silicon substrate after the formation of the first-layer aluminum wiring, it is effective in improving the yield of the LSI having the multilayer wiring.

[Brief description of drawings]

FIG. 1 shows an MO consisting of two-layer aluminum wiring according to the present invention.
FIG. 2 is a cross-sectional view of a main part of an SLSI, FIG. 2 is a cross-sectional view of a main part of a conventional MOSLSI including a two-layer aluminum wiring, and FIG. . 1 ... p-type silicon substrate, 2 ... field oxide film, 3
...... Gate oxide film, 4 ... Gate electrode, 5 ... Source
Drain diffusion layer, 6 ... N ⁺ type diffusion layer, 7 ... First interlayer insulating film, 8 ... First aluminum wiring, 9 ... Second interlayer insulating film, 10 ... Second aluminum wiring.

Claims (1)

[Claims] 1. A gate electrode of all insulated gate field effect transistors having a multi-layered metal wiring film and forming a circuit is a conductive film forming the gate electrode or a first-layer metal wiring film. A semiconductor integrated circuit device, which is in electrical contact with an impurity diffusion layer formed on a semiconductor substrate via the semiconductor substrate.