JPH0719969B2 - Method for manufacturing multilayer circuit board - Google Patents

Description

Detailed Description of the Invention 【Technical field】

The present invention relates to a method for manufacturing a multi-layer circuit board which has a semiconductor mounting recess in which a semiconductor mounting circuit pattern is formed and is suitably adopted as a package substrate for a chip carrier, a pin grid array, or the like.

[Background technology]

Conventionally, this kind of multilayer circuit board, for example, after forming a circuit pattern on a plastic substrate or a metal substrate,
It is manufactured by deforming a substrate by heating and pressing to form a semiconductor mounting recess. With this method, the circuit pattern can be formed in the semiconductor mounting recess, but the recess is simply formed and it is impossible to improve the wiring density by separating the surface circuit from the circuit in the recess. It was Therefore, as shown in FIG. 3 (Japanese Utility Model Laid-Open No. 61-75596), the circuit board 5 having the through portions 4 is laminated and integrated on the matrix circuit board 2 (FIG. 3 (a)). A semiconductor mounting recess 10 provided with a semiconductor mounting circuit pattern 1 on the bottom is formed by a penetrating portion 4 (FIG. 3B), and then a through hole 6 is formed penetrating the matrix circuit board 2 and the circuit board 5. At the same time, the through hole plating 12 is applied (FIG. 3 (c)), the resist is applied to the through hole 6 and etching is performed to electrically connect the circuit patterns 1 and 8 of the matrix circuit board 2 and the circuit board 5 to the through hole 6. A multilayer circuit board A'connected to the above is manufactured (FIG. 3 (d)). However, in this one, a double-sided printed wiring board having circuits formed on both sides is used as the circuit boards 2 and 5, and the alignment of the circuit patterns 1 and 8 when the matrix circuit board 2 and the circuit board 5 are laminated and integrated. It was difficult and the yield of through hole processing was poor. Further, in this conventional example, a metal layer 14 of a dissimilar metal is provided on the surface of the circuit patterns 1 and 8, and the outermost layer circuit pattern 7 is composed of the circuit pattern 8 and the metal layer 14 as shown in FIG. 3 (d). It consisted of three layers of through-hole plating 12, and the conductor thickness became large, making high-density wiring difficult.

[Object of the Invention]

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a package substrate for a chip carrier, a pin grid array, or the like having a semiconductor mounting recess in which a semiconductor mounting circuit pattern is formed. In the method for manufacturing a multilayer circuit board that is preferably used as, the accuracy of alignment of the interlayer circuit pattern is increased.

DISCLOSURE OF THE INVENTION

According to the method for manufacturing a multilayer circuit board of the present invention, the semiconductor mounting circuit pattern 1 is formed on one surface of the matrix circuit board 2 for mounting the semiconductor, and the metal foil 9 is provided on the other surface of the matrix circuit board 2, and the penetrating portion of the circuit board 5 is formed. 4 is provided with an inter-circuit unevenness absorption layer 13 on the semiconductor mounting circuit pattern 1 except for a portion corresponding to 4, and an etching resist is applied to the exposed circuit pattern portion 1a of the semiconductor mounting circuit pattern 1 which is not covered with the inter-circuit unevenness absorption layer 13. Circuit board 5 on which layer 3 is formed and through-holes 4 are provided
The inner layer circuit pattern 8 is formed on one surface of the one side and the metal foil 9 is provided on the other side of the other side, and then the penetrating portion 4 formed on the circuit board 5 is formed on the semiconductor mounting circuit pattern forming surface 2a of the matrix circuit board 2. The circuit board 5 is laminated and integrated so that the metal foil 9 becomes the outermost surface with the adhesive sheet 11 having the through holes 11a of the same diameter interposed, and then the matrix circuit board 2 and the circuit board 5 are penetrated to form the through holes 6 In addition, the through hole 6 is formed on the inner circumference of the through hole 6 and the outer surface of the matrix circuit board 2 or the circuit board 5, and then the through hole plating 12 and the metal foil 9 are etched to form the outermost layer circuit pattern 7. The above-described object is achieved by this configuration. Hereinafter, the present invention will be described with reference to the accompanying drawings. The matrix circuit board 2 for semiconductor mounting is made of alumina,
Photo-etching method using conductive resin or screen printing of conductive paste on inorganic or organic substrates such as ceramics such as silicon carbide, glass epoxy resin substrates, glass polyimide resin substrates, paper epoxy resin substrates, glass triazine resin substrates. The semiconductor mounting circuit pattern 1 is formed by a normal method such as. In the embodiment, a recess 15 is provided on one surface of the matrix circuit board 2 and the semiconductor mounting circuit pattern 1 is also formed in the recess 15. The semiconductor mounting circuit pattern 1 in the recess 15 can be formed by any conventionally known method such as application of a conductive paste or electroless plating. The semiconductor mounting circuit pattern 1 is formed only on one side of the matrix circuit board 2, and the circuit pattern is not formed on the other side of the matrix circuit board 2 and the outermost layer circuit pattern 7 is formed in a later step. The metal foil 9 remains as it is. The matrix circuit board 2 may be formed of a plurality of printed wiring boards. An inter-circuit irregularity absorption layer 13 is provided on the semiconductor mounting circuit pattern forming surface 2a of the matrix circuit board 2.
A plating resist is used for the inter-circuit unevenness absorption layer 13. The surface of this plating resist is preferably roughened by a physical means such as sandblasting or a chemical treatment. The inter-circuit unevenness absorption layer 13 is provided partially except for a portion corresponding to a through portion 4 of the circuit board 5 described later, that is, in a portion where the circuit board 5 is laminated. An etching resist layer 3 is formed on the exposed circuit pattern portion 1a which is not covered with the inter-circuit unevenness absorption layer 13. This etching resist layer 3
Is formed of a metal such as gold, nickel, solder or a resin that can be electrodeposited (see FIG. 1 (a)). Circuit board 5 laminated and integrated on the matrix circuit board 2
Is a printed wiring board, the inner layer circuit pattern 8 is formed on one side, and the other side is a metal foil 9 such as a copper foil.
The circuit-unformed surface 5a is left as it is, and the through-hole 4 for forming the semiconductor mounting recess 10 is punched as described later (see FIG. 1 (a)). An adhesive sheet 11 having a through hole 11a having the same diameter as that of the through portion 4 is interposed on the semiconductor mounting circuit pattern forming surface 2a of the matrix circuit board 2 to form the circuit board 5 on which the circuit pattern unformed surface 5a is the outermost surface. Thus, for example, they are laminated and integrated under normal molding conditions. When the matrix circuit board 2 and the circuit board 5 are laminated and integrated as described above, the circuit board 5 is laminated on the portion of the matrix circuit board 2 where the inter-circuit unevenness absorption layer 13 is provided, and the etching resist layer 3 is provided. The pattern portion 1a is located inside the penetrating portion 4 (see FIG. 1 (b)). Next, after the through hole 6 is drilled according to the inner layer circuit pattern 8, through hole plating 12 is applied to the inner periphery of the through hole 6 and the outer surface of the matrix substrate 2 or the circuit substrate 5 (see FIG. 1 (c)). Thereafter, as shown by an imaginary line in FIG. 1 (c), a resist layer 16 is provided on the through hole 6, and the through hole plating 12 not covered with the resist layer 16 and the metal layer 9 of the matrix substrate 2 or the circuit substrate 5 are etched. The outermost layer circuit pattern 7 is formed by processing. Here, since the etching resist layer 3 is formed on the exposed circuit pattern portion 1a of the semiconductor mounting circuit pattern 1, the exposed circuit pattern portion 1a is protected by the etching resist layer 3 and etched. Can be prevented. Then, if necessary, the etching resist 13 is removed to manufacture the multilayer circuit board A having the semiconductor mounting recess 10 formed by the penetrating portion 4 (see FIG. 1D). Incidentally, as shown in FIG. 2, a plurality of circuit boards 8 may be adopted. In this case, the inter-circuit irregularity absorption layer 13 is also provided on the upper surface of the inner circuit board 8. In the semiconductor mounting recess 10 of the multilayer circuit board A, a chip carrier on which a semiconductor is mounted by wire bonding or die bonding, and a pin grid array are practically used.

【The invention's effect】

According to the present invention, a semiconductor mounting circuit pattern is formed on one side of a matrix circuit board for semiconductor mounting, and a metal foil is provided on the other side of the matrix circuit board for semiconductor mounting, except for a portion corresponding to a penetrating portion of the circuit board. One of the circuit boards provided with an inter-circuit unevenness absorption layer on the mounting circuit pattern and an etching resist layer formed on the exposed circuit pattern portion of the semiconductor mounting circuit pattern not covered by the inter-circuit unevenness absorption layer to provide a through portion The inner layer circuit pattern is formed on one surface and the metal foil is provided on the other surface, and then the surface of the matrix circuit board on which the semiconductor mounting circuit pattern is formed has a through hole having the same diameter as the through hole provided on the circuit board. The circuit board is laminated and integrated so that the metal foil is the outermost surface with the sheet interposed, and then the matrix circuit board and the circuit board are pierced and the The inner periphery of the through hole and the outer surface of the matrix circuit board or the circuit board are plated with the through hole, and then the through hole plating and the metal foil are etched to form the outermost layer circuit pattern. The outermost layer circuit pattern can be formed in accordance with this through hole and the positioning accuracy can be improved, and the semiconductor mounting concave portion having the semiconductor mounting circuit pattern thus formed is provided. A highly reliable multilayer circuit board can be manufactured at low cost. In addition, the outermost layer circuit pattern consists of two layers of metal foil and through-hole plating, so it can be made thin and facilitates high-density wiring. Of course, mounting the semiconductor in the semiconductor mounting recess of this multilayer circuit board With this, the semiconductor and the circuit pattern can be electrically connected to each other in the semiconductor mounting recess, so that the thickness of the product can be significantly reduced.

[Brief description of drawings]

1 (a), (b), (c), and (d) are explanatory views showing each step of one embodiment of the present invention, and FIG. 2 is an explanatory view showing one step in another embodiment of the present invention. Figure 3 (a) (b) (c)
(D) is explanatory drawing which shows each process of a prior art example, 1 is a semiconductor mounting circuit pattern, 2 is a matrix circuit board,
3 is an etching resist layer, 4 is a penetrating portion, 5 is a circuit board, 6 is a through hole, 7 is an outermost layer circuit pattern, 8 is an inner layer circuit, 9 is a metal foil, 11 is an adhesive sheet, and 13 is an unevenness absorbing layer between circuits. is there.

─────────────────────────────────────────────────── ───Continued from the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H05K 3/46 L 6921-4E

Claims (3)

[Claims] 1. A semiconductor mounting matrix circuit board having a semiconductor mounting circuit pattern formed on one surface thereof and a metal foil provided on the other surface thereof for semiconductor mounting except a portion corresponding to a penetrating portion of the circuit board. One side of the circuit board where the circuit pattern is provided with the unevenness absorption layer between circuits and the etching resist layer is formed on the exposed circuit pattern part of the circuit pattern for semiconductor mounting that is not covered by the unevenness absorption layer between circuits Forming an inner layer circuit pattern on the other side and providing a metal foil on the other side, and then, on the surface of the matrix circuit board on which the semiconductor mounting circuit pattern is formed, an adhesive sheet having a through hole having the same diameter as the through portion provided on the circuit board. The circuit board is laminated and integrated so that the metal foil is the outermost surface, and then the matrix circuit board and the circuit board are penetrated to form through holes. In addition, the inner circumference of the through hole and the through hole plating are applied to the matrix circuit board and the outer surface of the circuit board, and then the through hole plating and the metal foil are etched to form the outermost layer circuit pattern. . 2. The method for manufacturing a multilayer circuit board according to claim 1, wherein the unevenness absorbing layer between circuits is a plating resist. 3. The method for manufacturing a multilayer circuit board according to claim 2, wherein the plating resist is roughened.