JPH0720711B2 - Light emitting element drive - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting element driving device, and more specifically, to an LED.
The present invention relates to a light emitting element drive device capable of compensating for variations in light emission luminance by correcting the light emission amount of an LED array used in a printer.

[Prior Art] Recently, an optical printer has been attracting attention as a printer that realizes small size, light weight, and high speed.
A plurality of light emitting element arrays in which monolithic light emitting elements such as LEDs are integrated on one chip are linearly arranged in the width direction of a recording sheet and used as a light source of an optical printer.

The light source of an optical printer is required to have a substantially uniform amount of light emission from all light emitting elements because it directly affects print density, dot diameter, etc. In addition, non-uniformity in the manufacturing process causes variations in performance among devices. Therefore, various methods of compensating for this have been proposed.

[Problems to be solved] As a method of compensating for the variation in luminance between the elements of the LED array,
Resistors with different resistance values are connected in series to each element to drive at a constant voltage, or the energization time is controlled by software or ROM for each element so that the exposure amount on the photoconductor is uniform. Things are being considered.

Since these perform brightness adjustment for each dot, there are drawbacks in the former case, such as difficulty in selecting a resistance value corresponding to one dot and complicated manufacturing process. Therefore, the latter energization time control is generally adopted, but in the latter case, there is a drawback that the control speed becomes slow in the case of using software, and in the case of using a ROM or the like, one dot corresponds to the ROM. Since the correction data is stored in advance and the number of pieces of information is output to the latch stage to control the energization time, it takes time to read the energization time data from the ROM and transfer it. In addition, many name capacity
A ROM is required, and its timing control and peripheral circuits such as a comparison circuit are also required, which complicates the circuit configuration.

The present invention solves the above-mentioned problems of the prior art, and it is possible to quickly correct variations in the brightness of light emitting elements such as LED arrays used in LED printers and the like in accordance with the driving of LEDs. It is an object of the present invention to provide such a light emitting element driving device.

[Means for Solving the Problems] The configuration of the light emitting element driving device of the present invention for achieving the above object is to provide an output circuit for supplying electric power to the light emitting element and a pulse signal generation for sequentially generating pulse signals. Circuit,
Light emission including a shift register and a gate circuit that gates a pulse signal by the output signal of the shift register, and a pulse signal selection circuit that supplies the pulse signal to the output circuit as a drive signal in response to the generation timing of the pulse signal An element driving circuit is provided corresponding to a plurality of light emitting elements, a pulse signal is selectively gated according to data stored in a shift register, and a plurality of light emission is performed according to the total pulse width of the selected pulse signals. The amount of light emitted between the elements is adjusted.

[Operation] A pulse signal selection circuit having a shift register is provided in front of the output circuit that supplies power to the light emitting element in this way, and the pulse signal from the pulse signal generation circuit is selected by the shift data output of the shift register and selected. Since the drive signal of the output circuit is generated by the combination of the pulse widths of the pulse signals, and the drive time of the light emitting element is set, the energization time of the light emitting element can be easily changed by combining the pulse widths according to the data of the shift register. I can decide.

As a result, different energization times can be selected according to the combination of the data stored in the shift register, and if this energization time is selectively set among a plurality of light emitting elements according to the variation in the light emitting performance of the elements, it is possible to select between these light emitting elements. The amount of light emission can be adjusted. Therefore, it is possible to easily adjust the light emission amount among the light emitting elements to be uniform, and it is sufficient to select the pulse signal, so that the correction can be performed according to the LED drive timing.

[Embodiment] An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of a light emitting element driving device to which the present invention is applied, FIG. 2 is a block diagram of another embodiment, and FIG. 3 is a timing for explaining its operation. It is a chart.

In FIG. 1, the LED light emitting unit 1 includes LED arrays 1a, 1b, ...
1n, each LED 10 is driven by the drive power signal from the current amplification circuits 2a, 2b, ..., 2n of the output circuit unit 2, and each LED 10 emits light.

The current amplifier circuits 2a, 2b, ..., 2n of the output circuit unit 2 are provided with LED drive circuits 20 provided corresponding to the respective LEDs 10 of the LED arrays 1a, 1b ,. The LED drive circuit 20 drives the corresponding LED 10.

The pulse signal selection circuit unit 4 includes pulse signal selection circuits 4a, 4b,
... 4n and receives a plurality of strobe signals having different pulse widths from the pulse signal generation circuit 5. The pulse signal selection circuits 4a, 4b, ... 4n each include a strobe signal selection circuit provided corresponding to each LED drive circuit 20, and the straw portion signal selection circuit is a shift register.
It is composed of 41 and a gate circuit 42. Then, the gate circuit 42 serially receives a plurality of strobe signals having different pulse widths from the pulse signal generation circuit 5, and the strobe signal and the data of each stage for selecting the strobe signal stored in the shift register 41, Then, a drive signal is sent to each LED drive circuit 20 under a logical product condition with a latch data output signal of a data latch circuit described later. Here, the shift register 41 is a memory that stores a plurality of bits of data, and the data is stored in the shift register 41 of each strobe signal selection circuit of the pulse signal selection circuits 4a, 4b, ... 4n from the ROM 6, respectively. Sent out,
The pulse signal is set, shifted from the pulse signal generation circuit 5 according to the shift signal S generated corresponding to each strobe signal, and output.

Reference numeral 7 denotes a data latch circuit section, which is a data latch circuit.
The pixel data obtained from the shift registers 8a, 8b, ... 8n of the shift register circuit unit 8 are latched and stored corresponding to the LEDs 10 corresponding to 1 bit.

Data latch output of each data latch circuit 7a, 7b, ... 7n
The output signals of Q ₁ , Q ₁ , ..., Q _n are sent to the gate circuit 42 of each strobe signal selection circuit as outputs corresponding to the latch data.

Here, the pulse generation circuit 5 has a pulse width (W ₁ > WS ₂ > W ₃
＞ ・ ・ ・ ＞ W _n ), the number of strobe signals 51 becomes smaller.
a, 51b, 51c, ... 51n are serially generated in sequence, and some of these strobe signals are selected to generate a drive signal according to the pulse width of the total sum, and LE
The energization of D10 is controlled, and the variation in the brightness is corrected.

The first strobe signal 51a of these strobe signals may be selected as the pulse width as the basic strobe pulse. This is a reference pulse that waits for a period whose pulse width is set to correspond to the minimum light emission time for an LED having almost the maximum brightness in the brightness variation of the LEDs 10, and is applied uniformly to all the LEDs 10. In this case, the strobe signals 51b, 51c, ..., 51n, which are pulse signals after the strobe signal 51a, become correction strobe pulses, and the pulse widths of these strobe signals are successively narrower. The sum of the pulse width of 51a and the pulse width of the pulse signal selected from these corrected strobe signals 51b, 51c, ... 51n is the total light emission time of the LED 10.

Further, the total period obtained as the sum of all the pulse widths of the pulse signal generation circuit 5 is a period set to the maximum light emission time corresponding to the LED having almost the minimum luminance in the variation in the luminance of the LED 10.

In such a circuit, when data is stored in the shift register 41, it is assumed that, for example, in positive logic operation, the number of one continuous pulse generated by the pulse signal generating circuit 5 is five, and the shift register 41 has five pulses. It is assumed that each stage is composed of flip-flops, and that bit “11101” is stored in each stage of the shift register 41.

Under such a condition, when the pixel data of the latch circuit is "1", the respective strobes of the pulse signal generating circuit 5 corresponding to the shift signal S from the pulse signal generating circuit 5 applied to the shift register 41. Of the signals, the first to third strobe signals and the fifth strobe signal are picked up, and the fourth strobe signal falls.

That is, up to these three strobe signals 51a, 51b, 51
The logical product of c and the last strobe signal is taken corresponding to each digit of the data “11101” stored in the shift register 41, and the logical product is taken between it and the latch output signal of the data latch circuit. Therefore, the strobe signal of the pulse signal generating circuit 5 generated corresponding to the digit set to "1" in the data of the shift register 41 according to the shift signal S is selectively picked up and corresponds to the strobe signal. It is possible to generate the drive signals for the total time of the pulse width as the total of the drive signals individually generated. Then, by this, the energization time of the LED 10 can be controlled.

The shift signal S added at this time may be generated separately, and in such a case, it is synchronized with the pulse signal generation timing of the pulse signal generation circuit 5. Also,
The shift register 41 can circulate and restore the data by using a ring-shaped register in which the input side and the output side are connected. Further, the data to be set in the shift register 41 is input from the ROM 6 in the so-called LED head including the light emitting element drive circuit and the LED light emitting section at the time of initial driving. FIG. 2 shows such an embodiment.

In FIG. 2, 11 is a pulse signal selection circuit,
12 is an LED drive circuit 12a, 12a,
An output circuit unit having .. corresponding to the LED 10 and corresponding to the output circuit 2 in FIG. Further, reference numeral 13 is a latch circuit corresponding to the data latch circuit section 7, and the latch circuits 13a, 13a, ... Are gate circuits of the pulse signal selection circuit.
It has corresponding to 14,14, ...

The gate circuit 14 is a three-input gate circuit and corresponds to the gate circuit 41 in FIG. 1, and the shift register 15 corresponds to the shift register 42. Each shift register 15 is an _n- stage shift register composed of flip-flops (FF) 15a, ..., 15n _-1 , 15n, and the output side and the input side thereof are connected to each other to form a register on a ring. Has become. Moreover, each shift register 15 includes flip-flops 15a, 15a, ...
_{5 n-1, 15 n-} 1, and..., Flip-flop 15n, 15n ··
-And and are connected in the horizontal direction via buffers, respectively, and form a shift register in the horizontal direction.

.. and the shift registers 15, 15, .. Further, 16 is a circuit corresponding to the shift register unit 8 in FIG. 1, and is a register 16a, 16a, ... Of each stage for storing each pixel data provided corresponding to the LED 10.
·have.

The diode circuit 12 inserted into the output of the LED drive circuits 12a, 12a, ... By the FET transistor of the output circuit section 12
.. are inserted as input protection circuits.
Also, the logic circuits 12b, 12b, 12b,
... controls LE voltage by controlling the gate voltage of each LED drive circuit 12a
This is a logic circuit for setting the D drive current value uniformly and adjusting the brightness of the entire LED. This means that if the output of the gate circuit 14 is "1" (or HIGH level, hereinafter simply "H"), the voltage of the CTL signal is applied to the gate terminal of the FET transistor that constitutes the LED drive circuit 12a, and it is "ON". In this state, the current set by the voltage of the CTL signal is supplied to the LED 10. On the other hand, if the output of the gate circuit 14 is "0" (or LOW level, hereinafter simply "L"), the voltage of the CTL signal is cut off and the FET transistor of the LED drive circuit 12a is turned "OFF".

By the way, the strobe signal selection data of the shift register 15 is set as a complementary signal of the clock pulse signal OC17 (see the lower side of the drawing) from the oscillation circuit (not shown) as a complementary signal of the output through the inverter and the output through the inverter. 15a _-1 , ..., 15n _-1 and 15n are added as clock signals and shift signals.

The ST is a gate circuit 14,1 as shown in ST of FIG.
.., which are supplied from the pulse signal generating circuit 5 and correspond to the strobe signals 51a, 51b, 51c ,. LA is
It is a latch signal, and each register 16a of the shift register 16
Is a timing signal for receiving and latching the data corresponding to the pixel from, and is input to each latch circuit 15 via the buffer 18a. DI is a pixel data signal and is sequentially input to each register 16a of the shift register 16 via the buffer 18b. CK is the shift register 16
Shift clock signal for the inverter 18c
Is input to the register 16a via.

CD _{1 I to} CD _n-1 and CD _n are buffers 18d, 18d, ... In the flip-flops of each stage of the first shift register on the left side of the drawing.
This is a signal for inputting data for selecting a strobe signal via, and is a signal transmitted from the ROM 6. CCK
Is a clock signal for this, and the inverter 30,
It is supplied to each flip-flop via the buffer 31.
Further, the flip-flops _{15a, ··· 15 n-1,} 15n are, ST
The signal is wired-ORed with the buffer 31 via the buffer 32, and this is supplied as a shift signal to each flip-flop. Therefore, the shift register of the shift register 15 is generated in synchronization with the ST signal strobe signal generation timing.

Next, the overall operation will be described with reference to FIG.

As shown in (a) of Fig. 3, the OC signal becomes "L" and CC
When the K signal is added, the data is input to the shift register 15, and the CDI signals (CD _{1 I to} CD _n-1 , CD _{n) are} supplied to each stage.
Is represented by CDI) from the ROM 6 and is input to the flip-flops 15a, ... 15 _n-1 , 15n of each stage, which are sequentially transmitted from the left side to the right side of the drawing in the CCK signal. in accordance with each clock signal, the flip-flop 15a of the corresponding stages, ··· 15 _n-1, 15n to go are shifted respectively,
Data is sequentially written in the flip-flops of the respective stages corresponding to the horizontal direction.

In this way, the specified data will be
It is stored in each stage of each shift register 15, 15 ,. When the storage of this data is completed, the clock pulse signal CK is generated, and the input of the pixel data DI is transferred from the left to the right in the drawing in accordance with the clock pulse signal CK by the register 16a at each stage of the shift register 16. I will shift and remember.

When the storage of pixel data in each register 16a is completed, next L
When the A signal is generated, the data in each register 16a is latched in each latch circuit 13a. As a result, the signal of the latched data is sent to each gate circuit 14.

When the OC signal is in the "H" state, the pulse signal generating circuit 5 outputs the ST signal ST in the above state.
When a signal is applied, the data of the flip-flops of each stage of the shift register 15 are shifted for each pulse of this ST signal and sent to each gate circuit 14. At this time
Since the ST signal is also added to each gate circuit 14, the pulse of the ST signal is output to each logic circuit 12b as a drive signal of each LED drive circuit 12a when the logical product condition is satisfied between them. As a result, each shift register 15
Each pulse of the ST signal is selected according to the data set in the flip-flops 15a, ..., 15n _-1 , 15n.

Here, as shown in FIG. 3, if the pulse width of each pulse of the ST signal is gradually narrowed, an arbitrary pulse is set in each stage of the shift register 15 from among the pulses having many pulse widths. The total time of the drive signal can be set by selecting the data.

In this embodiment, since the flip-flop 15a and the flip-flop 15n are connected and have a ring shape, the stored data returns to the original state when the shift is performed n times. Once the data is set, it is not necessary to input it to the shift register 15 again.

In this way, various kinds of strobe signal selection data are set in the shift register, and by combining them, drive signals of various periods can be added to the respective LED drive circuits 12a.

By the way, V _DD of the output circuit unit 12 is a signal applied to the power supply terminal 3, and GND is a signal indicating the ground level. Further, the FET transistors 12d and 12e are inserted transistor circuits for voltage stabilization.

In this embodiment, by inputting the CTL signal to the output circuit, the average brightness of the LED can be adjusted by the CTL signal,
Furthermore, it is possible to adjust the brightness variation for dots.

As described above, in the embodiment, the shift register is used, but the number of stages can be freely set, and it is sufficient if the number is plural. Further, the pulse width generated from the pulse signal generation circuit is not limited to the signal whose width becomes narrower as described above. Preferably,
It suffices that the pulse widths differ between these, and it is also possible to use some of them having the same pulse width in combination.

Further, although the example of the LED is given in the embodiment, it is needless to say that it can be applied to other light emitting elements.

[Effects of the Invention] As can be understood from the above description, in the present invention, a pulse signal selection circuit having a shift register is provided in front of an output circuit that supplies power to a light emitting element, and a pulse signal generation circuit is provided. The pulse signal of is selected by the shift data output of the shift register, the drive signal of the output circuit is generated by the combination of the pulse widths of the selected pulse signals, and the drive time of the light emitting element is set. The energization time can be easily determined by the combination of pulse widths based on the data in the shift register.

As a result, different energization times can be selected according to the combination of the data stored in the shift register, and if this energization time is selectively set among a plurality of light emitting elements according to the variation in the light emitting performance of the elements, it is possible to select between these light emitting elements. The amount of light emission can be adjusted. Therefore, it is possible to easily adjust the light emission amount among the light emitting elements to be uniform, and it is sufficient to select the pulse signal, so that the correction can be performed according to the LED drive timing.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of a light emitting element driving device to which the present invention is applied, FIG. 2 is a block diagram of another embodiment, and FIG. 3 is a timing for explaining its operation. It is a chart. 1 ... LED light emitting part, 1a, 1b, 1c, 1n ... LED array, 2,12 ... Output circuit part, 2a, 2b, 2c, 2n ... Current amplification circuit, 4 ... Pulse signal selection circuit part, 4a, 4b, 4c , 4n ... Pulse signal selection circuit, 5 ...
Pulse signal generation circuit, 6 ... ROM, 7 ... Data latch circuit section, 7a, 7b, 7c, 7n ... Data latch circuit, 8 ... Shift register circuit section, 8a, 8b, 8c, 8n, 41, 15 ... Shift register, 13,
15,17 ... Flip flop, 12a, 20 ... LED drive circuit, 14,42
… Gate circuit, ST… Strobe signal.

Claims (4)

[Claims] 1. An output circuit for supplying electric power to a light emitting element, a pulse signal generation circuit for sequentially generating pulse signals, a shift register, and a gate circuit for gated the pulse signal by an output signal of the shift register. A light emitting element drive circuit including a pulse signal selection circuit that supplies the pulse signal as a drive signal to the output circuit in correspondence with the generation timing of the pulse signal is provided corresponding to a plurality of light emitting elements and stored in the shift register. The light emitting element driving device, wherein the pulse signal is selectively gated according to the selected data, and the light emission amount between the plurality of light emitting elements is adjusted by the total pulse width of the selected pulse signal. . 2. The shift register is a ring-type register having an input side and an output side connected to each other, and the pulse signal generating circuit sequentially generates pulse signals having different pulse widths. The light-emitting element drive device according to the item. 3. The plurality of light emitting elements is an LED array used in an LED printer, and the pulses having different pulse widths are gradually narrowed in width. The light-emitting element drive device described. 4. A pulse signal selection circuit receives an output of a latch circuit for latching pixel data output from another shift register, and outputs a drive signal under a logical product condition of a signal of this input and an output signal of a gate circuit. The light emitting element driving device according to claim 1, wherein the light emitting element driving device outputs the light emitting element to an output circuit.