JPH0722265B2 - Signal carrying method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Use of the Invention) The present invention relates to information transmission by a phase pulse signal or a continuous frequency signal (for example, a ripple control signal) injected into an AC voltage wave for carrier of a low voltage distribution line or a dedicated line. The present invention relates to improvement of a signal carrying method for performing

(Background of the Invention) FIG. 10 shows a conventional phase pulse signal communication format. Repeater connected to the central device (terminal information collection device)
Injects the terminal selection signal 1 into the carrier AC voltage wave, and when the terminal detects the terminal selection signal 1, in response thereto, injects the return signal 2 into the carrier AC voltage wave. Because of noise
When the return signal 2 cannot be received by the repeater, the repeater retransmits the terminal selection signal 1, and the terminal also retransmits the return signal 2 accordingly. In the case of this method, since the signals to be communicated are independent of each other, the signals that cannot communicate are regarded as unnecessary signals and are not treated.

The applicant has already proposed a signal detection method in which signals are arithmetically averaged over a predetermined cycle in order to remove noise that causes communication failure. The communication format is
Shown in Figure 11. The repeater injects the terminal selection signal 3 including the repetition of the address signal (terminal) for a predetermined number of cycles, and the terminal repeatedly injects the return signal 4 including the data signal a predetermined number of times in response to the terminal selection signal 3. Return signal 4
Although the number of repetitions of is 3 in FIG. 11, it is actually several tens. This is because the return signal 4 is particularly susceptible to noise when the injection circuit of the terminal device has a small capacity capable of transmitting only one phase pulse in one cycle. The repeater removes noise by averaging the returned signals 4 and performs signal detection. In the case of this method, the worst transmission state is assumed and the number of repetitions is determined, so that there is a problem that the communication time becomes long.

(Object of the Invention) An object of the present invention is to solve the above-mentioned problems and to provide a signal carrying method capable of shortening the communication time in a noisy situation.

(Features of the Invention) In order to achieve this object, the present invention is directed to a carrier AC voltage wave in which a terminal information collecting device injects a terminal selection signal and a terminal injects a return signal in response to the terminal selection signal. In the signal carrying method described above, the terminal information collecting device transmits a synchronizing signal and an address signal as a terminal selection signal, and the terminal device returns a return synchronizing signal including repetition in response to the synchronizing signal and the address signal from the terminal information collecting device. Then, when the terminal information collecting device detects the return synchronization signal from the terminal device by averaging, it transmits the synchronization signal, and the terminal device returns the return signal in response to the synchronization signal from the terminal information collecting device and collects the terminal information. When the device cannot detect the return signal from the terminal device in response to the synchronization signal, the undetectable return signal is stored and the synchronization signal is transmitted again, and the terminal device transmits the synchronization signal from the terminal information collecting device. Each time the synchronization signal is detected, a return signal is returned in response to the synchronization signal, and the terminal information collecting device adds and averages the return signals from the terminals in response to the synchronization signal together with the stored undetectable return signal. When the return signal is detected, the transmission of the synchronization signal to the terminal is stopped, so that the start time of the averaging of the return signals is set to an appropriate value according to the detection of the return synchronization signal. It is characterized in that the arithmetic mean is calculated without excess or deficiency.

(Embodiment of the Invention) FIG. 1 is a diagram for explaining a signal carrying method of the present invention. The repeater corresponding to the terminal information collecting device first injects the synchronization signal 5 and the address signal 6 as the terminal selection signal. If noisy, these signals 5, 6 may not be detected by the terminal. If there is no response from the terminal, the repeater repeatedly injects the synchronization signal 5 and the address signal 6. When the terminal device detects the synchronization signal 5, the terminal device 6 detects the address signal 6 by averaging. When the address indicated by the address signal 6 matches the address of the terminal device, the return synchronization signal 7 is first injected. To do. When the repeater detects the return synchronization signal 7, only the synchronization signal 5 (or the synchronization signal 5 and the address signal 6) is injected thereafter. At the same time, it prepares for detection by the averaging of the return signal 8. The terminal injects the return signal 8 in response to the synchronization signal 5. The repeater receives the return signal 8, but if the return signal 8 can be detected at this point, the injection of the synchronization signal 5 is stopped, and the terminal device also in response receives the return signal 8. Stop. However, when the return signal 8 cannot be detected due to noise, the undetectable return signal 8 is stored and, at the same time, the synchronization signal 5 is reinjected. When the return signal 6 in response to this is received, the previous return signal 8 and the present return signal 8 stored are arithmetically averaged to detect the signal.
Since the random noise component is reduced by the averaging, signal detection becomes easy.

When the signal detection is not possible even by the addition and averaging twice, the communication of the synchronization signal 5 and the return signal 8 is repeated until the return signal 8 is detected.

In this way, when the S / N ratio is good, the return signal 8 is detected with a small amount of communication, and when the S / N ratio is poor, the return signal 8 is detected by increasing the number of communication times. Even on a noisy distribution line, signals can be detected with the minimum required communication time. If the signal from the repeater after synchronization is only the synchronization signal 5, the address signal 6
The communication time can be shortened by the amount not sent.

An embodiment of the present invention when a phase pulse signal is used as a signal will be described with reference to FIGS.

FIG. 2 is a diagram for explaining channels set in the AC voltage wave 9 for transportation. A channel CH ₁ having a predetermined phase angle width is provided in a low noise region 10 which is a predetermined phase angle range around the zero point (0 ° or 180 °) of the AC voltage wave 9 for carrier.
~ CH ₁₂ is set. Then, in the synchronous signal and the address signal sent from the repeater to the terminal unit, the channel CH ₁ pilot channel, the channel CH ₂ is a space channel, the channel CH ₃ to CH ₁₂ 2 ^0-2 in binary code
⁹ are assigned to the address channels. In the return synchronization signal and return signal sent from the terminal to the repeater, channel CH ₁ is the space channel, channel CH ₂ is the pilot channel, and channel CH ₃
.About.CH ₁₂ are assigned to the data channels representing the decimal codes 0 to 9, respectively.

FIG. 3 shows a configuration of a signal sent from the repeater to the terminal and a signal sent from the terminal to the repeater.

Until synchronized, the signal sent from the repeater to the terminal is
The synchronization signal Sa ₁ and the address signal Sa ₂ are used, and 10 cycles of the carrier AC voltage wave 9 are used. The first cycle,
The third and fifth cycles are space cycles,
No phase pulse signal is injected into channels CH _{1 to} CH ₁₂ . The second cycle and the fourth cycle are synchronous cycles, and as shown in FIG.
_By injecting the phase pulse signal 11 into all of _{3 to} CH ₁₂ , the synchronization signal Sa ₁ is formed. The 6th to 10th cycles are address cycles. The pilot channel CH ₁ and the address channel corresponding to the address code of the terminal (as shown in FIG. 4, for example, in the case of the terminal of address 5, address channels CH ₃ and CH ₅ ) Address signal formed by injecting phase pulse signal 11 into
Sa ₂ is repeatedly delivered in the 6th to 10th cycles.

The signal sent from the repeater to the terminal after synchronization is
It consists of only the synchronization signal Sa _{1 and} uses 4 cycles of the carrier AC voltage wave 9.

As the return synchronization signal Sb ₀ , 11 cycles of the carrier AC voltage wave 9 are used. The first cycle is a space cycle, and there is no phase pulse signal 11 on any of channels CH _{1 to} CH _12.
Is not injected. The 2nd to 11th cycles are synchronous cycles,
As shown in FIG. 5, the phase pulse signal 11 is injected only into the space channel CH ₁ .

As the return signal Sb, 11 cycles of the carrier AC voltage wave 9 are used as in the case of the return synchronization signal Sb ₀ . The first cycle and the third cycle are space cycles, and channel CH ₁
~ No phase pulse signal 11 is injected into CH ₁₂ . The second cycle and the fourth cycle are pilot cycles, and as shown in FIG. 5, the pilot pulse Sb ₁ is formed by injecting the phase pulse signal 11 into the pilot channel CH ₂ . The 5th to 7th cycles are address cycles, and are 10 ^2nd , 10 ^1st , 10
_The address signal Sb ₂ formed by injecting the phase pulse signal 11 into the data channels corresponding to the _0th position is transmitted. The 8th to 11th cycles are data cycles, which are 10 ^{3 of} 4 digit data stored in the terminal.
The address signal Sb ₃ formed by injecting the phase pulse signal 11 into the data channels respectively corresponding to the 10th, 10 ^2nd , 10 ^1st , and ^100th positions is transmitted.

FIG. 6 shows a transmitter / receiver in a repeater. The operation will be described with reference to the flowcharts of FIGS. 7 and 8.

In step 1, the control circuit 12 detects the cycle of the carrier AC voltage wave 9 input from the input / output terminal 13 connected to the distribution line and the channels CH _{1 to} CH ₁₂ , and the injection circuit 14 outputs the synchronization signal for 10 cycles. It controls to inject Sa ₁ and address signal Sa ₂ .

In step 2, the return synchronization signal Sb is sent for 11 cycles.
Receive ₀ . Return synchronous signal S from AC voltage wave 9 for carrier
b ₀ is separated by the filter 15, digitized by the A / D converter 16, and stored in the memory 17. Digitization is performed, for example, by converting the level of each phase unit, in which one channel is further subdivided, into a digital value.

In step 3, the calculator 18 is operated based on the command from the control circuit 12.
Subtracts the value of the same channel space cycle is a first cycle from the value of the channel CH ₁ to CH ₁₂ of each synchronization cycle from the second cycle to the 11th cycle. In step 4, the arithmetic mean is calculated during the 10 sync cycles minus the space cycle. As a result, standing noise and random noise are removed from the return synchronization signal Sb ₀ . In step 5, the stored previous synchronization cycle addition average value and the current synchronization cycle addition average value are compared, and if the current value is larger, the return synchronization signal Sb ₀
Is detected and the process proceeds to step 6, otherwise,
The return synchronization signal Sb ₀ is not detected and the process returns to step 1. When proceeding to step 6, the memory as the previous arithmetic average value during the synchronization cycle is retained as it is, and step 1
When returning to, the previous arithmetic average value during the synchronization cycle is updated to the arithmetic average value during the current synchronization cycle.

In step 6, as shown in FIG. 3, the synchronization signal Sa
₁ is injected using 4 cycles. In step 7, 1
The return signal Sb is received for one cycle. The return signal Sb is separated by the filter 15 and stored in the memory 17 via the A / D converter 16. In step 8, the control circuit 12 causes the arithmetic unit 18 to perform averaging. However, since the previous return signal Sb is not stored in the first reception, the averaging is not performed and the process proceeds to step 9.

The return signal detection routine of step 9 is shown in detail in FIG. Step 91 channel CH ₁ of the address cycle
Subtracting the value of the same channel of space cycle from the value of ~CH _12. As a result, standing noise is removed from the address signal Sb ₂ . Similarly, to subtract the value of the same channel space cycle from the value of the channel CH ₁ to CH ₁₂ data cycle in step 92. This gives the data signal
Standing noise is removed from Sb ₃ . In step 93, the address signal Sb ₂ and the data signal Sb ₃ from which the standing noise is removed are
Determines whether or not only one phase pulse signal 11 is loaded in one cycle. If there is only one phase pulse signal 11 in one cycle, the process proceeds to step 94, and if there are zero or two or more phase pulse signals 11 in one cycle, the signal cannot be detected and the process returns to step 6. Step subtracting the value of the same channel space cycles from 94 the value of the channel CH ₁ to CH ₁₂ pilot cycles. As a result, the standing noise is removed from the pilot signal Sb ₁ . In step 95, the waveform of the pilot signal Sb ₁ is subtracted from the waveform of the address signal Sb ₂ , and in step 96, the waveform of the pilot signal Sb ₁ is subtracted from the waveform of the data signal Sb ₃ . This subtraction may be peak level subtraction or area subtraction. If the waveform difference is equal to or less than the predetermined value, it is determined that a signal is detected and is output from the output terminal 19 to the signal processing circuit (not shown) in step 10. If the waveform difference is equal to or more than the predetermined value, it is determined that the signal cannot be detected and the process returns to step 6.

If the signal cannot be detected, the process returns to step 6 and the routine from step 6 is repeated again. In step 8, the return signal Sb of this time and the stored return signal Sb of the previous time are arithmetically averaged, thereby reducing random noise.
The routine from step 6 is repeated until the return signal Sb is detected. When the return signal Sb is detected, the synchronization signal
The injection of Sa ₁ is stopped and the stored contents of the memory 17 are cleared.

The transmitter / receiver of the terminal is the same as the transmitter / receiver of the repeater shown in FIG. However, the injection circuit injects only the one-phase pulse signal 11 in one cycle.

The operation of the transmitter / receiver of the terminal is shown in FIG. Step 11
Then, the difference between the synchronous cycle which is the second cycle of the signal from the repeater and the space cycle which is the first cycle or the third cycle is calculated, and in the synchronous cycle which is the fourth cycle and the third cycle or the fifth cycle. Calculate the difference from a certain space cycle. In step 12, channel CH
₃ calculates the addition average between to CH _12. This removes standing noise and random noise. In step 13, the stored previous inter-channel average value and the current inter-channel average value are compared, and if the current value is larger, it is determined that the synchronization signal Sa ₁ is detected, and the process proceeds to step 14. Otherwise, the sync signal Sa ₁ is not detected and the process returns to step 11. When the process proceeds to step 14, the memory as the previous inter-channel arithmetic average value is retained as it is, and when the process returns to step 11, the previous inter-channel arithmetic average value is updated to the inter-channel arithmetic average value this time.

In step 14, the arithmetic mean of the address cycles received and stored for 5 cycles is calculated. Then, in step 15, the difference between the average address cycle and the space cycle is calculated. In step 16, the address signal Sa ₂ is detected by level verification or waveform verification,
If detected, the process proceeds to step 17, and if not detected, the process returns to step 11. In step 17, it is determined whether or not the address indicated by the address signal Sa ₂ matches the address of the terminal device. If they match, the process proceeds to step 18, and if they do not match, the process returns to step 11.

In step 18, the return synchronization signal Sb ₀ is injected for 11 cycles. In step 19, the sync signal from the repeater
Receive Sa ₁ and calculate the difference between the sync cycle and the space cycle. In step 20, it calculates the addition average between channel CH ₃ to CH _12. In step 21, the stored previous inter-channel average value and the current inter-channel average value are compared, and if the current value is larger, it is determined that the synchronization signal Sa ₁ is detected, and the process proceeds to step 22. Otherwise, the sync signal Sa ₁ is not detected and the step 11
Return to. In step 22, the return signal Sb is injected. Then, it returns to step 19. As long as the synchronization signal Sa ₁ is repeatedly sent from the repeater, the loop of steps 19 to 22 is repeated and the return signal Sb is sent out.

(Modification) The return signal may consist of an address signal and a data signal or only a data signal. Further, the synchronization signal from the repeater and the return signal from the terminal device may be a signal to which a digit designation signal is added. In this case, the data signal of the return signal is only the data signal of the designated digit.

The return synchronization signal and the return signal are not limited to those that carry only one pulse in one cycle. When a large number of pulses are placed in one cycle, the return sync signal can have the same structure as the sync signal from the repeater.

The number of cycles of the signal from the repeater and the signal from the terminal is not limited to the one shown in the figure. For example, each cycle may be one cycle or when the number of channels in one cycle can be set to a large number. Alternatively, both signals may be placed in the same cycle.

Storage and calculation are not limited to digital values, but analog values may be performed.

(Effects of the Invention) As described above, according to the present invention, the terminal information collection device transmits the synchronization signal and the address signal as the terminal selection signal, and the terminal device receives the synchronization signal and the address signal from the terminal information collection device. In response, a return synchronization signal including repetitions is returned, the terminal information collecting device sends a synchronization signal when the return synchronization signal from the terminal device is detected by arithmetic averaging, and the terminal device responds to the synchronization signal from the terminal information collecting device. Then, the terminal information collecting device stores the undetectable return signal when the return signal from the terminal device in response to the synchronization signal cannot be detected, and transmits the synchronization signal again, and the terminal device returns to the terminal. Each time a synchronization signal from the information collecting device is detected, a return signal is returned in response to the synchronization signal, and the terminal information collecting device stores the return signal from the terminal device in response to the synchronization signal. When the return signal is detected, the averaging is performed along with the undetectable return signal, and when the return signal is detected, the transmission of the synchronization signal to the terminal device is stopped. Therefore, the communication time under a noisy situation can be shortened because the returned signals are added and averaged without excess or deficiency.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a signal carrying method of the present invention, FIG. 2 is a diagram showing channel setting in one embodiment of the present invention,
FIG. 3 is a diagram showing a configuration of a signal from a repeater and a signal from a terminal in one embodiment of the present invention, FIG. 4 is a view showing various signals from the repeater, and FIG. FIG. 6 is a diagram showing various signals, FIG. 6 is a block diagram showing a transmitter / receiver of a repeater,
7 and 8 are flowcharts showing the operation of the repeater, FIG. 9 is a flowchart showing the operation of the terminal, and FIG.
FIG. 11 and FIG. 11 are diagrams for explaining two examples of conventional signal carrying methods. 5 ... Sync signal, 6 ... Address signal, 7 ... Return sync signal, 8 ... Return signal, 9 ... Transport AC voltage wave, 10 ...
… Low noise area, 11 …… Phase pulse signal, 12 …… Control circuit, 13 …… Input / output terminal, 14 …… Injection circuit, 15 …… Filter, 16 …… A / D converter, 17 …… Memory, 18 …… Calculator, 1
9 …… Output terminal, CH _{1 to} CH ₁₂ …… Channel, Sa ₁ …… Synchronization signal, Sa ₂ …… Address signal, Sb …… Return signal, Sb ₀ …
… Return sync signal.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Masatoshi Takagi 5-2-8 Shakujii-machi, Nerima-ku, Tokyo (56) References JP-A-58-182338 (JP, A) JP-A-52-64805 (JP, A) JP-A-59-139831 (JP, A) Jpn.

Claims (1)

[Claims] 1. A signal carrier method in which a terminal information collecting device injects a terminal selection signal into a carrier AC voltage wave, and a terminal device injects a return signal in response to the terminal selection signal. The synchronization signal and the address signal are transmitted as selection signals, the terminal device returns a return synchronization signal including repetition in response to the synchronization signal and the address signal from the terminal information collection device, and the terminal information collection device returns from the terminal device. When the synchronization signal is detected by arithmetic averaging, the synchronization signal is transmitted, the terminal device returns a return signal in response to the synchronization signal from the terminal information collection device, and the terminal information collection device returns from the terminal device in response to the synchronization signal. If the signal cannot be detected, the undetectable return signal is stored and the synchronization signal is transmitted again, and the terminal responds to the synchronization signal each time it detects the synchronization signal from the terminal information collecting device. The return information signal is returned, and the terminal information collecting device detects the return signal from the terminal device in response to the synchronization signal by averaging together with the stored undetectable return signal, and when the return signal is detected, it is sent to the terminal device. A method of carrying a signal, characterized in that the transmission of the synchronization signal is stopped.