JPH0727691B2 - PCM signal recording / reproducing device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a PCM signal recording / reproducing apparatus, and more particularly to a recording / reproducing apparatus suitable for a rotary head type PCM recorder.

[Conventional technology]

As a PCM signal recording / reproducing apparatus, there is a rotary head type PCM signal recording / reproducing apparatus as described in JP-A-58-224415. The rotary head type PCM recorder has the features that the recording density can be increased and the cassette can be made smaller. However, since a rotary head is required, there is a problem in downsizing the entire device.

[Problems to be solved by the invention]

To reduce the size of the entire device, it is necessary to reduce the size of the rotary head. This miniaturization of the rotary head can be realized by increasing the tape winding angle. For example, when the diameter of the rotary head is halved, doubling the winding angle of the tape makes the track length the same, and the recording pattern on the tape can be made the same. However, in this case, since the recording / reproducing timing is different, it is necessary to use a dedicated recording / reproducing device.

An object of the present invention is to realize a PCM signal recording / reproducing device which can easily cope with miniaturization of a rotary head.

[Means for solving problems]

The above object is achieved by making the operation clock of the recording / reproducing area generation circuit for controlling the recording / reproducing timing inversely proportional to the winding angle of the tape and setting it at the head of each track.

[Action]

The recording area generation circuit changes the width of the area by changing the operation clock. Further, by setting the area at the head of each track, the area cycle becomes constant, and it is possible to cope with changes in the diameter and wrapping angle of the rotary head.

〔Example〕

 An embodiment of the present invention will be described below with reference to FIG.

FIG. 1 shows the configuration of a PCM signal recording / reproducing apparatus of the present invention. 1 is a magnetic tape, 2 is a rotary head, 3 is a tack signal detection head for detecting the position of a cylinder, 4 is a capstan, 5 is a switching circuit for recording control, 6 is a recording amplifier, 7 is a recording signal generation Modulation circuit, 8 a reproduction amplifier, 9 a switching circuit for switching the reproduction head, 10 a data strobe circuit for reproducing a digital signal from the head reproduction signal, 11 a PCM from the digital signal reproduced by the data strobe circuit 10.
A demodulation circuit for demodulating a signal, 12 is a modulation circuit 7 and a demodulation circuit 1
An area generation circuit for generating an area signal for controlling the operation of 1, a head switching signal generation circuit for generating a head switching signal for controlling the switching circuit 9 and the area generation circuit 12, and a reference numeral 14 for an output of the tack signal detection head 3. A tack detection circuit that generates a tack signal, 15 is a cylinder servo circuit, 16 is a capstan servo circuit, 17 and 24 are oscillators that generate operating clocks, 18 is a bus line, 19 is a memory circuit for storing PCM signals, 20 is an error correction circuit that performs error correction during reproduction and error correction code generation during recording, 21 is an A / D converter, 22 is a D / A converter, and 23 is a timing signal that controls the input / output of PCM signals. Is a generation circuit of.

First, the operation during reproduction will be described.

At the time of reproduction, the signal recorded on the tape 1 is reproduced by the rotary head 2. Two heads are attached to the rotary head 2 at an interval of 180 °, and reproduction is performed alternately. The output of each head is amplified by the reproduction amplifier 8 and then input to the switching circuit 9. In the switching circuit 9, the head switching signal generated by the head switching signal generation circuit 13 is used to select the output of the head that is reproducing. The output of the switching circuit 9 is converted into a digital signal by the data strobe circuit 10 and then demodulated into a PCM signal by the demodulation circuit 11. The demodulated PCM signal is stored in the storage circuit 19 via the bus line 18. Then, after error correction is performed by the error correction circuit 20, it is input to the D / A converter 22, converted into an analog signal, and output from the output terminal 29. The timing generation circuit 23 generates a timing signal for controlling the error correction circuit 20, the D / A converter 22 and the like according to the clock output from the oscillator 24. Also, the cylinder servo circuit
It also generates the servo reference signal in 15. Oscillator 24
The oscillation frequency is used as an integer multiple of the sampling frequency of the PCM signal, for example, 512 times the sampling frequency.
The cylinder servo circuit 15 controls the rotation of the rotary head 2 so that the phases of the reference signal output from the timing generation circuit 23 and the tack signal output from the tack detection circuit 14 become constant. Also, in the capstan servo circuit 16,
The tracking signal in the reproduction signal is detected, and the tape feeding speed by the capstan 4 is controlled so that the head scans the center of the recording track.

FIG. 2 shows the configurations of the demodulation circuit 11 and the area generation circuit 12. Reference numeral 30 is a data conversion circuit for converting the digital signal output from the data strobe circuit 10 into data in word units, 31 is a sync signal detection circuit for detecting a sync signal in the data, and 32 is a timing for controlling each part from the sync signal. A timing generation circuit for generating a signal, 33 a PCM signal register, 34 a control code register, 35 an address data register, 36 a parity check circuit for checking the parity added to the control code and address data, 37 is a parity judgment circuit that judges whether the data is correctly reproduced from the parity check result, sync signal detection result, and address detection result, 38 is a write control circuit that controls writing of the PCM signal to the recording circuit, and 39 is recording A counter for determining the position of reproduction, 40 is address data detected from the reproduction signal, head switching signal and And a counter control circuit 41 for setting the counter 39 by the tracking signal and a decode circuit 41 for generating an area signal from the output of the counter 39.

The operation of the demodulation circuit 11 will be described with reference to the timing chart of FIG.

Reference numeral 50 shows an example of a reproduction signal of one track. 59 is a PC
An area in which an M signal is recorded, 60 is an area in which subcodes such as a time code and song number are recorded, 61 is a recording area for tracking signals, and 62 is a margin area. 59 and 60 are divided into blocks and recorded. For example, the PCM signal recording area 59 is composed of 128 blocks, and the subcode recording area 60 is composed of 8 blocks. Reference numeral 51 shows the structure of one block. One section indicates one word, and for example, one word is composed of 8 bits. 63
Is a sync signal indicating the beginning of the block, 64 is a control code indicating the contents of the recorded data such as the sampling frequency of the PCM signal, and 65
Is a block address, 66 is a parity added to the control code 64 and the block address 65, and 67 is a PCM signal or subcode data. The error correction code added to the PCM signal or sub code is also recorded in this area. In the following description, the PCM signal, the subcode data and the error correction code are collectively referred to as the PCM signal. The block address 65 is composed of, for example, 8 bits, the PCM signal recording area 59 is 0 to 127, and the subcode recording area 60 is 1
28 to 135,136 to 143. As the parity 66, for example, even parity is used. Therefore, when the data is correctly reproduced, the result of adding the control code 64, the block address 65 and the parity 66 becomes 0. 52 is a sync signal detection signal, 53 is a clock of the control code register 34, 54 is a clock of the address register 35, and 55 is a parity check circuit 3
6 is a clock, 56 is a clock of the PCM signal register 33, 57 is a clock of the counter 39, and 58 is an output of the write control circuit 38.

The input terminal 42 is an input of a reproduction clock synchronized with the digital data and digital data output from the data strobe circuit 10. The input digital data is
It is input to the data conversion circuit 30 and the synchronization signal detection circuit 31. The sync signal detection circuit 31 detects the sync signal 63 and outputs the sync signal detection signal 52. In the data conversion circuit 30,
Data conversion is performed with reference to the sync signal detection signal 52. Further, the timing generation circuit 32 generates each clock based on the synchronization signal detection signal 52. As the operation clock of the timing generation circuit 32, the reproduced clock is used in the area where the data is reproduced, and the output of the oscillator 17 input from the input terminal 44 is used in the other areas. Oscillator 17
Then, a clock having the same frequency as the reproduced clock is oscillated. The input terminal 25 is an input terminal for a recording / reproducing switching signal.

The output of the data conversion circuit 30 is input to the registers 33, 34, 35 and the parity check circuit 36. PCM signal register 33
Then, the PCM signal is latched by the clock 56 and output from the output terminal 47 to the bus line 18. Control code register
34 latches the control code by the clock 53 and outputs it from the output terminal 27 together with the judgment result of the parity judgment circuit 37. The address register 35 latches the block address with the clock 54. In the parity check circuit 36, the control code 64, the block address 65 and the parity 66 are added by the clock 55. Parity judgment circuit
In 37, the reproduction data is judged to be correct when all the following conditions are satisfied.

(1) The sync signal is detected.

(2) The addition result in the parity check circuit 36 is 0.
Is.

(3) The reproduction block address matches the area described later. That is, assuming that the block address value is ADR, 0 ≦ ADR ≦ 127 in the PCM signal recording area, 128 ≦ ADR ≦ 135 in the first half of the subcode recording area, and 136 ≦ ADR ≦ 143 in the second half.
Is.

In this way, by determining whether or not the data is correctly reproduced by the parity check result, the detection information of the synchronization signal, and the block address check result, the probability of false detection occurring is compared to the case of judging only by the parity check result. It can be reduced.

The write control circuit 38 controls the write timing of the PCM signal to the storage circuit 19. That is, as shown in 58
A write control signal that becomes 1 at the reproduction position of the PCM signal is generated and output from the output terminal 48 to the storage circuit 19. Memory circuit 19
Then, the PCM signal is written only when the write control signal 58 is 1.

The operation of the area generation circuit 12 will be described with reference to the timing charts of FIGS. 4 and 5.

FIG. 4 is a timing chart when the winding angle of the tape is 90 °. Reference numeral 68 is a cylinder servo reference signal output from the timing generation circuit 23, and 69 is a tack detection signal.
The cylinder servo circuit 15 controls so that the falling edge of the reference signal 68 and the falling edge of the tack detection signal 69 have a constant phase difference. Reference numeral 70 denotes a head switching signal generated by the head switching signal generating circuit, which has a duty of 50%. The switching circuit 9 selects the A head when the head switching signal 70 is 0, and selects the B head when the head switching signal 70 is 1. 71 is a tracking signal detection signal indicating the position of the tracking signal, 7
2 is an area signal indicating the recording / reproducing position, 73 is an area signal indicating the recording / reproducing position of the PCM signal, and 74 is an area signal for discriminating the first half and the second half of the subcode. Area signal 72 ~
The decoder 74 generates the output of the counter 39 by decoding it with the decoding circuit 41.

The counter control circuit 40 sets a predetermined value in the counter 39 by the block address detected by the demodulation circuit 11, the head switching signal 70 input by the input terminal 45 and the tracking signal detection signal 71 input by the input terminal 46, Make sure the area is generated correctly. The counter 39 is set under the following conditions.

(1) Set at both edges of the head switching signal 70.

(2) Set at the falling edge of the tracking signal detection signal 71.

(3) When the parity judgment circuit 37 judges that the reproduction data is correct, the reproduction block address is used for setting.

FIG. 5 is a timing chart when the diameter of the rotary head is halved and the winding angle of the tape is 180 °. In this case as well, reproduction can be performed at the same number of revolutions, but the reproduction time of one track is doubled, and the reproduction frequency of data is halved. Therefore, if the operating frequency of the data strobe circuit 10 and the oscillating frequency of the oscillator 17 are halved, the timing shown in FIG.
72-74 match. On the other hand, in the section where the signal is not reproduced, if the timing of FIG.
However, since the counter 39 is set at the head of the track by using both edges of the head switching signal 70, the area signal is generated at correct intervals without changing the decoding of the decoding circuit 40. be able to.

Next, the operation during recording will be described.

During recording, an analog signal input from the input terminal 28 is converted into a PCM signal by the A / D converter 21 and then stored in the storage circuit 19. Then, the error correction circuit 20 adds an error correction code to the error correction code and then inputs it to the modulation circuit 7.
It is converted into a recording signal by the modulation circuit 7 and recorded on the magnetic tape 1 via the recording amplifier 6. The switching circuit 5 has an input terminal 25.
It is controlled to be turned on at the time of recording by a recording / reproduction switching signal input from the device. The recording / reproduction switching signal also controls the timing generation circuits 23 and 32.

FIG. 6 shows the configuration of the modulation circuit. 75 is a PCM signal register,
76 is a control code register, 77 is a block address register, 78 is a parity generation circuit, 79 and 99 are switching circuits, 80 is a tracking signal generation circuit, 81 is a data conversion circuit that performs the reverse processing of the data conversion circuit 30, and 82 is It is a synchronization signal generation circuit.

In this embodiment, the timing generation circuit 32 and the area generation circuit 12 are used for both recording and reproduction. Timing generation circuit
32 operates with the clock output from the oscillator 17 during recording.

The operation of the modulation circuit 7 will be described with reference to the timing chart of FIG. Reference numerals 88 and 91 are recording signals, which have the same structure as 50 and 51 in FIG. 89, 90, 98 are control signals of the switching circuit 99, 89 is a selection signal of the output of the data conversion circuit 81, 90
Is a selection signal of the output of the tracking signal generation circuit 80, and 98 is a selection signal of the output of the synchronization signal generation circuit 82. Reference numeral 92 is a count clock of the counter 39 at the time of recording and is also used as a latch clock of the control code register 76 and the address register 77. 93 is a latch clock of the PCM signal register 75. 94 to 97 are control signals of the switching circuit 79,
94 is a selection signal of the output of the PCM signal register 75, 95 is a selection signal of the output of the control code register 76, 96 is an address register 7
The output selection signal of 7 and 78 are selection signals of the output of the parity generation circuit 78. 89 and 90 are generated by the area generation circuit 12 and output from the output terminal 49 of the area generation circuit 12 to be input terminals.
Input from 86. 92 to 98 are generated by the timing generation circuit 32 of the demodulation circuit 11, output from the output terminal 43 of the demodulation circuit 11 and input from the input terminal 85.

The PCM signal 67 stored in the storage circuit 19 is the bus line 1
It is input from the input terminal 83 via 8 and is latched by the PCM signal register. The control code 64 is input from the input terminal 26 and latched by the control code register 76. The block address 65 is generated by the area generation circuit, input from the input terminal 86, and latched in the address register 77. The parity generation circuit 78 generates the parity 66 from the control code 64 and the block address 65. And
The switching circuit 79 selects the above signals to generate a recording signal for one block as shown in FIG. The output of the switching circuit 79 is converted by the data conversion circuit 81, then added with the synchronization signal 63 and the tracking signal 61 by the switching circuit 99, and output from the output terminal 87 to the recording amplifier 6.

Also at the time of recording, the timing of the recording signal when the diameter of the rotary head is decreased and the winding angle of the tape is increased is the same as the timing of FIGS. 4 and 5, and the oscillation frequency of the oscillator 17 is changed. You can deal with it only.

As mentioned above, the area generation circuit is
By setting the rotary head once at the beginning of the track, the diameter of the rotary head can be reduced and the winding angle of the tape can be increased by changing the operation clock in proportion to the diameter of the rotary head.

In this embodiment, the case where the diameter of the rotary head is halved has been described, but the case where the diameter is changed at other ratios can be similarly applied. The same applies when the diameter is increased.

〔The invention's effect〕

According to the present invention, even devices having different diameters of rotary heads can be dealt with by only changing the operation clock without changing the circuit.

[Brief description of drawings]

FIG. 1 is a block diagram of a PCM signal recording / reproducing apparatus according to an embodiment of the present invention, FIG. 2 is a block diagram of a demodulation circuit and an area generation circuit, FIG. 3 is a timing chart diagram of the demodulation circuit, and FIG. 5 is a timing chart of the generation circuit, FIG. 5 is another timing chart of the area generation circuit, FIG. 6 is a block diagram of the modulation circuit, and FIG. 7 is a timing chart of the modulation circuit. 7 ... Modulation circuit 11 ... Demodulation circuit 12 ... Area generation circuit 13 ... Head switching signal generation circuit 14 ... Tack detection circuit 15 ... Cylinder servo circuit 16 ... Capstan servo circuit 17, 24 ... Oscillator 19 …… Memory circuit 20 …… Error correction circuit 21 …… A / D converter 22 …… D / A converter 23 …… Timing generation circuit 30,81 …… Data conversion circuit 31 …… Sync signal detection circuit 32 …… Timing generation circuit 33,75 …… PCM signal register 34,76 …… Control code register 35,77 …… Address register 36 …… Parity check circuit 37 …… Parity judgment circuit 38 …… Write control circuit 39 …… Counter 40… Counter control circuit 41 Decode circuit 78 Parity generation circuit 79,99 Switching circuit 80 Tracking signal generation circuit 82 Synchronization signal generation circuit

Claims (2)

[Claims] 1. A rotary head for recording or reproducing on or from a magnetic tape by two facing heads, a modulation circuit for generating a recording signal, a demodulation circuit for demodulating a reproduction signal, the modulation circuit or the demodulation circuit. In a PCM signal recording / reproducing apparatus having an area generating circuit for generating an area signal for determining the recording / reproducing position of a signal in the circuit, a control circuit for setting the area generating circuit every 1/2 rotation of the rotary head is provided. A PCM signal recording / reproducing device characterized in that 2. A PCM signal recording / reproducing apparatus according to claim 1, wherein a signal having a duty of 50% synchronized with the rotary head is generated, and the area generating circuit is set at a rising edge and a falling edge thereof. PCM signal recording / reproducing device characterized by performing.