JPH0728034B2 - Semiconductor device - Google Patents

Description

The present invention relates to the structure of a novel semiconductor device capable of high speed operation.

MOS (Metal Oxide Semicon) is one of the active semiconductor devices.
ductor) transistor, but it is widely used as a constituent element of an integrated circuit due to its simple structure and relatively simple manufacturing process, and the size of the element is reduced in order to highly integrate the integrated circuit. In addition, the speed of operation is being measured.

FIG. 1 shows a schematic diagram for explaining the schematic structure and operation of a conventional MOS transistor. In FIG. 1, 1 is a semiconductor substrate having one conductivity type, 2 is an impurity-containing region having a second conductivity type different from that of the substrate 1, 3 is an impurity-containing region having the same conductivity type as the impurity-containing region 2, Reference numeral 4 is an insulating film formed on the substrate 1, and 5 is a gate electrode. In the expression in the electric circuit, the impurity-containing region 2 is called a source, the impurity-containing region 3 is called a drain electrode, and 5 is called a gate electrode.

The operation of this MOS transistor using the P type semiconductor substrate 1 will be described below. The substrate 1 and the source 2 are set to zero potential, and a positive voltage is applied to the drain 3. Now, if a negative voltage is applied to the gate 5 so that the inversion layer is not formed on the substrate surface, most of the electrons, which are majority carriers in the source and drain, exist on the surface of the semiconductor substrate 1 between the source 2 and the drain 3. Therefore, no current flows between the source 2 and the drain 3. Now, when a positive voltage higher than a threshold value is applied to the gate 5 to form an inversion layer on the surface of the substrate, a large number of electrons exist in the inversion layer so that a current due to the movement of electrons flows between the source 2 and the drain. Become. However, these two states do not change stepwise, but when the gate voltage is near the threshold value, a weak inversion layer is formed on the substrate surface, and the inversion layer is formed between the source 2 and the drain 3. A current (drain current) limited by the number of electrons in the layer flows. Thus, there is a weak inversion region in which the drain current changes with the change of the gate voltage.

Figure 2 shows the gate voltage (V _G ) of a conventional MOS transistor.
It is a weak inversion characteristic of the drain current (log Ib) with respect to.
In FIG. 2, the solid line is the characteristic of the conventional structure MOS transistor, the dotted line is the characteristic of the ideal switching transistor,
a is a region where a leak current flows at the junction of the source 2 and the drain 3, b is a weak inversion region, V _T is a threshold voltage,
c is a strong inversion region in which an inversion layer through which a large drain current can flow is formed. Only two regions a and c are used for the switching operation, and b is essentially unnecessary.
However, it is practically difficult to remove it. MOS
When the transistor is miniaturized and the operating voltage is lowered, the weak inversion region b is not narrowed, so that the operating margin of each region of a and c is narrowed. Therefore, it is extremely effective if the characteristic (dotted line) where the weak inversion region b does not exist can be realized.

An object of the present invention is to eliminate the drawbacks of the conventional MOS transistor and to provide a novel semiconductor device based on a new operation principle capable of high speed operation and high density.

According to the present invention, a semiconductor substrate and a first degenerated high-concentration impurity-containing region which is provided in a part of the semiconductor substrate surface and has the same type and a steep impurity distribution as the substrate, and another one of the semiconductor substrate surface. A second high-concentration impurity-containing region having a second conductivity type different from that of the substrate, and the first
And an electrode provided on the surface of the semiconductor substrate via an insulating film between the second high-concentration impurity-containing region and a second high-concentration impurity-containing region below the electrode on at least a part of the semiconductor substrate surface. And a second high-concentration impurity-containing region in which the impurity concentration gradually decreases from the same level as the second high-concentration impurity-containing region as the distance from the boundary line increases. A semiconductor device characterized by controlling a tunnel current between a high-concentration carrier region formed on the surface of a semiconductor substrate below an electrode and a first degenerated high-concentration impurity region, which is formed of an impurity-containing region of the same type. can get.

The present invention is a novel semiconductor based on the operation principle that the thickness of the depletion layer of the pn junction provided on the substrate surface is changed by the gate electrode provided on this junction to control the tunnel current flowing between the junctions. It is a device.

Hereinafter, the present invention will be described in detail with reference to the drawings illustrating an embodiment.

FIG. 3 is a schematic sectional view showing an embodiment of the present invention. In FIG. 3, those having the same numbers as in FIG. 1 are equivalent to those in FIG. 1 and show the same functions. 11 is a semiconductor substrate having one conductivity type,
Reference numeral 12 denotes a first degenerate high-concentration impurity-containing region having the same conductivity type as that of the substrate 11 and having a steep impurity distribution, and 13 denotes a second high-concentration impurity-containing region having a conductivity type different from that of the high-concentration impurity-containing region 12. The region, 14 is provided in a region including the high-concentration impurity-containing region 13, and the impurity concentration gradually decreases from the same impurity concentration as the high-concentration impurity-containing region 13 as the distance from the high-concentration impurity-containing region 13 increases. This is an impurity-containing region of the same type as the concentration impurity-containing region 13. The impurity concentration of the two high-concentration impurity-containing regions 12 and 13 is 1 × 10 ¹⁹ cm ⁻³ or more, and the impurity concentration distribution at the junction between the first high-concentration impurity-containing region 12 and the substrate 11 is step-shaped. Is desirable. If ions such as arsenic having a small diffusion constant are ion-implanted on the surface of the substrate 11, the surface concentration is 1 × 10.
^{At 21} cm ^-3 , a joint with a joint depth of 0.3 μm that can be regarded as a step is completed. Two high-concentration impurity-containing regions 12,1
3 are called source and drain, respectively. Further, the length of the region where the impurity concentration of the impurity-containing region 14 is gradually changed is preferably 0.1 μm or more. The impurity-containing region 14 can be realized by ion-implanting phosphorus or other ions having a large diffusion constant in the drain portion before forming the source and drain, and forming a graded junction by heat treatment.

The operation of this new semiconductor device using the P type semiconductor substrate 11 is as follows. Semiconductor substrate for simplicity
It is assumed that the surface of 11 is in a flat band state in thermal equilibrium. The bias voltage (drain voltage) between the source 12 and the drain 13 is applied so that the source 12 is at the ground potential and the drain 13 is at the positive potential so that the pn junction is reverse biased. Since the substrate 11 forms a PP ⁺ junction with the source, its potential is set to approximately ground potential.
Now, assuming that the absolute value of the voltage of the gate electrode 5 is small and the high-concentration carrier region of the accumulation layer or the inversion layer is not formed on the substrate surface, the pn junction between the substrate 11 and the impurity-containing region 14 around the drain 13 is formed. At, a thick depletion layer is formed in the substrate 11 and the impurity-containing region 14, so that no current (drain current) flows between the source 12 and the drain 13. On the other hand, when a positive voltage higher than the threshold voltage is applied to the gate electrode 5 to form a high-concentration electron inversion layer on the substrate surface, the inversion layer and the drain 13 are connected, and the inversion layer and the source on the substrate surface are connected. The junction with 12 is an equivalent P ⁺ -n ⁺ tunnel junction, the depletion layer on the surface is almost not spread, and this junction has a high electric field. When the width of this depletion layer becomes several tens of liters or less, carriers can pass through this depletion layer by a tunnel,
A tunnel current comes to flow between the source 12 and the drain 13. Further, when a sufficiently large negative voltage is applied to the gate electrode 5 to form a high-concentration hole accumulation layer on the substrate surface, the accumulation layer and the source 12 are connected, and the junction on the substrate surface forms the drain 13 and the surrounding area. Although it is formed between the impurity-containing region 14 and the storage layer, no current flows between the source 12 and the drain 13 because the thick depletion layer spreads in the impurity-containing region 14. In this way, the drain current can be controlled by the gate voltage.

Since the present invention is based on such a principle, the operation is unipolar with respect to the gate voltage as in the conventional MOS transistor, and no current flows until carrier tunneling occurs, resulting in a weak voltage as shown in FIG. 2 (b). There is no inversion region, and a characteristic close to the ideal characteristic (dotted line) in FIG. 2 is obtained. However, since the semiconductor device according to the present invention does not have a mechanism for limiting the current in the conductive state of the element, it is desirable to insert a resistor for limiting the current or an equivalent resistor of the active device in series.

FIG. 4 is a schematic sectional view showing another embodiment of the present invention. In FIG. 4, the same reference numerals as those in FIGS. 1 and 3 are equivalent to those in FIGS. 1 and 3 and show the same functions. 15
Is provided on the surface of the substrate 11 below the gate electrode 5 in contact with the high-concentration impurity-containing region 13, and the high-concentration impurity-containing region 13 is provided.
The impurity concentration region is the same type as the high concentration impurity concentration region 13 in which the impurity concentration gradually decreases from the same impurity concentration as the high concentration impurity concentration region 13. The impurity-containing region 15 can be realized, for example, by implanting impurity ions obliquely from the drain side in the direction of the substrate surface under the gate electrode to form a loose junction under the gate electrode. Note that when the gate electrode is present only above a part of the impurity-containing region 15 and not above the drain 13, even if a tunnel phenomenon occurs on the source side, the current does not flow in a place where the gate electrode does not exist above the impurity region 15. Is difficult to flow, which is not preferable.

The impurity-containing region 15 is the above-mentioned third region in the operation of the device.
Since it has the same function as the impurity-containing region 14 in the figure, the operating principle and operational characteristics of this embodiment are the same as those of the embodiment of the present invention shown in FIG.

Although the structure and operation of the novel semiconductor device according to the present invention have been described above by using the P-type substrate, it is obvious that the same effect can be achieved when the substrate is the n-type. Further, it is obvious that the novel semiconductor device according to the present invention can be realized even if the semiconductor substrate is replaced by a thin film or thick film semiconductor.

[Brief description of drawings]

FIG. 1 is a schematic diagram of a conventional structure MOS transistor.
Is a semiconductor substrate having one conductivity type, 2 is an impurity-containing region having a second conductivity type different from that of the substrate 1, 3 is an impurity-containing region having the same polarity as the impurity-containing region 2, and 4 is on the substrate 1. The formed insulating films 5 are gate electrodes. Figure 2 shows the weak inversion characteristics of the drain current with respect to the drain voltage of the conventional structure MOS transistor. The solid line shows the conventional structure.
The characteristics of the MOS transistor, the dotted line is the characteristics of the ideal switching transistor, a is the region where the junction leak current of the source and drain flows, b is the weak inversion region, V _T is the threshold voltage, and c is the strong inversion region. FIG. 3 is a schematic sectional view showing an embodiment of the present invention, in which the same reference numerals as those in FIG. 1 are equivalent and indicate the same function, 11 is a substrate having one conductivity type, 12 is the same as the substrate. A first degenerate high-concentration impurity-containing region having a conductivity type and a steep impurity distribution, 13 is a second high-concentration impurity-containing region having a second conductivity type different from the high-concentration impurity-containing region 12, 14 Indicates that the impurity concentration gradually decreases from the same impurity concentration as the high-concentration impurity-containing region 13 as the distance from the high-concentration impurity-containing region 13 provided in the region including the high-concentration impurity-containing region 13 increases. This is an impurity region of the same type as the concentration impurity-containing region 13. FIG. 4 is a schematic cross-sectional view showing another embodiment of the present invention, in which the same reference numerals as those in FIGS. 1 and 3 are equivalent to those in FIGS. 1 and 3 and show the same function. Is provided on the surface of the substrate 11 below the gate electrode 5 in contact with the high-concentration impurity-containing region 13, and as the distance from the high-concentration impurity-containing region 13 increases, the impurity concentration gradually changes from the same impurity concentration as that of the high-concentration impurity region 13. It is an impurity-containing region of the same type as that of the high-concentration impurity-containing region 13 that has decreased to 1.

Claims (1)

[Claims] 1. A semiconductor substrate, a first degenerate high-concentration impurity-containing region having the same type and a steep impurity distribution as that of the substrate, which is provided on a part of the surface of the semiconductor substrate, and another surface of the semiconductor substrate. A second high-concentration impurity-containing region having a second conductivity type different from that of the substrate and provided in a part of the first substrate;
An electrode provided on the surface of the semiconductor substrate via an insulating film between the second high-concentration impurity-containing region and a second high-concentration impurity-containing region below the electrode at least at a part of the semiconductor substrate surface. The same concentration as the second high-concentration impurity-containing region, which includes the boundary with the semiconductor substrate, and whose impurity concentration gradually decreases from the same level as the second high-concentration impurity-containing region as the distance from the boundary increases. And a tunnel current between the high-concentration carrier region formed on the surface of the semiconductor substrate below the electrode and the first degenerated high-concentration impurity-containing region.