JPH0732260B2 - Photodetector having superlattice structure of amorphous semiconductor - Google Patents
Photodetector having superlattice structure of amorphous semiconductorInfo
- Publication number
- JPH0732260B2 JPH0732260B2 JP59147958A JP14795884A JPH0732260B2 JP H0732260 B2 JPH0732260 B2 JP H0732260B2 JP 59147958 A JP59147958 A JP 59147958A JP 14795884 A JP14795884 A JP 14795884A JP H0732260 B2 JPH0732260 B2 JP H0732260B2
- Authority
- JP
- Japan
- Prior art keywords
- superlattice structure
- layer
- amorphous
- amorphous semiconductor
- electrons
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/10—Semiconductor bodies
- H10F77/14—Shape of semiconductor bodies; Shapes, relative sizes or dispositions of semiconductor regions within semiconductor bodies
- H10F77/146—Superlattices; Multiple quantum well structures
- H10F77/1462—Superlattices; Multiple quantum well structures comprising amorphous semiconductor layers
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Nanotechnology (AREA)
- Physics & Mathematics (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biophysics (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は，非晶質材料からなる超格子構造を用いた受光
素子に関し，特に電子とホールが空間的に異なる層を走
行する超格子構造を有する高効率，高速応答可能な非晶
質受光素子に関するものである。The present invention relates to a light receiving element using a superlattice structure made of an amorphous material, and more particularly to a superlattice structure in which electrons and holes travel in spatially different layers. The present invention relates to an amorphous light receiving element having a high efficiency and a high speed response.
従来，超格子構造を有する受光素子は，結晶半導体材料
を用いてのみ製作されているが，その製作は，各層間で
の格子整合を取りうる材料のみに限られ，また分子線エ
ピタキシ技術や有機金属化学気相成長技術などの高度な
結晶成長技術が必要不可欠となっていた。Conventionally, a photodetector having a superlattice structure has been manufactured only by using a crystalline semiconductor material, but the manufacture is limited to only a material capable of achieving lattice matching between layers, and the molecular beam epitaxy technique and organic Advanced crystal growth techniques such as metal chemical vapor deposition techniques have become indispensable.
これに対し，非晶質半導体は結晶半導体に比べて光吸収
係数が大きく，非晶質材料を用いた超格子構造の製作に
おいては，各層間の格子整合を重視する必要がない点で
結晶超格子構造の製作に常にともなっていた大きな障害
が除かれ，素子の設計，製作の自由度を大幅に拡大でき
る。また，通常の結晶成長に必要な温度（たとえば600
〜800℃）よりもはるかに低温，たとえば300℃におい
て，制御が容易で大面積化も可能な非晶質薄膜製作方法
として，原料ガスのグロー放電分解法を適用できるとい
う大きな利点がある。しかし，非晶質半導体は，キャリ
アの寿命や移動度がかなり小さいため，単純に超格子構
造を適用しても，高感度および高速応答の特性をもつ受
光素子が得られないという問題があった。On the other hand, an amorphous semiconductor has a larger light absorption coefficient than a crystalline semiconductor, and in manufacturing a superlattice structure using an amorphous material, it is not necessary to give priority to lattice matching between layers, and thus a crystalline The major obstacles that have always been involved in the production of lattice structures are eliminated, and the degree of freedom in device design and production can be greatly expanded. In addition, the temperature required for normal crystal growth (for example, 600
It has a great advantage that the glow discharge decomposition method of the raw material gas can be applied as a method for producing an amorphous thin film that can be easily controlled and has a large area at a temperature much lower than (~ 800 ° C), for example, 300 ° C. However, since the life and mobility of carriers of an amorphous semiconductor are considerably small, there is a problem in that even if a superlattice structure is simply applied, a light receiving element having high sensitivity and high speed response cannot be obtained. .
本発明は，電子とホールをそれぞれ空間的に異なるポテ
ンシャル井戸に閉じ込める超格子構造を用いることによ
り，キャリアの寿命と移動度を増大させ，大面積で高効
率，高速応答可能な非晶質半導体受光素子を提供する。The present invention uses a superlattice structure in which electrons and holes are confined in spatially different potential wells, thereby increasing the life and mobility of carriers and achieving a large area, high efficiency, and fast response amorphous semiconductor light receiving device. Provide the element.
以下に，本発明の詳細を実施例にしたがって説明する。 Hereinafter, details of the present invention will be described according to examples.
第１図は，本発明によるnipi超格子構造をもつ非晶質半
導体の受光素子の１実施例の断面およびエネルギーバン
ドを示し，図において,1は受光素子,2は絶縁物または高
抵抗材料の基板,3は非晶質半導体の極めて薄い（数百Å
以下，たとえば20乃至500Åの範囲）層をｎ型層,i型層
（不純物ドープしてない層）,p型層,i型層の順に交互に
積層形成したホモ接合の超格子構造体,4は超格子構造を
保護するための絶縁層,5および６はオーミック電極,7は
超格子構造体３の一部のエネルギーバンド図,8は非晶質
Si層（ｎ型,i型,p型層いずれでもよい）,9はｎ型非晶質
Si層,10はｐ型非晶質Si層を表す。FIG. 1 shows a cross section and an energy band of one embodiment of an amorphous semiconductor light receiving element having a nipi superlattice structure according to the present invention. In the figure, 1 is a light receiving element, 2 is an insulator or a high resistance material. Substrate, 3 is an extremely thin amorphous semiconductor (several hundred Å
Hereinafter, for example, a homojunction superlattice structure in which layers are alternately laminated in the order of an n-type layer, an i-type layer (a layer not doped with impurities), a p-type layer, and an i-type layer, in the range of 20 to 500Å), 4 Is an insulating layer for protecting the superlattice structure, 5 and 6 are ohmic electrodes, 7 is an energy band diagram of a part of the superlattice structure 3, and 8 is amorphous.
S i layer (any n-type, i-type, p-type layer), 9 is n-type amorphous
S i layer, 10 represents a p-type amorphous S i layer.
この結果，図示のように光が入射すると，入射光子のエ
ネルギーがEgよりも大きければ，非晶質Si層８（ｎ型,i
型,p型層いずれでもよい）の価電子帯内の電子は伝導帯
まで励起され（で示す），さらにエネルギー的に安定
な電子のポテンシャル井戸であるｎ型非晶質Si層９へ流
れ込んで，ここに閉じ込められる。他方，非晶質Si層８
に生じたホール（で示す）は,p型非晶質Si層10がホー
ルのポテンシャル井戸であるため，ここに閉じ込められ
る。このようにして生成された電子およびホールは，オ
ーミック電極5,6に印加されている電圧の極性に応じ
て，それぞれの層の内部に拘束されたまま平行して輸送
され，電流として取り出される。As a result, when light enters as shown in the figure, if the energy of the incident photon is larger than E g , the amorphous S i layer 8 (n-type, i
Type, electrons in the valence band of the may be either p-type layer) is shown excited to the conduction band (at), flows further to the energetically stable electron potential wells in which n-type amorphous S i layer 9 So I'm trapped here. On the other hand, the amorphous S i layer 8
Hall (in shown) that occurred, since p-type amorphous S i layer 10 is a potential well of holes is confined here. The electrons and holes thus generated are transported in parallel while being confined inside the respective layers according to the polarity of the voltage applied to the ohmic electrodes 5 and 6, and taken out as a current.
本発明による受光素子の高効率，高速応答特性は，次の
２つの理由によって実現される。The high efficiency and high speed response characteristics of the light receiving element according to the present invention are realized for the following two reasons.
第１には,nipiホモ接合超格子構造体内に形成されたポ
テンシャル井戸層に閉じ込められたキャリア（電子およ
びホール）が，井戸層の幅Ｗがド・ブロイ波長程度（数
＋Å）に狭い場合に，量子サイズ効果により,2次元平面
にのみ分布するいわゆる２次元キャリアガス状態となる
ことによる。すなわちこの２次元キャリア状態において
は，井戸層内でのキャリア輸送時の散乱は,2次元等エネ
ルギー面内の散乱のみが支配的となって，キャリア散乱
確率が減少するため，キャリア移動度が増大することに
なる。First, when the carriers (electrons and holes) confined in the potential well layer formed in the nipi homojunction superlattice structure are narrow in the width W of the well layer to about de Broglie wavelength (several + Å) Due to the quantum size effect, the state becomes a so-called two-dimensional carrier gas state that is distributed only in the two-dimensional plane. In other words, in this two-dimensional carrier state, the scattering during carrier transport in the well layer is dominated by the scattering within the two-dimensional isoenergy plane, and the carrier scattering probability decreases, so the carrier mobility increases. Will be done.
第２には，第１図のエネルギーバンド図７に示されるよ
うに，電子とホールは，空間的に分離された異なるポテ
ンシャル井戸層内を走行するため，再結合確率が極めて
小さくなり，キャリアの寿命が著しく増大することによ
るものである。Second, as shown in the energy band diagram 7 in FIG. 1, electrons and holes travel in different spatially separated potential well layers, so that the recombination probability becomes extremely small and carrier This is because the life is significantly increased.
なお，本実施例で使用された非晶質半導体のSiは，本発
明に適用可能なものの１例にすぎないもので広い範囲の
材料，たとえばSil-xCx，Sil-xNxなどの使用が可能であ
る。It should be noted that S i of the amorphous semiconductor used in this example is only one example applicable to the present invention and is a wide range of materials such as S il-x C x and S il-x N. You can use x, etc.
以上述べたように本発明によれば，電子とホールが空間
的に異なる層を走行する超格子構造を使用することで，
キャリアの移動度の増大および再結合確率の減少による
寿命の増大が図られ，大面積で高効率，高速応答可能な
非晶質半導体の受光素子を得ることができる。As described above, according to the present invention, by using a superlattice structure in which electrons and holes travel in spatially different layers,
Since the carrier mobility is increased and the recombination probability is decreased, the lifetime is increased, and a large-area, high-efficiency, fast-response amorphous semiconductor light-receiving element can be obtained.
第１図は本発明による受光素子の１実施例の構造および
エネルギーバンドを示す図である。 図中,1は受光素子,2は基板,3は超格子構造体,4は絶縁
層,5および６はオーミック電極,7はエネルギーバンド
図,8は非晶質Si層（n,i,p型層いずれも含む）,9はｎ型
非晶質Si層,10はｐ型非晶質Si層を示す。FIG. 1 is a diagram showing the structure and energy band of one embodiment of a light receiving element according to the present invention. In the figure, 1 is a light receiving element, 2 is a substrate, 3 is a superlattice structure, 4 is an insulating layer, 5 and 6 are ohmic electrodes, 7 is an energy band diagram, 8 is an amorphous Si layer (n, i, 9 includes an n-type amorphous S i layer, and 10 represents a p-type amorphous S i layer.
Claims (1)
薄膜をnipi構造に多層積層して形成したホモ接合からな
り、電子とホールに対するポテンシャル井戸がそれぞれ
ｎ層とｐ層に分かれて存在する超格子構造と、超格子構
造の対向する２つの側面のそれぞれに設けられたオーミ
ック電極を有し、オーミック電極間に電圧を印加して、
ｎ層の電子およびｐ層のホールをそれぞれの層内に拘束
したまま輸送し電流取り出しを行うことを特徴とする非
晶質半導体の超格子構造を有する受光素子。1. A homojunction formed by stacking extremely thin p, n controllable amorphous semiconductors in a nipi structure in multiple layers, and potential wells for electrons and holes are divided into n and p layers, respectively. It has an existing superlattice structure and ohmic electrodes provided on each of two opposing side surfaces of the superlattice structure, and a voltage is applied between the ohmic electrodes,
A light-receiving element having a superlattice structure of an amorphous semiconductor, characterized in that electrons in the n-layer and holes in the p-layer are transported while being confined in the respective layers to extract a current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59147958A JPH0732260B2 (en) | 1984-07-17 | 1984-07-17 | Photodetector having superlattice structure of amorphous semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59147958A JPH0732260B2 (en) | 1984-07-17 | 1984-07-17 | Photodetector having superlattice structure of amorphous semiconductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6127686A JPS6127686A (en) | 1986-02-07 |
| JPH0732260B2 true JPH0732260B2 (en) | 1995-04-10 |
Family
ID=15441926
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59147958A Expired - Lifetime JPH0732260B2 (en) | 1984-07-17 | 1984-07-17 | Photodetector having superlattice structure of amorphous semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0732260B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2771532B2 (en) * | 1986-01-16 | 1998-07-02 | 三洋電機株式会社 | Light sensor |
| JPS6356964A (en) * | 1986-08-27 | 1988-03-11 | Nec Corp | Semiconductor photoconduction type photo detector |
| US5065205A (en) * | 1989-05-12 | 1991-11-12 | The United States Of America As Represented By The United States Department Of Energy | Long wavelength, high gain InAsSb strained-layer superlattice photoconductive detectors |
| JP2838906B2 (en) * | 1989-08-04 | 1998-12-16 | キヤノン株式会社 | Photoelectric conversion device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56133883A (en) * | 1980-03-24 | 1981-10-20 | Seisan Gijutsu Shinko Kyokai | Photoelectric transducer |
-
1984
- 1984-07-17 JP JP59147958A patent/JPH0732260B2/en not_active Expired - Lifetime
Non-Patent Citations (1)
| Title |
|---|
| ＰｈｙｓｉｃａｌＲｅｖｉｅｗＬｅｔｔｅｒｓｖｏｌ．４７，Ｎｏ．１２，Ｐ．Ｐ．８６４−８６７（１９８１） |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6127686A (en) | 1986-02-07 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |