JPH0734506B2 - Multilayer printed wiring board - Google Patents
Multilayer printed wiring boardInfo
- Publication number
- JPH0734506B2 JPH0734506B2 JP25452789A JP25452789A JPH0734506B2 JP H0734506 B2 JPH0734506 B2 JP H0734506B2 JP 25452789 A JP25452789 A JP 25452789A JP 25452789 A JP25452789 A JP 25452789A JP H0734506 B2 JPH0734506 B2 JP H0734506B2
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- Prior art keywords
- insulating layer
- circuit
- layer
- circuit board
- resin
- Prior art date
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Description
【発明の詳細な説明】 産業上の利用分野 本発明は、電子、電気機器に組込んで使用される多層プ
リント配線板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board used by being incorporated in electronic or electric equipment.
従来の技術 多層プリント配線板の機械加工性を考慮して、内層の回
路板の基板を構成する基材、内層の回路板同士の間の絶
縁層(内層絶縁層)を構成する基材、内層の回路板と表
面の回路間の絶縁層を構成する基材に、ガラス不織布と
ガラス織布を適宜組合せたコンポジット多層プリント配
線板が提案されている。2. Description of the Related Art In consideration of machinability of a multilayer printed wiring board, a base material forming a substrate of an inner circuit board, a base material forming an insulating layer (inner insulating layer) between the inner circuit boards, an inner layer There has been proposed a composite multilayer printed wiring board in which a glass non-woven fabric and a glass woven fabric are appropriately combined with a base material forming an insulating layer between the circuit board and the surface circuit.
これに関して、特開昭61-40094号公報に開示されている
技術は、内層の回路板の基板をエポキシ樹脂含浸ガラス
織布基材で構成している。そして表面層のエポキシ樹脂
含浸ガラス織布基材と前記内層の回路板との間に、充填
材の配合量が異なる2種類のエポキシ樹脂含浸ガラス不
織布基材(内層絶縁層)を介在させて一体化したもので
ある。In this regard, in the technique disclosed in Japanese Patent Laid-Open No. 61-40094, the circuit board substrate of the inner layer is composed of an epoxy resin-impregnated glass woven base material. Then, two kinds of epoxy resin-impregnated glass non-woven fabric base materials (inner layer insulation layers) having different compounding amounts of fillers are interposed between the surface layer epoxy resin-impregnated glass woven base material and the inner layer circuit board to be integrated. It has been transformed.
発明が解決しようとする課題 しかしながら、上記多層プリント配線板は、内層の回路
板と表面層にガラス織布基材を使用しているので、その
複数枚を重ねてドリル穴あけ加工を行なうと、ドリル穴
の位置ずれを起こしやすい。この位置ずれは、下方に重
ねた多層プリント配線板ほど顕著になる。内層の回路板
の基材をガラス不織布に置き換えれば、ドリル穴あけ加
工性はよくなるが、寸法安定性が低下してしまう。内層
の回路と表面の回路は、多層化の後スルーホールにより
導通させることになるので、製造工程中に内層の回路板
が寸法変化を起こすことは致命的な問題である。DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, since the above-mentioned multilayer printed wiring board uses the glass woven fabric substrate for the inner layer circuit board and the surface layer, when a plurality of the drilled holes are drilled, It is easy to cause the holes to be out of position This misalignment becomes more remarkable in the multilayer printed wiring boards stacked below. If the base material of the circuit board of the inner layer is replaced with a glass non-woven fabric, the drilling workability is improved, but the dimensional stability is reduced. Since the circuit on the inner layer and the circuit on the surface are electrically connected by the through holes after the multi-layering, it is a fatal problem that the circuit board of the inner layer undergoes a dimensional change during the manufacturing process.
また、上記公報における技術では、内層絶縁層であるエ
ポキシ樹脂含浸ガラス不織布基材として、寸法安定性や
層間密着性、ボイドの発生を考慮して、充填材の配合量
が異なる2種類を併用しているが、多層化の作業が煩雑
になる。Further, in the technique in the above publication, two types of fillers having different compounding amounts are used in combination as the epoxy resin-impregnated glass nonwoven fabric substrate which is the inner insulating layer in consideration of dimensional stability, interlayer adhesion, and generation of voids. However, the multi-layered work becomes complicated.
本発明の課題は、ガラス織布基材の使用を表面層のみと
し、内層に使用する基材をガラス不織布としながら、寸
法安定性に優れ、層間密着性(特に内層回路表面と内層
絶縁層の密着性)の良好な多層プリント配線板を提供す
ることである。An object of the present invention is to use a glass woven fabric base material only as a surface layer, while using a glass non-woven fabric as a base material to be used for the inner layer, excellent in dimensional stability and interlayer adhesion (particularly for the inner layer circuit surface and the inner layer insulating layer). It is to provide a multilayer printed wiring board having good adhesion).
課題を解決するための手段 上記課題を解するために、本発明に係る多層プリント配
線板は、次のような一体になった層構成を採用した。Means for Solving the Problems In order to solve the above problems, the multilayer printed wiring board according to the present invention employs the following integrated layer structure.
(イ)回路1の表面が化学処理により微細に凹凸化され
ている内層回路板の基板2を熱硬化性樹脂含浸ガラス不
織布基材で構成する。その樹脂中に30〜50重量%の無機
充填材を含有する。(A) The substrate 2 of the inner layer circuit board in which the surface of the circuit 1 is finely roughened by chemical treatment is made of a thermosetting resin-impregnated glass nonwoven fabric base material. The resin contains 30 to 50% by weight of inorganic filler.
(ロ)表面回路3の絶縁層(表面絶縁層4)を熱硬化性
樹脂含浸ガラス織布基材で構成する。(B) The insulating layer (surface insulating layer 4) of the surface circuit 3 is made of a thermosetting resin-impregnated glass woven fabric base material.
(ハ)表面絶縁層4と内層回路板間の絶縁層(内層絶縁
層5)を熱硬化性樹脂含浸ガラス不織布基材で構成す
る。その樹脂中に5〜20重量%の無機充填材を含有す
る。(C) The insulating layer between the surface insulating layer 4 and the inner circuit board (inner insulating layer 5) is made of a thermosetting resin-impregnated glass nonwoven fabric base material. The resin contains 5 to 20% by weight of inorganic filler.
また、内層回路板が2つ以上存在する場合には、内層回
路板同士の間も上記(ハ)の内層絶縁層5で構成する。In addition, when there are two or more inner layer circuit boards, the inner layer insulating layers 5 described above in (c) are also provided between the inner layer circuit boards.
内層絶縁層に含まれる無機充填材は、表面をシラン処理
してあるのが好ましい。The surface of the inorganic filler contained in the inner insulating layer is preferably treated with silane.
作用 内層回路板と内層絶縁層5の密着力は、基板2の表面が
露出している部分では化学的結合によっている。しか
し、回路1の部分では、内層絶縁層5の樹脂が加熱加圧
成形のときに流動して、回路1表面の化学処理による微
細な凹凸に入り込み、その投錨効果による物理的な結合
によって、密着力を得ている。Action The adhesive force between the inner layer circuit board and the inner layer insulating layer 5 is due to the chemical bond in the portion where the surface of the substrate 2 is exposed. However, in the portion of the circuit 1, the resin of the inner insulating layer 5 flows at the time of heat and pressure molding to enter into fine irregularities on the surface of the circuit 1 due to the chemical treatment, and the anchoring effect causes a physical bond to make a close contact. I have power.
内層絶縁層5の基材がガラス織布のときは、前記投錨効
果による物理的な結合力は大きいのであるが、基材がガ
ラス不織布のときには、この結合力が十分に大きくな
い。これは、次のような理由によると推測される。すな
わち、ガラス不織布はかさ高く空隙部分が多いので、加
熱加圧成形のときに流動する樹脂が前記空隙を埋めるこ
とに優先的に使われ、回路1表面の微細な凹凸には十分
に流れ込まない(流れ込みにくい)ためと推測される。
このような知見に基づき、本発明に係る多層プリント配
線板は、内層絶縁層5の樹脂中に無機充填材を含有させ
たのであり、回路1表面の微細な凹凸に比べて十分に大
きい前記充填材粒子が、回路1を構成する金属箔を加熱
加圧成形のときに変形させ、これにくい込む。その投錨
効果が回路1表面の微細な凹凸への樹脂の流入による投
錨効果と相まって、回路1と内層絶縁層5の良好な密着
力を保持させることができるものと推測される。When the base material of the inner insulating layer 5 is a glass woven fabric, the physical binding force due to the anchoring effect is large, but when the base material is a glass nonwoven fabric, the binding force is not sufficiently large. This is presumed to be due to the following reasons. That is, since the glass non-woven fabric is bulky and has many voids, the resin that flows at the time of heat and pressure molding is preferentially used to fill the voids and does not sufficiently flow into the fine irregularities on the surface of the circuit 1 ( It is hard to flow in).
Based on such knowledge, in the multilayer printed wiring board according to the present invention, the resin of the inner insulating layer 5 contains an inorganic filler, which is sufficiently larger than the fine irregularities on the surface of the circuit 1. The material particles deform the metal foil forming the circuit 1 during the heat and pressure forming, and the metal particles are hard to be included. It is presumed that the anchoring effect is combined with the anchoring effect due to the resin flowing into the fine irregularities on the surface of the circuit 1, and the good adhesion between the circuit 1 and the inner insulating layer 5 can be maintained.
この場合、内層絶縁層5の樹脂中に含有させる無機充填
材の量が5重量%に達しないと前記投錨効果を発揮でき
ない。一方、無機充填材の量が20重量%を越えると、充
填材粒子同士を結着する樹脂分が少なくなって、充填材
粒子間で剥れやすくなる。無機充填材の含有量を5〜20
重量%の範囲とすることにより、初めて回路1と内層絶
縁層5の良好な密着力を確保できるのである。In this case, the anchoring effect cannot be exhibited unless the amount of the inorganic filler contained in the resin of the inner insulating layer 5 reaches 5% by weight. On the other hand, when the amount of the inorganic filler exceeds 20% by weight, the amount of the resin that binds the filler particles to each other is small and the filler particles are easily separated. Inorganic filler content 5-20
It is possible to secure good adhesion between the circuit 1 and the inner insulating layer 5 for the first time by setting the content in the range of wt%.
また、基板2の樹脂中の無機充填材含有量が30重量%に
達しないと寸法変化を十分に抑制できず、50重量%を越
えると基板2と回路1の密着力が低下するし、絶縁抵抗
も悪くなる。尚、回路1と基板2の密着力については、
回路1を構成する金属箔の裏面を機械的に粗化して大き
な凹凸を付しておけるので、流動した樹脂が流入しやす
く、内層絶縁層5より充填材含有量が多くても、樹脂の
投錨効果を十分に期待できる。Further, if the content of the inorganic filler in the resin of the substrate 2 does not reach 30% by weight, the dimensional change cannot be sufficiently suppressed, and if it exceeds 50% by weight, the adhesive force between the substrate 2 and the circuit 1 decreases and the insulation Resistance becomes worse. Regarding the adhesion between the circuit 1 and the substrate 2,
Since the back surface of the metal foil forming the circuit 1 can be mechanically roughened to have large irregularities, the flowed resin easily flows in, and even if the content of the filler is higher than that of the inner insulating layer 5, the anchoring of the resin is performed. You can expect a sufficient effect.
実施例 以下、本発明の実施例を比較例と共に説明する。無機充
填材として、水和アルミナを使用した例を説明するが、
他の無機充填材を使用した場合も同様の傾向を示すこと
を確認している。Examples Hereinafter, examples of the present invention will be described together with comparative examples. An example of using hydrated alumina as the inorganic filler will be described.
It has been confirmed that the same tendency is exhibited when other inorganic fillers are used.
実施例1〜6、比較例1〜4 (1)エポキシシランで処理した水和アルミナ(エポキシ
シランは水和アルミナの重量に対して1%)を、それぞ
れ、3重量%(A)、5重量%(B)、10重量%
(C)、15重量%(D)、20重量%(E)、25重量%
(F)、35重量%(G)、40重量%(H)、45重量%
(I)、55重量%(J)、含有するビスフェノール型エ
ポキシ樹脂を用意した。このワニスを、水和アルミナを
含む樹脂含有量が88重量%となるようにガラス不織布
(41g/m2)に含浸乾燥し、上記水和アルミナ含有量に対
応するプリプレグ(A)〜(J)を得た。Examples 1 to 6 and Comparative Examples 1 to 4 (1) 3 wt% (A) and 5 wt% of hydrated alumina treated with epoxysilane (epoxysilane is 1% based on the weight of hydrated alumina), respectively. % (B), 10% by weight
(C), 15% by weight (D), 20% by weight (E), 25% by weight
(F), 35 wt% (G), 40 wt% (H), 45 wt%
A bisphenol type epoxy resin containing (I) and 55% by weight (J) was prepared. A glass non-woven fabric (41 g / m 2 ) was impregnated with this varnish so that the resin content containing hydrated alumina was 88% by weight, and dried to obtain prepregs (A) to (J) corresponding to the above hydrated alumina content. Got
水和アルミナを含まない上記エポキシ樹脂のワニスを、
樹脂含有量40重量%となるようにガラス織布(215g/
m2)に含浸乾燥し、プリプレグ(X)を得た。A varnish of the above epoxy resin containing no hydrated alumina,
Glass woven cloth (215 g /
m 2 ) was impregnated and dried to obtain a prepreg (X).
(2)プリプレグ(F)〜(J)のそれぞれについて、そ
の4プライの両側に35μ厚銅箔を載置して、加熱加圧成
形により内層回路板用の0.8mm厚両面銅張り積層板を得
た。銅箔は、プリプレグに面する側を機械的に粗化して
凹凸を付したものを用いた。(2) For each of the prepregs (F) to (J), a 35μ thick copper foil is placed on both sides of the 4 plies, and a 0.8mm thick double-sided copper clad laminate for inner layer circuit board is formed by heat and pressure molding. Obtained. The copper foil used was one in which the side facing the prepreg was mechanically roughened to give unevenness.
この両面銅張り積層板を常法によりエッチングして回路
形成を行ない、黒化処理により回路表面に微細な凹凸を
付して内層回路板とした。This double-sided copper-clad laminate was etched by a conventional method to form a circuit, and the surface of the circuit was finely roughened by blackening to obtain an inner layer circuit board.
(3)内層絶縁層を、プリプレグ(A)〜(F)より選択
する。上記内層回路板の両側に、(A)〜(F)より選
択したプリプレグ1プライ、プリプレグ(X)1プラ
イ、18μm厚銅箔をこの順に載置し、加熱加圧成形して
一体化した(厚さ1.6mm)。(3) The inner insulating layer is selected from prepregs (A) to (F). A prepreg 1 ply selected from (A) to (F), a prepreg (X) 1 ply, and a 18 μm thick copper foil were placed in this order on both sides of the inner layer circuit board, and heat-press formed to integrate them. Thickness 1.6mm).
(4)上記一体化した複合板に、所定パターンに合せてド
リル穴あけを行ない、常法により内層の回路と表面の銅
箔を導通するスルーホールメッキを行なった。(4) The integrated composite plate was drilled according to a predetermined pattern, and through-hole plating for conducting the inner layer circuit and the surface copper foil was conducted by a conventional method.
(5)表面の銅箔を常法によりエッチングして表面回路の
形成を行ない、4層の回路を有するプリント配線板とし
た。(5) The copper foil on the surface was etched by a conventional method to form a surface circuit to obtain a printed wiring board having four layers of circuits.
内層回路板の基板に用いたプリプレグと内層絶縁層に用
いたプリプレグの種類の組合せを、第1表、第2表に示
す。Tables 1 and 2 show combinations of the types of prepreg used for the substrate of the inner layer circuit board and prepreg used for the inner insulating layer.
実施例7 水和アルミナをエポキシシランで処理していない点を除
いて、実施例2と同様に4層のプリント配線板とした。 Example 7 A four-layer printed wiring board was prepared in the same manner as in Example 2 except that hydrated alumina was not treated with epoxysilane.
比較例5 内層回路板の基板をプリプレグ(X)4プライで構成し
た。他は実施例2と同様に4層のプリント配線板とし
た。Comparative Example 5 The substrate of the inner layer circuit board was composed of prepreg (X) 4 plies. Others were the same as Example 2, and it was set as the 4-layer printed wiring board.
実施例2と比較例5について、それぞれ3枚を重ねてド
リル穴あけをしたときの加工性を第3表に示す。Table 3 shows the workability of Example 2 and Comparative Example 5 when three of them were stacked and drilled.
また、内層絶縁層の充填材含有量と、ピール強度(内層
の回路面と内層絶縁層との密着力)の関係を第2図に示
す。内層回路板の基板の充填材含有量と基板の寸法変化
ならびに絶縁抵抗の関係を第3図に示す。寸法変化は、
エッチング→0.5/150処理前後の試料対角方向の寸法変
化率で示した。また、絶縁抵抗は、プレッシャークッカ
ー(2気圧、121℃)8時間処理後に測定した。 FIG. 2 shows the relationship between the filler content of the inner insulating layer and the peel strength (adhesion between the circuit surface of the inner layer and the inner insulating layer). The relationship between the filler content of the substrate of the inner layer circuit board, the dimensional change of the substrate and the insulation resistance is shown in FIG. The dimensional change is
Etching → The dimensional change rate in the diagonal direction of the sample before and after the 0.5 / 150 treatment is shown. The insulation resistance was measured after the pressure cooker (2 atm, 121 ° C.) treatment for 8 hours.
発明の効果 上述のように、本発明に係る多層プリント配線板は、内
層絶縁層の基材にガラス不織布を使いながら、無機充填
材の含有量を特定の範囲とすることにより、内層の回路
と内層絶縁層の良好な密着力を保持している。この密着
力は、充填材をシランカップリング剤で処理しておくこ
とにより一層良好となる。そして、内層回路板の基板の
基材にもガラス不織布を使いながら寸法安定性が良好で
あり、機械加工性が優れている点、その工業的価値は極
めて大である。EFFECTS OF THE INVENTION As described above, the multilayer printed wiring board according to the present invention, while using the glass nonwoven fabric as the base material of the inner insulating layer, by setting the content of the inorganic filler to a specific range, the inner layer circuit and It maintains good adhesion of the inner insulating layer. This adhesion is further improved by treating the filler with a silane coupling agent. Further, while using a glass nonwoven fabric as the substrate of the substrate of the inner layer circuit board, the dimensional stability is good and the machinability is excellent, and the industrial value thereof is extremely large.
第1図は本発明に係る多層プリント配線板の6層回路の
例を示す断面図、第2図は内層絶縁層の充填材含有量と
ピール強度(内層の回路面と内層絶縁層の密着力)との
関係を示す曲線図、第3図は、内層回路板の基板の充填
材含有量と寸法変化率ならびに絶縁抵抗との関係を示す
曲線図である。 1は回路、2は基板、3は表面回路、4は表面絶縁層、
5は内層絶縁層FIG. 1 is a sectional view showing an example of a 6-layer circuit of a multilayer printed wiring board according to the present invention, and FIG. 2 is a filler content and peel strength of the inner insulating layer (adhesion between the inner circuit surface and the inner insulating layer). ), And FIG. 3 is a curve diagram showing the relationship between the filler content of the substrate of the inner layer circuit board, the dimensional change rate, and the insulation resistance. 1 is a circuit, 2 is a substrate, 3 is a surface circuit, 4 is a surface insulating layer,
5 is the inner insulating layer
───────────────────────────────────────────────────── フロントページの続き (72)発明者 木村 裕光 東京都新宿区西新宿2丁目1番1号 新神 戸電機株式会社内 審査官 喜納 稔 (56)参考文献 特開 昭56−165397(JP,A) 特開 昭63−38298(JP,A) 実開 昭62−170678(JP,U) ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Hiromitsu Kimura 2-1-1, Nishishinjuku, Shinjuku-ku, Tokyo Minoru Kino, Examiner, Shin-Kindo Electric Co., Ltd. (56) , A) Japanese Unexamined Patent Publication No. 63-38298 (JP, A) Actual development No. 62-170678 (JP, U)
Claims (3)
れている内層回路板の基板を熱硬化性樹脂含浸ガラス不
織布基材で構成し、 表面回路の絶縁層(表面絶縁層)を熱硬化性樹脂含浸ガ
ラス織布基材で構成し、 前記表面絶縁層と内層回路板間の絶縁層(内層絶縁層)
を熱硬化性樹脂含浸ガラス不織布基材で構成し、 これらが加熱加圧成形により一体化されたものであっ
て、 内層回路板の基板の樹脂中に30〜50重量%の無機充填材
を含有し、 内層絶縁層の樹脂中に5〜20重量%の無機充填材を含有
した多層プリント配線板。1. A substrate of an inner layer circuit board whose circuit surface is finely roughened by a chemical treatment is composed of a thermosetting resin-impregnated glass nonwoven fabric base material, and an insulating layer (surface insulating layer) of a surface circuit is thermoset. Insulating layer between the surface insulating layer and the inner circuit board (inner insulating layer)
Is a thermosetting resin-impregnated glass non-woven fabric base material, which is integrated by heat and pressure molding, and contains 30 to 50% by weight of inorganic filler in the resin of the substrate of the inner layer circuit board. A multilayer printed wiring board containing 5 to 20% by weight of an inorganic filler in the resin of the inner insulating layer.
れている内層回路板の基板を熱硬化性樹脂含浸ガラス不
織布基材で構成し、 表面回路の絶縁層(表面絶縁層)を熱硬化性樹脂含浸ガ
ラス織布基材で構成し、 前記表面絶縁層と内層回路板間の絶縁層および複数の内
層回路板同士の間の絶縁層(内層絶縁層)を熱硬化性樹
脂含浸ガラス不織布基材で構成し、 これらが加熱加圧成形により一体化されたものであっ
て、 内層回路板の基板の樹脂中に30〜50重量%の無機充填材
を含有し、内層絶縁層の樹脂中に5〜20重量%の無機充
填材を含有した多層プリント配線板。2. A substrate of an inner layer circuit board whose circuit surface is finely roughened by chemical treatment is composed of a thermosetting resin-impregnated glass nonwoven fabric base material, and an insulating layer (surface insulating layer) of the surface circuit is thermoset. Thermosetting resin impregnated glass non-woven fabric substrate, which is made of a thermosetting resin-impregnated glass woven fabric base material, and the insulating layer between the surface insulating layer and the inner layer circuit board and the insulating layer (inner layer insulating layer) between the inner circuit boards are The resin of the inner layer circuit board contains 30 to 50% by weight of the inorganic filler in the resin of the inner layer insulating layer. A multilayer printed wiring board containing 5 to 20% by weight of an inorganic filler.
リング剤で処理されている請求項1または2に記載の多
層プリント配線板。3. The multilayer printed wiring board according to claim 1, wherein the surface of the filler of the inner insulating layer is treated with a silane coupling agent.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25452789A JPH0734506B2 (en) | 1989-09-29 | 1989-09-29 | Multilayer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25452789A JPH0734506B2 (en) | 1989-09-29 | 1989-09-29 | Multilayer printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03116894A JPH03116894A (en) | 1991-05-17 |
| JPH0734506B2 true JPH0734506B2 (en) | 1995-04-12 |
Family
ID=17266279
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25452789A Expired - Fee Related JPH0734506B2 (en) | 1989-09-29 | 1989-09-29 | Multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0734506B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4120168B2 (en) * | 2000-12-28 | 2008-07-16 | 新神戸電機株式会社 | Composite laminate and its manufacturing method |
| JP4972825B2 (en) * | 2001-04-05 | 2012-07-11 | 日立化成工業株式会社 | Printed wiring board |
| JP2013187460A (en) * | 2012-03-09 | 2013-09-19 | Sumitomo Bakelite Co Ltd | Temporary substrate for metal foil-clad substrate and manufacturing method therefor |
-
1989
- 1989-09-29 JP JP25452789A patent/JPH0734506B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03116894A (en) | 1991-05-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |