JPH0738376B2 - Projection exposure device - Google Patents

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention is formed on a reticle.
A circuit pattern etc. is pre-formed on the photosensitive substrate.
The projection exposure apparatus that performs overlay exposure on the
Any shot area and reticle pattern on the photosensitive substrate
Projection exposure that enables precise alignment with the projected image
Regarding the device .

[0002]

2. Description of the Related Art In recent years, semiconductor devices such as ICs and LSIs have been rapidly miniaturized and highly densified, and devices for manufacturing such devices, particularly masks and reticles, have a circuit pattern formed on a circuit pattern formed on a semiconductor wafer. Highly accurate exposure apparatuses are also required to be transferred in superposition. The circuit pattern on the mask and the circuit pattern on the wafer are required to be superimposed with an accuracy of, for example, 0.1 μm or less,
Therefore, at present, such an exposure apparatus exposes a mask circuit pattern to a local region (for example, one chip) on the wafer, and then advances the wafer a certain distance (stepping) to expose the mask circuit pattern again. A so-called step-and-repeat type apparatus, which repeats the above-mentioned steps, in particular, a reduction projection type exposure apparatus (stepper) has become the mainstream.
In this step-and-repeat method, the wafer is placed on a stage that moves two-dimensionally and positioned with respect to the projected image of the circuit pattern of the mask, so that the projected image and each chip on the wafer can be precisely overlapped. it can. Further, in the case of a reduction type exposure apparatus, a through-the-lens that directly observes or detects a mark for alignment provided on a mask or reticle and a mark attached to a chip on a wafer by directly observing or detecting the mark. System alignment method and the off-axis alignment method that sends the wafer directly below the projection lens after aligning the entire wafer using a positioning microscope provided at a fixed distance from the projection lens. There are two methods.

[0003]

Generally, in the through-the-lens method, since alignment is performed for each chip on a wafer, overlay accuracy is high, but there is a problem that the exposure processing time for one wafer becomes long. . In the case of the male axis method, once the alignment of the entire wafer is completed, the wafer is simply stepped according to the arrangement of chips, so the exposure processing time is shortened. However, since alignment is not performed for each chip, satisfactory overlay accuracy cannot always be obtained due to the effects of expansion and contraction of the wafer, rotation error of the wafer on the stage, and orthogonality of movement of the stage itself.

[0004] The present invention is, against the all of the plurality of chips arranged on a photosensitive substrate such as a wafer (shot area)
Typical shot area without performing mark detection
Mark detection only on the reticle
Precisely the turn projection image and each shot area on the photosensitive substrate
An object of the present invention is to provide a projection exposure apparatus capable of alignment .

[0005]

SUMMARY OF THE INVENTION The present invention provides a plurality of shock absorbers.
Area (Cn) and alignment marks (SXn, S
Yn) and a photosensitive substrate (WA) having
A substrate stage (2, 2 that moves two-dimensionally within the standard (x, y)
3) and the optical axis (AX) passes at a predetermined position in the Cartesian coordinate system.
And the projection optical system (1)
It has a detection center point (LXS, LYS) at a predetermined position
Mark detecting means (9, 1) for detecting the mark position on the substrate
0, 30-38, 41-48) and the detected mark position
Any shot area on the photosensitive substrate is projected based on
Substrate so that it is aligned with the optical axis of the optical system
Control means (5, 6, 5) for controlling the moving position of the stage
0) and the projection exposure apparatus. Further departure
In the clear, shot designation means (for example, keyboard
Position), shot position measuring means (50, 103, 10
4), the first calculation means (108), and the second calculation means (1)
Each means of 07) is provided. Where the shot
The designating means is a shot arrangement with the center of the photosensitive substrate as the origin.
Shots located in each of the four quadrants of the column coordinate system (αβ)
Finger as an alignment shot
Shot position measurement means
Each mark of the element shot is detected by the mark detection means.
Move the substrate stage to detect and align
Measurement value corresponding to each actual coordinate position of the shot
(Hxn, Hyn) is measured. And the first operation
The means is the design coordinate value of each shot area on the photosensitive substrate.
(Dxn, Dyn), and a predetermined error parameter is (a11, ayn
12, a21, a22, Ox, Oy) on the photosensitive substrate
Any one shot area of is relative to the optical axis of the projection optical system
Coordinate values of the substrate stage that are aligned
(Fxn, Fyn) is calculated based on an arithmetic expression of Fxn = a11.Dxn + a12.Dyn + Ox Fyn = a21.Dxn + a22.Dyn + Oy.
Is the measured value (Hxn, Hyn) and the corresponding design coordinate value
(Dxn, Dyn) and before the execution of the first calculation means
Of the parameters at least a11, a12, a21, a22
Calculating each value is also of a. Further, in the second invention,
In addition to the configuration described above, the measured actual value becomes a standard value (example
For example, twice the accuracy of global alignment)
If they are not aligned, the alignment show
The actual measurement value from another shot area adjacent to
The configuration to instruct is added.

[0006]

According to the present invention, a plurality of substrates on a substrate such as a wafer are
At least four elephants in the array coordinate system out of the range
4 or more including the shot areas located in each of the
I tried to get the actual value as a liment shot
And the error parameter A determined by the second calculation means
(A11, a12, a21, a22) are shot arrays on the substrate
The orthogonality, expansion and contraction, and rotation error of
Become. Therefore, according to the present invention, the alignment error is small on average for all of the plurality of chip patterns (shot areas) formed on the substrate, and the number of non-defective chips obtained from one substrate increases. Such an effect can be obtained. Also, set each of the multiple areas on the substrate to the exposure center point.
On the other hand, when performing sequential alignment, the stage is simply moved based on the estimated values from the measured coordinate positions of several areas. Therefore, the coordinate position is measured for each area on the substrate and then the alignment is performed. It has a feature that the throughput is higher than that. Furthermore, the coordinate positions of several measured areas are calculated, and a unique relational expression
= A · Dn + O) error parameter A is determined, but mechanical or electrical random errors that occur when moving sequentially on the stage during actual measurement are averaged by calculation, The parameter A also has the advantage that it is unlikely to be affected by such random components.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a perspective view showing the schematic construction of a reduction projection type exposure apparatus suitable for carrying out the method of the present invention.
The reticle R, which is the projection original plate, is positioned in such a manner that its projection center passes through the optical axis of the projection lens 1 and is mounted on the apparatus. The projection lens 1 reduces the circuit pattern image drawn on the reticle R to 1/5 or 1/10 and projects it onto the wafer WA. The wafer holder 2 is provided so as to vacuum-suck the wafer WA and to be finely rotatable with respect to the stage 3 which is two-dimensionally moved in the x direction and the y direction. The drive motor 4 is fixed on the stage 3 and rotates the wafer holder 2. The movement of the stage 3 in the x direction is performed by driving the motor 5, and the movement of the stage 3 in the y direction is performed by driving the motor 6. A reflection mirror 7 having a reflection plane extending in the y direction and a reflection mirror 8 having a reflection plane extending in the x direction are fixedly provided on two sides of the stage 3 which are orthogonal to each other. A laser light wave interferometer (hereinafter simply referred to as a laser interferometer) 9 projects laser light onto a reflection mirror 8 to detect the position (or movement amount) of the stage 3 in the y direction, and the laser interferometer 10 reflects the laser light. Laser light is projected onto the mirror 7 to detect the position (or movement amount) of the stage 3 in the x direction. Off-axis type wafer alignment microscopes (hereinafter referred to as WAMs) 20 and 21 are provided on the side of the projection lens 1 in order to detect (or observe) alignment marks on the wafer WA. . The WAM 21 is located after the projection lens 1 in FIG. 1 and is not shown. The WAMs 20 and 21 each have an optical axis parallel to the optical axis AX of the projection lens 1,
A band-shaped laser spot light YSP elongated in the x direction,
The image of θSP is formed on the wafer WA. (Spot light YS
P and θSP are not shown in FIG. ) These spot lights Y
SP and θSP are light having a wavelength that does not expose the photosensitive agent (photoresist) on the wafer WA to light, and in the present embodiment, they vibrate in the y direction with a minute amplitude. And WAM 20, 2
Reference numeral 1 denotes a mark having a photoelectric element that receives scattered light or diffracted light from the mark and a circuit that synchronously rectifies the photoelectric signal at the oscillation cycle of the spot light, and is a mark with respect to the vibration center of the spot light θSP (YSP) in the y direction. An alignment signal corresponding to the amount of shift in the y direction is output. Therefore, the WAMs 20 and 21 have the same structure as a so-called spot light vibration scanning type photoelectric microscope.

The present apparatus is provided with a laser step alignment (hereinafter referred to as LSA) optical system for detecting a mark on the wafer WA via the projection lens 1. A laser light flux L generated from a laser light source (not shown) and passed through an expander (not shown), a cylindrical lens, etc.
B is light having a wavelength that does not expose the photoresist, and is incident on the beam splitter 30 to be split into two light beams. One of the laser light fluxes is reflected by the mirror 31, passes through the beam splitter 32, and is converged by the imaging lens group 33 so as to be a spot light having a belt-shaped cross section. The light is incident on the first folding mirror 34 arranged so as not to block the projection optical path of the circuit pattern. The first folding mirror 34 reflects the laser light beam upward toward the reticle R. The laser light flux is provided below the reticle R, enters a mirror 35 having a reflection plane parallel to the surface of the reticle R, and is reflected toward the center of the entrance pupil of the projection lens 1. The laser light flux from the mirror 35 is converged by the projection lens 1, and the wafer WA
An image is formed as a strip-shaped spot light LYS elongated in the x direction on the upper side. The spot light LYS is used to relatively scan the diffraction grating mark extending in the x direction on the wafer WA in the y direction and detect the position of the mark. When the spot light LYSW illuminates the mark, diffracted light is generated from the mark. The optical information returns to the projection lens 1, the mirror 35, the mirror 34, the imaging lens group 33, and the beam splitter 32 again, is reflected by the beam splitter 32, and is an optical element 3 including a condenser lens and a spatial filter.
It is incident on 6. This optical element 36 transmits the diffracted light (first-order diffracted light or second-order diffracted light) from the mark, and specularly reflected light (0
The secondary diffracted light is blocked, and the diffracted light is condensed on the light receiving surface of the photoelectric element 38 via the mirror 37. The photoelectric element 38 outputs a photoelectric signal according to the amount of condensed diffracted light. As described above, the mirror 31, the beam splitter 32, the imaging lens group 33, the mirrors 34 and 35, the optical element 36, the mirror 37,
The photoelectric element 38 constitutes a through-the-lens alignment optical system (hereinafter referred to as a Y-LSA system) that detects the position of the mark on the wafer WA in the y direction.

On the other hand, another laser beam split by the beam splitter 30 is incident on a through-the-lens type alignment optical system (hereinafter referred to as X-LSA system) for detecting the position of the mark on the wafer WA in the x direction. To do. X-LSA
The system is exactly the same as the Y-LSA system, including a mirror 41, a beam splitter 42, an imaging lens group 43, and mirrors 44, 4.
5, an optical element 46, a mirror 47, and a photoelectric element 48, and forms an image of a strip-shaped spot light LXS elongated in the y direction on the wafer WA.

The main controller 50 inputs the photoelectric signals from the photoelectric elements 38 and 48, the alignment signals from the WAMs 20 and 21, and the position information from the laser interferometers 9 and 10, and performs various calculations for alignment. In addition to performing the processing, it outputs a command for driving the motors 4, 5, and 6. The main controller 50 includes an arithmetic processing unit such as a microcomputer or a minicomputer, and the arithmetic processing unit includes design position information (chip array coordinate values on the wafer WA) of a plurality of chips CP formed on the wafer WA. Etc.) are stored.

FIG. 2 shows the WAMs 20 and 21 and the Y-LSA.
System, spot light θSP, YSP, L by X-LSA system
FIG. 6 is a plan view showing the arrangement relationship on the image plane (the same as the surface of the wafer WA) of the projection lens 1 of YS and LXS. Figure 2
In, when the coordinate system xy with the optical axis AX as the origin is defined, the x-axis and the y-axis represent the moving direction of the stage 3, respectively. In FIG. 2, a circular area centered on the optical axis AX is an image field if, and a rectangular area inside thereof is a projected image Pr of the effective pattern area of the reticle R. The spot light LYS is formed at a position outside the projection image Pr in the image field if and coincides with the x-axis,
The spot light LXS is also formed at a position outside the projection image Pr in the image field if and coincides with the y-axis. On the other hand, the vibration centers of the two spot lights θSP and YSP are aligned on a line segment (parallel to the x-axis) 1 separated from the x-axis by the distance Y _{0 in the} y-direction, and the distance Dx in the x-direction is equal to the wafer. It is defined to be a value smaller than the diameter of WA. In this device, spot light θSP, YSP
Are arranged symmetrically with respect to the y-axis, and the main controller 50 controls the spot light θSP, Y for the projection point of the optical axis AX.
It stores information about the position of the SP. Further, main controller 50 causes spot light LY with respect to the projection point on optical axis AX.
Center position (distance Xl) of S in the x direction and spot light LXS
It also stores information about the center position (distance Yl) in the y direction.

Next, the position according to the present invention using this device
FIG. 3 is a flowchart showing the matching method together with the operation of the apparatus.
This will be explained using the figure. Note that this alignment is performed on the wafer WA.
Of the wafer W
Chip and alignment mark already formed on A
Has been done. First, the wafer WA is not shown in step 100.
Using the shown pre-alignment equipment, straight line of wafer WA
Rough so that the notch (flat) is oriented in a certain direction
Positioned. The flat of the wafer WA is shown in FIG.
Thus, it is positioned so as to be parallel to the x-axis. next
In step 101, the wafer WA is the wafer wafer of stage 3.
It will be transported onto the ruder 2 and the flat will remain parallel to the x-axis.
Is placed on the wafer holder 2 and is vacuum-adsorbed.
The wafer WA has a plurality of chips as shown in FIG.
Along the orthogonal array coordinate αβ on the wafer WA.
It is formed in a matrix. Α axis of array coordinate αβ
Is almost parallel to the flat of the wafer WA. In FIG.
Wafer with array coordinate αβ representative of the number of chips Cn
Chips C lined up in a line on the α axis that passes through the center of the WA₀
~ C₆It represents only. Each chip C₀~ C₆To it
Four alignment marks GY, Gθ, SX, S respectively
Y is additionally provided. Now chip C₀~ C₆of
Center chip C₃When the center of is the origin of array coordinate αβ
On the α-axis, a diffraction grating-shaped mark extending linearly in the α-direction.
SY₀~ SY₆But each chip C₀~ C₆Installed on the right side of
It has been burned. Also, chip C₃On the β axis passing through the center of
Is a diffraction grating mark SX linearly extending in the β direction₃Is
Up C₃Other chip C provided below₀, C₁, C
₂, C_Four, C _Five, C₆Similarly for the center of the chip
Mark SX on the line parallel to the β-axis ₀~ SX₂, SX
_Four~ SX₆Is provided. These marks SY_n, S
X_nDetected by spot lights LYS and LXS respectively
It is what is done. In addition, each chip C₀~ C₆Below
Overall alignment of wafer WA (Global Alignment
GY used to do₀~ GY₆, Gθ
₀~ Gθ₆Is provided. These marks GY_n, G
θ_nIs a diffraction that extends linearly in the α direction on a line segment parallel to the α axis.
It is formed in a pattern on a lattice. Further in the α direction
Chips C lined up in a row₀~ C₆Of these, for example, the leftmost
C₀Mark GY₀And the right tip C₆Mark Gθ
₆The spacing in the α direction between
It is set so as to match the distance DX between the light .theta.SP and YSP.
Has been. That is, in this embodiment, two marks are separated from each other.
GY₀And mark Gθ₆With off-axis method
Perform global alignment of HA. Because of this
Other marks GY₁~ GY₆, Mark Gθ₀~ Gθ_FiveIs a book
It is unnecessary and may not be required. In short, the α axis of the wafer WA
Elongated in the α direction on parallel (or coincident) line segments
It is only necessary that the two marks are separated by the distance DX.

Now, the main control unit 50 determines the position information of the stage 3 when the wafer WA is received from the pre-alignment unit, and the marks GY ₀ and Gθ ₆ are W based on the position information.
Information such as the moving direction and the moving amount of the stage 3 until it is positioned within the detection (observation) field of view of the AMs 21 and 20 is stored in advance as constants unique to the apparatus. Then, the next step 102
In, the main controller 50 first drives the motors 5 and 6 to position the stage 3 so that the mark GY ₀ is located within the detection field of view of the WAM 21. After that, main controller 50 controls stage 3 based on the alignment signal from WAM 21 and the position information from laser interferometer 9 so that the center of vibration of spot light YSP coincides with the center of mark GY _{0 in} the y direction. Precise positioning in the direction. When the vibration center of the spot light YSP and the center of the mark GY ₀ coincide with each other, the main controller 50 keeps the state so that the motor 6 is servo (feedback) controlled by the alignment signal from the WAM 21 and the mark Gθ _{6 is} maintained. Is WA
The motor 4 is driven to rotate the wafer holder 2 as detected by the spot light θSP of M20. Furthermore the main control unit 50 so that the center of the y direction of the vibration center of the mark Jishita ₆ spotlight θSP match, WAM2
The motor 4 is servo-controlled by the alignment signal from 0. Through the above series of operations, the spot light YSP and the mark GY ₀ match, the spot light θSP and the mark Gθ ₆ match, and the moving coordinate system of the stage 3, that is, the coordinate system xy.
The rotation deviation of the array coordinate αβ of the wafer WA with respect to is corrected, and the coordinate system xy and the array coordinate αβ in the y direction (β
The association (prescription) regarding the position of the (direction) is completed. Next, as the mark SX ₃ chips C ₃ in the center portion on the wafer WA is scanned by the X-LSA system of the spot light LXS, after positioning the stage 3 is moved in the x direction. At this time, the main controller 50 moves the x direction of the wafer WA when the mark SX ₃ coincides with the spot light LXS based on the time-series photoelectric signal from the photoelectric element 48 and the position information from the laser interferometer 10. The position is detected and stored. As a result, the coordinate system xy and the array coordinate αβ x
The association regarding the position in the direction (α direction) is completed.
It should be noted that this association in the x direction is based on XL
It is not necessary when using SA system. Through the above operation, the global alignment of the wafer WA (corresponding the array coordinates αβ to the coordinate system xy) mainly for the off-axis type alignment is completed. In the conventional method, the main controller 50 is based on the array design value of each chip on the wafer WA (the central coordinate value of the chip at the array coordinate αβ).
Reads the position information from the laser interferometers 9 and 10, positions the stage 3 by the step-and-repeat method (addressing) so that the projection image Pr of the reticle R overlaps the chip, and then exposes (prints) the chip. )I do.

However, by the time the global alignment is completed, the accuracy of the alignment detection system, the setting accuracy of each spot light, or the position detection accuracy due to the optical or geometrical state of each mark on the wafer WA (influence of the process). Errors occur due to variations, etc., and the wafer WA chips are precisely aligned (addressing) according to the coordinate system xy.
It is not always done. Therefore, in the embodiment of the present invention, it is assumed that the error (hereinafter referred to as shot address error) is caused by the following four factors.

(1) Rotation of wafer: This occurs because the positional relationship between the two spot lights YSP and θSP, which serve as a reference for alignment, is not correct when the wafer WA is rotationally corrected, for example. It is represented by the residual rotation error amount θ of the array coordinate αβ with respect to the system xy. (2) Orthogonality of the coordinate system xy; this is caused by the fact that the feed directions are not exactly orthogonal by the motors 5 and 6 of the stage 3, and is represented by the orthogonality error amount w.

(3) Linear expansion / contraction of the wafer in the x (α) direction and the y (β) direction; this may cause the entire expansion / contraction of the wafer WA due to the processing process of the wafer WA. For this reason, the actual chip position deviates from the designed array coordinate value of the chip in the α and β directions by a small amount, which is particularly remarkable in the peripheral portion of the wafer WA. The amount of expansion and contraction of the entire wafer is represented by Rx and Ry in the α (x) direction and the β (y) direction, respectively. Where Rx is the ratio of the measured value between the two points in the x direction (α direction) on the wafer WA and the design value, and Ry is the measured value of the distance between the two points in the y direction (β direction) on the wafer WA. And the design value. Therefore,
When both Rx and Ry are 1, there is no expansion / contraction.

(4) Offsets in the x (α) direction and the y (β) direction; this is due to the detection accuracy of the alignment system, the positioning accuracy of the wafer holder 2, etc., so that the wafer WA as a whole is minute in the x and y directions. It is caused by a shift in the amount, and is represented by offset amounts Ox and Oy. In FIG. 4, the residual rotation error amount θ of the wafer WA and the orthogonality error amount w of the stage 3 are exaggerated.

In this case, the Cartesian coordinate system xy is actually an oblique coordinate system xy 'inclined by a minute amount w, and the wafer WA is rotated by θ with respect to the Cartesian coordinate system xy. When the error factors (1) to (4) are added, the shot position (Fxn, Fy) to be actually positioned for the shot (chip) at the coordinate position (Dxn, Dyn) in design.
n) is represented as follows, where n is an integer and represents a shot (chip) number.

[0019]

[Equation 1]

Since w is originally a minute amount and θ is also driven to a minute amount by global alignment, equation (1) is expressed by equation (2) when the first-order approximation is performed.

[0021]

[Equation 2]

From this equation (2), the positional deviation (εxn, εyn) from the design value at each shot position is given by the equation (3).
It is represented by.

[0023]

[Equation 3]

Now, when the equation (2) is rewritten as a matrix arithmetic expression, it becomes as follows.

[0025]

[Formula 4] Fn = A · Dn + O

[0026]

[Equation 5]

[0027]

[Equation 6]

[0028]

[Equation 7]

[0029]

[Equation 8]

Therefore, when the actual shot (chip) position is measured by detecting the mark and the measured value is detected as Hn, the positional deviation from the shot position Fn to be positioned, that is, the address error En (= Hn-Fn). ) To minimize the error parameter A (transform matrix), O
Determine the (offset). If the least squares error is taken as the evaluation function, the address error E is expressed by the equation (9).

[0031]

[Equation 9]

Therefore, the error parameters A and O are determined so as to minimize the address error E. However, in Expression (9), m represents the number of actually measured chips among the plurality of chips on the wafer WA. Now, when obtaining the error parameters A and O,
If the least squares method is used, the amount of calculation is large as it is, so the error parameter O (Ox, Oy) is separately determined in advance. Offset amount (Ox, O
Since y) is a global offset value of the wafer WA, it is advisable to use a value obtained by averaging the address error with respect to the design value (Dxn, Dyn) by the number m of the actually measured chip positions Hn on the wafer WA.

[0033]

[Equation 10]

[0034]

[Equation 11]

By the way, the shot position Fn to be positioned
Of the error En between the measured value Hn and the measured value Hn, the component Exn in the x direction
Is from equation (4) to equation (8),

[0036]

Exn = Hxn−Fxn = Hxn−a ₁₁ Dxn−a ₁₂ Dyn−Ox, and the y direction component Eyn of the error En is similarly

[0037]

[Equation 13] Eyn = Hyn-Fyn = Hyn-a ₂₁ Dxn-a ₂₂ Dyn-Oy. Therefore, when the error parameter A is determined so as to minimize the error E of the equation (9), the elements a11, a12, a2
1 and a22 are as follows.

[0038]

[Equation 14]

[0039]

[Equation 15]

[0040]

[Equation 16]

[0041]

[Equation 17]

When the elements a11, a12, a21, a22 are obtained, the linear expansion / contraction amounts Rx, Ry, the residual rotation error amount θ, and the orthogonality error amount w can be immediately obtained from the equation (6).

[0043]

(18) Rx = a11

[0044]

Ry = a22

[0045]

[Equation 20] θ = a21 / Ry = a21 / a
22

[0046]

[Equation 21] w = − (a21 / Ry) − (a
12 / Rx) =-(a21 / a22)-(a12 / a1)
1) Therefore, in order to determine the error parameters A and O, X-LSA and Y-LS are applied to some (four or more) chips on the wafer WA after the completion of global alignment.
Using the chip design values (Dxn, Dyn) in which the positions of the marks SXn, SYN are measured using the A system, the formula (1
The operations of 0), (11), (14) to (17) may be performed.

Therefore, returning to the flowchart of FIG. 3, the description of the operation will be continued. Main controller 50 measures the positions of a plurality of chips on wafer WA after the global alignment is completed. First, in step 103, main controller 50 positions stage 3 based on the array design value so that X-LSA spot light LXS is aligned in parallel with mark SX0 attached to chip C0 at the left end in FIG. , Stage 3 so that the mark SX0 crosses the spot light LXS.
Is moved (scanned) in the x direction by a fixed amount. During this movement, main controller 50 stores the time-series photoelectric signal waveform of photoelectric element 48 in association with position information in the x direction from laser interferometer 10, and stores mark SX0 and spot light LXS from the waveform state. Position x0 when and match in the x direction
To detect. Next, the main controller 50 returns Y in step 104.
The stage 3 is positioned based on the array design value so that the LSA spot light LYS is aligned in parallel with the mark SY0 attached to the chip C0. After that, the stage 3 is moved in the y direction by a certain amount so that the mark SY0 crosses the spot light LYS. At this time, main controller 50 stores the time-series photoelectric signal waveform of photoelectric element 38 in association with the position information in the y direction from laser interferometer 9, and stores mark SY0 and spot light LYS from the waveform state. The position y0 at the time when the directions match is detected. And the main controller 5
In step 0, it is determined in step 105 whether or not similar positions have been detected for m chips, and if not, the process proceeds to step 106 to move the stage 3 to another chip on the wafer WA based on the array design value. Then, the same position detecting operation is repeated from step 103. In the present embodiment, for example, as shown in FIG. 5, four chips C0, C6, C7, C8 and a central chip C3 located at substantially equal distances from the center of the wafer WA along the respective axes of the array coordinate αβ, a total of five chips are provided. It is assumed that the position detection in steps 103 and 104 is performed for each of the two chips. Therefore, in step 105, m =
When it is determined to be 5, the main controller 50 stores five measured values (Hxn, Hyn). That is, (Hx1, Hy1) = (x0, y0) ... Chip C0 (Hx2, Hy2) = (x3, y3) ... Chip C3 (Hx3, Hy3) = (x6, y6) ... Chip C6 (Hx4, Hy4) = (x7, y7) ... Chip C7 (Hx5, Hy5) = (x8, y8) ... Five actually measured values of chip C8 are sequentially detected. When the five actual measurement values are detected, if the actual measurement value of a certain chip is significantly different from the design value (Dxn, Dyn) of that chip, for example, it is different by more than twice the positioning accuracy determined by global alignment. In such a case, the measured value of the chip may be ignored and the mark position of the chip adjacent to the chip may be measured, for example. This is because when the mark of the chip to be actually measured happens to be deformed by the processing process, if dust is attached to the mark, the contrast of the optical image of the mark (the generated intensity of diffracted light) is weak, and the S of the photoelectric signal is reduced. As a method of compensating the accuracy deterioration of the position measurement that occurs when the / N ratio is low, etc., in addition to 6 chips or more in advance, for example, chips located in each of the four quadrants of αβ in the array coordinates in FIG. The position measurement is performed on a total of nine chips, and the design value (Dxn, Dy of each chip is selected from the nine measured values.
There is a method of selecting five measured values in the order closest to n), or a method of not using the measured values (Hxn, Hyn) that are greatly different from the design values (Dxn, Dyn) for the subsequent arithmetic processing. .

Next, in step 107, the main controller 50 calculates the equations (10), (11) and (14) to (1).
The error parameters A and O are determined based on 7). In making this determination, main controller 50 has preselected five design values for each chip from which the above-mentioned five measured values have been detected.
The design value (Dxn, Dyn) is stored as follows.

(Dx1, Dy1) = (x0 ′, y0 ′) ... Chip C0 (Dx2, Dy2) = (x3 ′, y3 ′) ... Chip C3 (Dx3, Dy3) = (x6 ′, y6) ') ... chip C6 (Dx4, Dy4) = (x7', y7 ') ... chip C7 (Dx5, Dy5) = (x8', y8 ') ... chip C8 Also, the actual error parameter A, 5 before O's decision
Each time position measurement (so-called step alignment) of one chip is completed, for example, while moving the stage 3 in step 106 of FIG. 3, equations (10), (11), (1
It is possible to execute some of the operations 4) to 17) at the same time. That is, equations (10), (11), (14)
In (17), the arithmetic element representing the algebraic sum of the data (measured value, design value) for each chip is sequentially added every time the measurement (step alignment) of one chip is completed. The calculation elements are as follows.

[0050]

[Equation 22]

Further, among these arithmetic elements, the wafer WA
If the chip to be actually measured is determined in advance and there is no change, steps 103, 104, 105, 1 in FIG. 3 for the calculation element including only the design value (Dxn, Dyn).
It is also possible to calculate it before executing 06. In this way, if some calculations are performed in parallel with the measurement operation of the actual measurement value, the total alignment time will not be so long. Then, at the stage where the five measured values are obtained, the main controller 50 uses the results of the above-described calculation elements to calculate equations (10), (1
After calculating the offset amount (Ox, Oy) in 1), using the offset value and the result of the above calculation element, the elements a11, a12, a2 of the array are further expressed by the equations (14) to (17).
1, a22 is calculated. Since the error parameters A and O are determined by the above arithmetic operation, the wafer WA is calculated by using the above equation (4) in the next step 108 of the main controller 50.
The position to be positioned for each chip of, ie, the shot address (Fx corrected by the error parameter
n, Fyn) is calculated, and a chip array map (shot address table) corrected with respect to the design value (Dxn, Dyn) is created on the storage means (semiconductor memory). This array map is, for example, the position (Fx
0, Fy0) and the position (Fx1, Fx1 with respect to the chip C1.
y1), ..., Each position data is stored corresponding to the chip number.

Next, the main controller 50 uses the step 10 of FIG.
At 9, the stage 3 is positioned (addressing) by the step-and-repeat method according to the stored array map. As a result, the chip on the wafer WA and the projection image Pr of the reticle R are accurately overlapped with each other, and in the next step 110, the projection image Pr is exposed (printed) on the chip.
To do. When the exposure of all the chips on the wafer WA is not completed in step 111, the step and repeat operation is repeated from step 109 again. If it is determined in step 111 that the exposure of all the chips on the wafer WA has been completed, the next step 112 is the wafer WA.
Is unloaded, and the exposure process for one wafer is completed.

As is clear from the embodiments of the present invention described above, the larger the number of chips to be step-aligned on the wafer WA, the higher the measurement accuracy, but the longer the measurement time. Therefore, it is desirable to select five chips for step alignment as shown in FIG. 5, in order to reduce the measurement time and improve the measurement accuracy. However, when the minimum line width of the circuit pattern for overlay exposure is not so thin (for example, 2 to 5 μm) and it is not necessary to increase the measurement accuracy, the wafer W
Three chips on A that are separated from each other (eg C0, C6,
It is sufficient to perform step alignment (chip position measurement) for C7), and the measurement time is further shortened.
Further, at the time of step alignment, instead of detecting both the x-direction position and the y-direction position of each chip, the marks SXn associated with the plurality of chips to be step-aligned are collectively detected by the X-LSA spot light LXS. Relative scanning (stage scanning) to detect only the position of each chip in the x direction, and then each mark SYn of each chip is collectively scanned with the spot light LYS of the Y-LSA system to move in the y direction of each chip. You may make it detect a position. With this configuration, when there are a plurality of chips to be measured in the same column or row on the chip array, the position measurement can be performed at a higher speed than the position detection in the x direction and the y direction for each chip. Can be expected.

If the main controller 50 inputs data for arbitrarily selecting which chip on the wafer WA is to be step-aligned from a keyboard device (not shown), it changes depending on the processing conditions of the wafer WA. It is possible to more flexibly cope with the surface condition (particularly the mark shape) that is changed, and it is expected to improve the accuracy of position measurement.
In addition, the offset amount (O using equations (10) and (11)
In determining (x, Oy), for example, only the position measurement result of the chips within the specified range from the center of the wafer WA may be used. The designated range is, for example, set within a circle having a diameter half the diameter of the wafer WA,
It is advisable to arbitrarily change the size of the range according to the accuracy characteristics of the exposure apparatus (reduction projection type, unit magnification projection, stepper such as proximity) when the chips and marks are formed on the wafer WA.

In this embodiment, the equation (4) is applied to all the chips of the wafer WA to perform the step-and-repeat type addressing.
The expression (4) can be applied in the same manner to so-called block alignment in which the surface of is divided into several regions (blocks) and optimal alignment is performed for each individual block. For example, in FIG. 5, four chips located in each quadrant of the array coordinate αβ and five chips C0, C3, C6, C7, and C8 shown in FIG. After detecting the actual measurement value of the position of, the error parameters A and O are determined using the equations (10), (11), (14) to (17) for each quadrant of the array coordinate αβ, and the equation ( Using 4),
The position (Fxn, Fyn) is calculated. For example, for the block of the first quadrant of αβ in array coordinates, the first
Equation (4) is determined using the measured values of one chip in the quadrant and four chips C3, C6 and C7, and the second
For the block in the quadrant, the equation (4) is determined by using the measured values of one chip in the second quadrant and four chips C0, C3, and C7. Then, at the time of actual exposure, the chip on the wafer WA is aligned with the projection image Pr based on the shot position (Fxn, Eyn) from the equation (4) determined for each block. In this way, it is possible to reduce defects in position detection and alignment due to non-linear elements on the wafer, and unlike conventional block alignment, it is possible to form blocks while leaving the averaging element, so that overlapping in each block is possible. The advantage is that the alignment accuracy is almost the same for all chips. Not only that, but also when used in combination with an exposure apparatus other than the stepper, particularly a mirror projection exposure apparatus, a great advantage can be obtained. Generally, a chip array of a wafer baked by a mirror projection exposure apparatus is often curved. Therefore, when overlay exposure is performed on the wafer by the stepper (mixed use; mix and match), if the block alignment as described above is performed, the curvature of the chip array in each block becomes so small that it can be ignored. Printing with extremely high overlay accuracy can be performed over the entire surface of the wafer.

As described above, in the exposure apparatus suitable for the embodiment of the present invention, the spot light of the laser is applied to the mark on the wafer WA to detect the position of the mark (chip). To observe (detect) the alignment system for performing simple vibration or linear scanning at a constant speed, or the mark on the reticle R and the mark on the wafer WA by meeting with a microscope objective lens arranged above the reticle R. An exposure apparatus using a so-called die-by-die alignment optical system for performing alignment by using the same method can be performed in exactly the same manner. In this case, if the reticle R is not finely moved in the x and y directions for alignment during die-by-die alignment, the projected image of the mark on the reticle R becomes the spot lights LXS and LYS of this embodiment. It will be equivalent. In the case of the method of slightly moving the reticle R, first, the reticle R is accurately set to the origin position and set. Then, during step alignment (measurement) of a plurality of chips, after stepping the stage according to the array design value, the reticle R
By finely moving the reticle R so that the mark and the mark of the chip to be measured have a predetermined positional relationship, and detecting the amount of movement of the reticle R in the x and y directions from the origin,
The actual measurement value (Hxn, Hyn) of the position of the chip can be calculated.

In this embodiment, the offset amount (Ox, O
Although y) is separately obtained, the arithmetic processing is simplified. However, the error parameters A and O that minimize the address error E in Expression (9) are calculated by strict arithmetic processing. It goes without saying that it is good.

[0058]

As described above, according to the present invention, the alignment error is small on average for all of a plurality of chip patterns on a substrate to be processed such as a wafer, and a non-defective product that can be obtained from one substrate to be exposed. The number of chips is increased, and the productivity of semiconductor devices can be improved. In addition, the positions of several chips on the substrate to be exposed are measured (step alignment), that is, the position measurement using the mark of the same shape is repeated a plurality of times. It also has the advantage of reducing random errors.
Further, the variation in the sensitivity of the alignment sensor (microscope) for position detection is suppressed by statistical processing, and the overall alignment accuracy is improved. Further in the present invention
Is the alignment shot area to be measured
In each of the four quadrants in the shot array coordinate system with the origin as
Shot array because there are 4 or more including those located
Error parameters a11, a12, calculated when specifying
a21 and a22 are the orthogonality of the array, expansion / contraction, and rotation errors.
It will be reflected accurately. Furthermore, in the present invention, it is specified in advance.
The measured value obtained from the aligned shot area
If there is a large difference, the measured value of another adjacent shot area
Was used instead, so the actual shot on the substrate
The layout of the shot array does not become extremely biased,
The physical tendency can be reflected in the error parameter
It

[Brief description of drawings]

FIG. 1 is a perspective view showing a schematic configuration of a reduction projection type exposure apparatus suitable for an embodiment of the present invention.

FIG. 2 is a plan view showing a positional relationship between respective detection centers of an alignment system in the apparatus shown in FIG.

FIG. 3 is a flowchart showing an overall operation procedure using the alignment method of the present invention.

FIG. 4 is a plan view of a wafer suitable for alignment and exposure using the apparatus of FIG.

FIG. 5 is a plan view of a wafer showing the positions of chips for step alignment.

[Explanation of symbols for main parts]

WA ... Wafer, CP, Cn ... Chip, αβ ...
Array coordinates, 103, 104 ... Actual measurement process by step alignment, 107 ... process for determining error parameter, 108, 109, 110, 111 ... Step and step along corrected actual chip array coordinates Positioning process using repeat method.

Claims (2)

[Claims] 1. A photosensitive substrate having a plurality of shot areas two-dimensionally arranged according to a predetermined arrangement coordinate system, and alignment marks attached to each of the plurality of shot areas, wherein the arrangement coordinate system A reticle pattern, which is arranged so that the optical axis passes at a predetermined position in the orthogonal coordinate system and a substrate stage that is held so as to be substantially parallel to the predetermined orthogonal coordinate system and moves two-dimensionally in the orthogonal coordinate system. A projection optical system for projecting a mark onto a shot area of the photosensitive substrate, and a mark detecting means for detecting a mark position on the photosensitive substrate, the mark detecting means having a detection center point at a predetermined position in the orthogonal coordinate system. Control means for controlling the moving position of the substrate stage so that an arbitrary shot area on the photosensitive substrate is aligned with the optical axis of the projection optical system based on the mark position. In the projection exposure apparatus, (a) shot designation for designating, as alignment shots, four or more shot regions on the photosensitive substrate, including at least shot regions located in respective four quadrants of the array coordinate system. And (b) the substrate stage is moved so that the marks attached to each of the designated alignment shots are sequentially detected by the mark detecting unit, and the actual measurement corresponding to the actual coordinate position of each of the alignment shots. Value (Hxn,
Hyn) for measuring the shot position; (c) Design coordinate values (Dxn, Dyn) of each shot area on the photosensitive substrate, and predetermined error parameters (a11, a).
12, a21, a22, Ox, Oy), movement coordinate values (Fxn, Fyn) of the substrate stage such that an arbitrary shot area on the photosensitive substrate is aligned with the optical axis of the projection optical system. ) Is calculated based on an arithmetic expression of Fxn = a11.Dxn + a12.Dyn + Ox Fyn = a21.Dxn + a22.Dyn + Oy; H
yn) and corresponding design coordinate values (Dxn, Dyn) corresponding to at least a11, a of the parameters.
A projection exposure apparatus comprising: a second calculation means for calculating each value of 12, a21, and a22. 2. A photosensitive substrate having a plurality of shot areas two-dimensionally arranged according to a predetermined arrangement coordinate system, and alignment marks attached to each of the plurality of shot areas, wherein the arrangement coordinate system A reticle pattern, which is arranged so that the optical axis passes at a predetermined position in the orthogonal coordinate system and a substrate stage that is held so as to be substantially parallel to the predetermined orthogonal coordinate system and moves two-dimensionally in the orthogonal coordinate system. A projection optical system for projecting a mark onto a shot area of the photosensitive substrate, and a mark detecting means for detecting a mark position on the photosensitive substrate, the mark detecting means having a detection center point at a predetermined position in the orthogonal coordinate system. Control means for controlling the moving position of the substrate stage so that an arbitrary shot area on the photosensitive substrate is aligned with the optical axis of the projection optical system based on the mark position. In the projection exposure apparatus, (a) shot designation for designating, as alignment shots, four or more shot regions on the photosensitive substrate, including at least shot regions located in respective four quadrants of the array coordinate system. And (b) the substrate stage is moved so that the marks attached to each of the designated alignment shots are sequentially detected by the mark detecting unit, and the actual measurement corresponding to the actual coordinate position of each of the alignment shots. Value (Hxn,
Hyn) and a shot position measuring means for measuring (H)); (c) It is judged whether or not the measured value is different from a standard value by a predetermined amount or more, and if it is different, the measured value is obtained. Means for instructing another shot area adjacent to the alignment shot to perform measurement by the shot position measuring means; (d) design coordinate values of each shot area on the photosensitive substrate (Dxn, Dyn), predetermined The error parameter of (a11, a
12, a21, a22, Ox, Oy), movement coordinate values (Fxn, Fyn) of the substrate stage such that an arbitrary shot area on the photosensitive substrate is aligned with the optical axis of the projection optical system. ) Is calculated based on an arithmetic expression of Fxn = a11.Dxn + a12.Dyn + Ox Fyn = a21.Dxn + a22.Dyn + Oy; H
yn) and corresponding design coordinate values (Dxn, Dyn) corresponding to at least a11, a of the parameters.
A projection exposure apparatus comprising: a second calculation means for calculating each value of 12, a21, and a22.