JPH0743389B2 - Speed detector using position detector - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a speed detecting device using a rotary or linear position detector.

2. Description of the Related Art Roughly existing tachometers are roughly classified into those that output an analog voltage (or current) that is proportional to the rotation speed (the number of rotations per unit time), or that outputs a pulse train that is proportional to the rotation speed. Etc. The common drawbacks of analog outputs are that they are susceptible to errors due to disturbances and that they have a limited resolution. For example, the level of the detection signal fluctuates as the resistance of the coil fluctuates under the influence of temperature change,
Alternatively, various problems are likely to occur such that the level attenuation amount of the detection signal in the transmission path varies depending on the transmission distance, or the level fluctuation due to noise appears as a detection error as it is. Also, in the case of outputting a pulse train, the number of pulses generated per rotation is limited due to the mechanism, so there is a limit to the resolution, and there is also a limit to the range viability (range of detectable number of revolutions). It was In order to overcome such drawbacks of the prior art, Japanese Patent Laid-Open Publication No. 57-70460 proposes a speed detecting device, that is, a tachometer, which uses a phase shift type (phase modulation type) rotational position detector. There is. The speed detecting device using such a phase shift type position detector has an advantage that speed can be detected in a high resolution and in an ultra wide area. However, in the one disclosed in the above-mentioned prior application, the speed is obtained by measuring the frequency or period deviation between the output signal of the phase shift type position detector and the reference AC signal by calculation. Therefore, the arithmetic circuit was complicated.

Further, in Japanese Patent Laid-Open No. 55-140160, a pulse train generated according to rotation is counted to obtain position data, this position data is stored in a memory at every specific time, and this stored data and count data are combined. It has been shown to detect the number of revolutions by calculating the difference. However, in the method of counting such an incremental pulse train, the maximum response depends on the pulse generation interval, that is, the speed as described above, and it has been impossible to realize a high responsiveness independent of the speed. Further, the detection resolution also depends on the number of pulses generated per time, and resolution control independent of speed cannot be performed.

Further, as described above, in the case where the position data is sampled and stored at each specific time and the speed is detected based on the difference calculation of the stored data, if the specific time is fixed, it is efficient over a wide speed range. It has been difficult to perform accurate speed detection. That is, for example, if the specific time is set to be suitable for high speed detection (relatively short), difference data having a sufficient effective digit cannot be obtained in the low speed range, and conversely, the specific time is set to low speed detection. If it is set to a suitable value (relatively long), difference data having an unnecessarily large number of significant digits will be obtained in the high-speed range, so that a problem arises in that a large number of data bits must be provided.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and is capable of efficiently detecting a wide range of speeds while achieving high responsiveness and enabling variable setting of detection resolution. It is an object of the present invention to provide a speed detecting device that can be used.

SUMMARY OF THE INVENTION A speed detection device according to the present invention is a sensor unit that produces an output AC signal that is a phase-shifted reference AC signal according to the position of a detection target, and a phase difference between the output AC signal of the sensor unit and the reference AC signal. Is calculated at the sampling timing synchronized with the cycle of the AC signal, and is output as the position data of the detection target, and the position data obtained by the position calculation means are successively detected at time intervals synchronized with the sampling timing. To read and read the position data stored in the storage unit to obtain the difference between the position data at a certain sampling timing and the position data sampled N times before (where N is an integer). , Using the read position data to execute the difference calculation at a timing synchronized with the sampling pulse The speed calculation means and the setting means for variably setting the value of N to change the position data read from the storage means and thereby variably set the resolution of the speed calculation in the speed calculation means. is there.

The sensor unit is composed of a phase type sensor that produces an output AC signal by phase-shifting the reference AC signal according to the position of the detection target. The phase difference between the output AC signal of the sensor unit and the reference AC signal corresponds to the position of the detection target, and the phase difference can be measured for each cycle of the AC signal. Therefore, the position calculation means calculates the phase difference between the output AC signal of the sensor section and the reference AC signal at the sampling timing synchronized with the cycle of the AC signal, and outputs this as the position data of the detection target. The sampling timing, that is, the responsiveness, is uniquely dependent on the electrical cycle of the AC signal, and is completely independent of the speed of the detection target. For example, if the frequency of the AC signal is 1 kHz, it has a response of 0.001 seconds, which does not depend on the speed of the detection target at all.

The position data obtained by the position calculation means are successively fetched and stored in the storage means at each time interval synchronized with the sampling timing. The speed calculation means uses the speed data stored in the storage means to calculate the difference between the speed data captured at a certain time and the position data captured N times before (where N is an integer). , Output as speed data. This speed calculation can be performed at time intervals synchronized with the sampling timing, and therefore the response of speed detection does not depend on the speed of the object to be detected at all, but also depends on the electrical cycle of the AC signal. To do.

In this way, it is possible to perform speed detection that does not depend on the speed of the detection target but is uniquely dependent on the electrical cycle of the AC signal. The response that depends on the period of the electrical alternating current signal is fairly high.

Further, unlike the one that counts the incremental pulses according to the mechanical movement of the detection target, since it measures the electrical phase difference, the detection resolution does not depend on the speed of the detection target at all.

The speed detection resolution can be variably set by variably setting the value of N in the setting means and changing the position data read from the storage means.
In this case, if the setting means automatically variably sets the value of N in accordance with the difference data output from the speed calculation means, the speed detection resolution can be automatically set.
The value of N indicates the weight of the difference data obtained by the speed calculation means. Therefore, since the optimum resolution is automatically set according to the detected speed and the value of N at that time is known, it is possible to obtain accurate speed data regardless of the resolution by weighting accordingly.

Embodiments Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

In FIG. 1, the position detector 10 outputs position data D _X indicating the current position of the detection target in response to the rotational displacement or linear displacement of the detection target. That is, when the detection target is displaced in time, the value of the position data D _X changes from moment to moment according to the rate of displacement, that is, the speed. Output data of the position detector 10 at the first stage of the N-stage shift register 11 capable of storing all bits of one position data D _X per stage
D _X is given. The shift register 11 is shift-controlled by the sampling pulse S. Sampling pulse S
When this occurs, the current position data from the position detector 10 is sampled at the first stage of the shift register 11, and at the same time the position data of each stage is shifted to the next stage. In this way, the position data D _X obtained by the position detector 10 is sampled one after another as time passes, and the sampled data are stored in the shift register 11 one after another.

The output data D _X of the position detector 10 is given to the B input of the subtracter 12, and the output D _XN of the Nth stage of the shift register 11 is the calculator 12
Given to the A input of. The calculator 12 is _AB, that is, D _XN -D
_{X is} subtracted (inversely, it may be B-A), and the difference between the position data D _{X at} the current sampling timing and the position data D _XN sampled N times before is _calculated . The position data given to the B input of the arithmetic unit 12 may be the output signal of any stage of the shift register 11,
In short, it suffices if the sampling timings of the position data applied to the A input and the B input are deviated by a predetermined number of times.

In this way, the difference ΔD between the position data output from the calculator 12
_X represents the displacement amount of the examination target per unit time, which corresponds to N cycles of the sampling pulse S, and corresponds to the velocity of the detection target.

By the way, when the unit time for measuring the difference ΔD _X (that is, the speed) is fixed as shown in FIG. 1, it is difficult to efficiently detect the speed over a wide speed range. For example, if the unit time (N axis) is set to be suitable for high speed detection, the difference ΔD _X having a sufficient effective digit cannot be obtained in the low speed region. On the contrary, the unit time (N
Value) is set to a value suitable for low-speed detection, a difference ΔD _X with unnecessarily many significant digits is obtained in the high-speed range, and therefore the number of bits of the arithmetic unit 12 is unnecessarily large. It will have to be provided. Generally, in speed detection,
It is not necessary to have the same detection resolution in the high-speed range and the low-speed range,
It is efficient to ignore the lower digits as the speed becomes higher so that speed detection can be performed with the same effective digits in any speed region. For example, at a rotation speed in the 100 rpm range, the speed is detected with a fineness of 1 rpm (that is, with 3 significant digits).
It is efficient and practically sufficient to detect the speed with a precision of 10 rpm (that is, also with three significant digits) at a rotation speed of the 00 rpm range.

In view of the above points, the position data D _X , D calculated by the calculator 12
An example in which the value of the sampling frequency difference N between _XN is variably set is shown in FIG. In FIG. 1, N is treated as a fixed integer, but in FIG. 2, N is a variable integer. The number of stages M of the shift register 11 is a fixed integer, and the maximum settable value of N is M. The sequentially sampled position data stored in each stage of the shift register 11 are input to the data selector 13, respectively. N
The setting circuit 14 variably sets the value of N, and the data indicating the value of N set by the circuit 14 is added to the selection control input of the selector 13, and the value of the shift register 11 corresponding to the value of N is changed. One stage is selected and the position data stored in that stage is given to the A input of the arithmetic unit 12 as D _XN . In the Figure 2 the output data D _X of the position detector 10 to the B input of the arithmetic unit 12 is provided, it may provide the output data of the first-stage shift register 11 instead.

In the N setting circuit 14, the difference data ΔD obtained by the calculator 12
_X (that is, speed data) is given, and the value of N is automatically set according to the speed (speed range) of the detection target. Needless to say, the value of N may be manually switched. An example of the N setting circuit 14 is shown in FIG.
And the buffer register 16 for temporarily storing the N-value data read from the table 15, the difference data ΔD _X (speed data) given from the calculator 12 and the N-value data given from the buffer 16 are stored. N-value data is read from the table 15 as an address input. The N value data weights the difference data ΔD _X , and the actual speed is specified by both. In the N table 15, N values are stored in advance corresponding to a plurality of speed regions, and N value data corresponding to the speed is read by a combination of the difference data ΔD _X and the current N value data. N and the value are set so as to be inversely proportional to the speed. For example, the output of the last stage (Mth stage) of the shift register 11 is selected when the current speed belongs to the predetermined minimum speed region, and the output is sequentially selected from the previous stage as the speed region gradually increases. I'm running.

FIG. 4 shows another example of the N setting circuit 14. The comparator 17 compares the predetermined upper limit reference value R _max and lower limit reference value R _min with the difference data ΔD _X from the calculator 12, The up / down counter 18 counts according to the output of the comparator 17, and the count output of this counter 18 is used as N value data. Calculator
When the output data ΔD _{X of} 12 is in the range of R _min ≦ ΔD _X ≦ R _max , the content of the counter 18 does not change and the N value data at that time is held. When the speed increases and ΔD _X > R _max , a down count signal is given to the counter 18 and the value of N is decreased by 1. On the contrary, when ΔD _X <R _min , the up count signal is given to the counter 18 and the value of N is incremented by 1.

In the example of FIG. 2, the output data ΔD _X of the arithmetic unit 12 indicates the effective digit of the detected speed, and the data indicating the N value currently set by the N setting circuit 14 (N value data) is The weight of the organic digit data ΔD _X of the above speed is shown. Therefore, the absolute value of the velocity is specified using the data ΔD _X and the N value data.

In the example of FIG. 2, the calculation unit time of the position data difference ΔD _X is switched by changing the sampling frequency difference (N) without changing the sampling pulse S cycle. The difference (N) may be fixed and the cycle of the sampling pulse S may be switched according to the output of the N setting circuit 14, or both the difference (N) in the number of sampling times and the cycle of the sampling pulse S may be switched.

As the position detector, any device such as an absolute position detector or a device that counts output pulses of an incremental encoder to obtain position data can be used. Above all, it is advantageous in various respects to use the variable magnetic resistance type phase shift type position detector shown below.

The position detector 10 shown in FIG. 5 is a rotary sensor that produces an output signal Y = sin (ωt−θ) obtained by phase-shifting the reference AC signal sin ωt or cos ωt according to the rotational position θ of the rotor 19. Part 20, this output signal Y and the reference AC signal sin
An exchange unit 21 for measuring the phase shift amount θ with respect to ωt and obtaining the digital position data D _X corresponding to this θ is included. The sensor unit 20 is inserted into a stator 22 in which a plurality of poles A to D are provided at predetermined intervals in the circumferential direction (90 degrees as an example), and a stator space surrounded by the poles A to D. It is equipped with a rotor (movable iron core) 19. The rotor 19 has a shape that changes the reluctance of each pole A to D according to the rotation angle, and is, for example, an eccentric cylindrical shape. Primary poles 1A to 1D and secondary coils are provided on the poles A to D of the stator 22.
2A to 2D are wound respectively. The two poles A and C facing each other in the radial direction are coiled so as to operate differentially,
Moreover, a differential reluctance change occurs. The same applies to the other pair of poles B and D. One pole A, C
The primary coils 1A and 1C are excited by the sine signal sin ωt, and the primary coils 1B and 1D of the other pole pair B and D are excited by the cosine position. As a result, as the combined output Y of the secondary coils 2A to 2D, a signal Y = si obtained by phase-shifting the reference signal sin ωt (or cos ωt) by an angle according to the rotation angle θ of the rotor 19.
n (ωt−θ) can be obtained.
If the rotor 19 is rotating at a certain speed, θ is θ
It can be represented by (t). That is, θ changes every moment.

In the converter 21, a predetermined high-speed clock pulse CP is counted by the counter 23, and based on the output of the counter 23, the sine / cosine generating circuit 24 generates the sine signal sin ωt and the cosine signal cos ωt, respectively. As described above, they are applied to the primary coils 1A, 1C, 1B and 1D, respectively. Secondary coil 2A-2D
Output signal Y = sin (ωt−θ) of the zero cross detection circuit 2
5, the pulse L is output in synchronization with the timing of the electric phase angle of the signal Y being zero. The output pulse L of this circuit 25 is used as a latch pulse of the latch circuit 26. The latch circuit 26 latches the count output of the counter 23 in response to the rising edge of the pulse L supplied from the circuit 25.
The period in which the count value of the counter 23 goes round and the sine signal si
One cycle of n ωt can be synchronized with each other. Then, the latch circuit 26 provides the latch circuit 26 with the count value corresponding to the phase difference θ between the reference AC signal sin ωt and the sensor unit output signal Y = sin (ωt−θ). Is output, and this is output as the position data D _X.

When the phase shift type position detector 10 as shown in FIG. 5 is used, the phase difference measurement timing (that is, the latch of FIG. 5) is used as the sampling pulse S used in the shift register 11 of FIG. 1 or 2. A signal synchronized with the timing of the latch pulse L of the circuit 26) can be used. That is, the latch pulse L is directly used as the sampling pulse S
Or the pulse L is appropriately divided and used as the sampling pulse S. Similarly, the variable frequency divider 27 is controlled as shown in FIG. 6 according to the N value data set by the N setting circuit 14 of FIG. 2, and the latch pulse L is variable frequency divided according to the value of N. The sampled pulse may be used as the sampling pulse S.

Of course, as the sampling pulse S, a predetermined clock pulse or its variable frequency division output may be used.

The sensor unit 20 is not limited to the rotary type but may be a linear type (for example, a variable reluctance type as shown in JP-A-57-135917).

Incidentally, it is possible to detect acceleration in the same way as in FIGS. 1 and 2. FIG. 7 shows an acceleration detection circuit constructed according to the same idea as in FIG. 1, and FIG. 8 shows an acceleration detection circuit constructed according to the same idea as shown in FIG. Circuit 12 ', selector 1
3'and N setting circuit 14 'are respectively 11, 12, 13, and 14 in FIG. 1 and FIG.
It corresponds to 14. In this case, input speed data ΔD _X
Is not necessarily obtained as shown in FIGS. 1 and 2, but may be detected by any method. D _a indicates acceleration data.

Although the shift registers 11 and 11 ', the arithmetic units 12 and 12', the selectors 13 and 13 ', and the N setting circuits 14 and 14' are shown to be configured by discrete circuits in the above description, these It is also possible to configure the part using a microcomputer.

EFFECTS OF THE INVENTION As described above, according to the present invention, it is not necessary to provide a dedicated sensor for speed detection, and speed detection can be easily performed by a simple calculation. In particular, the phase difference between the output AC signal of the phase type position sensor and the reference AC signal is calculated at the sampling timing synchronized with the cycle of the AC signal, and this is output as position data, and the speed is calculated based on this position data. Since the detection responsiveness is uniquely dependent on the electrical cycle of the AC signal and does not depend on the speed of the object to be detected at all, speed detection is performed with high responsiveness even at speeds such as and. be able to. Also,
Since the detection resolution is not affected by the speed of the detection target, high resolution can be achieved. Also, while maintaining high responsiveness,
Various excellent effects are exhibited, such as the speed detection resolution can be freely variably set.

[Brief description of drawings]

1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIGS. 3 and 4 are block diagrams showing examples of the N setting circuit of FIG. 2, respectively. Figure, fifth
FIG. 6 is an explanatory diagram showing an example in which a rotary type phase shift type position detector is used as the position detector in FIGS. 1 and 2, and FIG. 6 is a circuit for generating the sampling pulse of FIGS. 1 and 2. 7 and 8 are block diagrams showing an example of a circuit for obtaining an acceleration using the same idea as the present invention. 10 …… Position detector, 11 …… Shift register, 12 …… Calculator, 13 …… Data selector, 14 …… N setting circuit, 20 ……
Sensor part, 21 ... conversion part, 22 ... stator, 19 ... rotor.

 ─────────────────────────────────────────────────── --- Continuation of front page (56) Reference JP-A-55-140160 (JP, A) JP-A-49-96779 (JP, A) JP-A-50-115853 (JP, A) JP-A-54- 83460 (JP, A)

Claims (6)

[Claims] 1. A sensor unit for generating an output AC signal obtained by phase-shifting a reference AC signal according to the position of a detection target, a counter for counting a predetermined clock pulse, and the reference AC signal generated based on the output of this counter. Then, a circuit for giving to the sensor unit, a circuit for detecting a predetermined phase of the output AC signal of the sensor unit to generate a sampling pulse, and count data showing a phase shift from the predetermined reference phase of the reference AC signal. A phase shift type position detector which comprises a circuit for latching by the sampling pulse and outputs the latched data as the position data of the detection target; and a time when the position data obtained by the detector is synchronized with the sampling pulse. Storage means for sequentially capturing and storing at intervals, position data at a certain sampling timing and its In order to obtain the difference from the position data sampled the previous time (where N is an integer), the position data stored in the storage means is read, and the read position data is used to synchronize the difference with the sampling pulse. And a setting means for variably setting the value of N to change the position data read from the storage means, thereby variably setting the resolution of the speed calculation in the speed calculation means. Speed detection device. 2. The speed detecting device according to claim 1, wherein the setting means sets the value of N according to the speed of the detection target. 3. The speed detecting device according to claim 1, wherein the setting means automatically and variably sets the value of N according to the difference data output from the speed calculating means. 4. The setting means inputs data indicating the difference obtained by the speed calculating means, and determines a new N value based on this data and the N value currently set. The speed detection device according to claim 3. 5. The setting means inputs data indicating a difference obtained by the speed calculating means, and increases or decreases the value of N based on a comparison between this data and a predetermined reference value. The speed detecting device according to the third item. 6. The speed detecting device according to claim 2, wherein the setting means determines the value of N in inverse proportion to the speed of the detection target.