JPH0744219B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor device having a multilayer wiring structure, and a semiconductor device having an interlayer insulating film formed between wiring layers by an improved deposition method, and the same. It relates to a manufacturing method.

[Prior Art] As a conventional semiconductor device, a DRAM having a multilayer wiring structure
(Dynamic Random Access Memory) device will be described.

FIG. 3 is a sectional view of a conventional DRAM. In FIG.
A stacked DRAM element 2 is formed on the surface of the silicon semiconductor substrate 1. A first insulating film 3 is formed on the DRAM element 2. A first wiring layer 4 is formed on the first insulating film 3, and a second insulating film 5 is formed on the first wiring layer 4.
Are formed. Then, the second insulating film 5 has a second
Wiring layer 6 is formed.

In the structure of the conventional semiconductor device shown in FIG. 3, the second insulating film 5 deposited on the first wiring layer 4 has good patterning property of the second wiring layer 6 formed thereon. ,
In addition, sufficient flatness is required to improve the reliability level of the wiring.

Next, the manufacturing process of the semiconductor device shown in FIG. 3 will be outlined with a focus on the method of forming the second insulating film 5.

As the first wiring layer 4 and the second wiring layer 6,
A metal wiring such as aluminum or a refractory metal, a refractory metal silicide wiring, a polycrystalline silicon wiring, or the like is used. Here, the first wiring layer 4 and the second wiring layer 6 are both aluminum wirings. explain.

Referring to FIG. 4A, on the surface of silicon semiconductor substrate 1, element isolation oxide film 301, transfer gate electrode 302, impurity diffusion layer 303, word line 304, storage node 305, capacitor insulating film 306, cell plate 307 are formed. The configured DRAM element (stack cell) 2 is formed.

Next, referring to FIG. 4B, after depositing the first insulating film 3 on the entire surface of the silicon semiconductor substrate 1 on which the DARM element 2 is formed, a desired portion is formed by photolithography or etching. The contact hole 308 is opened. Next, an aluminum wiring which is the first wiring layer 4 is formed as a bit line.

Next, referring to FIG. 4C, for example, silane (SiH ₄ ) and oxygen (O ₂ ) or nitrous oxide (N ₂ ) is formed on the first wiring layer 4.
O) gas and chemical vapor deposition (CVD method; Chemical Vapor D) using heat or plasma at a film deposition temperature of 300 to 450 ° C.
Then, a silicon oxide film 11 is deposited.

Next, referring to FIG. 4D, an inorganic coating insulating film 12 containing silanol [Si (OH) ₄ ] as a main component is formed on the silicon oxide film 11.
Is applied and then baked at a temperature of 400 to 450 ° C. to flatten the surface.

Next, referring to FIG. 4E, a silicon oxide film 13 is deposited on the inorganic coating insulating film 12 by the same method as shown in FIG. 4C. Thus, the silicon oxide film 11 and the inorganic coating insulating film 12
Then, the second insulating film 5 made of the silicon oxide film 13 is formed.

Finally, as shown in FIG. 4F, a second insulating film 5 is formed on the second insulating film 5.
Aluminum wiring is formed as the wiring layer 6.

[Problems to be Solved by the Invention] When attempting to form the second insulating film 5 in the conventional semiconductor device by the above-described method, there are the following problems.

As the wiring becomes finer, the wiring interval also becomes narrower. However, when the distance becomes a submicron region, as shown in FIG. 5, the thickness t ₀ of the coating insulating film 12 accumulated at this portion becomes large, During the subsequent baking process, cracks in the applied insulating film 14
Will occur. This is because the coating insulation film 12 is 400-450 ℃
Due to the rapid volume shrinkage in the baking process of
For example, in the case of the inorganic coating insulating film 12 containing silanol [Si (OH) ₄ ] as a main component, cracks 14 easily occur when the thickness t ₀ is 0.5 μm or more.

As described above, when the crack 14 is generated in the coating insulating film 12, even if the silicon oxide film 13 is deposited on the crack 14, the shape thereof is reflected and the patterning of the second wiring layer 6 is hindered or the crack is generated. As shown in FIG. 3, since the step coverage of this portion is deteriorated, the second wiring layer 6 is disconnected, which has a significant effect on the reliability level of the wiring.

As a method of eliminating such a drawback of the coating insulating film 12,
Organosilane (eg TEOS [tetraethyl ortho silic
ated, tetra-excylsilane; Si (OC ₂ H ₅ ) ₄ ] and oxygen, a method of depositing a silicon oxide film by plasma CVD at a film deposition temperature of 300 to 450 ° C, and similarly, organic silane such as TEOS and ozone. There is also an attempt to planarize only an insulating film formed by the CVD method by using (O ₃ ) and depositing a silicon oxide film by the thermal CVD method at a film deposition temperature of 300 to 450 ° C.

By using organic silane, all of these increase the rate of reaction on the substrate surface during chemical vapor reaction, resulting in a silicon oxide film deposited using conventional silane (SiH ₄ ) and oxygen or nitrous oxide. In comparison, it has a feature that a silicon oxide film having excellent step coverage can be deposited.

However, as shown in FIG. 7, the former silicon oxide film 21 formed by the plasma CVD method using TEOS and O ₂ has a step coverage property as compared with the conventional silicon oxide film 20 using silane (SiH ₄ ). Is good, but plasma CVD
Since the method is used, the ratio of chemical vapor reaction in plasma is relatively large, and it is not enough to bury the space between sub-micron level wirings for planarization. Therefore, the cavity 22 is generated in the portion where the wiring interval is narrow.

Further, the latter silicon oxide film 23 formed by the thermal CVD method using TEOS and O ₃ has a very good step coverage because the chemical vapor phase reaction (surface condensation reaction) on the substrate surface is the main. As shown in FIG. 8, when the film thickness is increased, there is a problem that cracks 24 are likely to occur due to the shrinkage stress of the film itself.

The present invention has been made to solve the above problems, and uses a silicon oxide film having excellent crack resistance and good flatness as an interlayer insulating film formed on the first wiring layer. Thus, it is an object of the present invention to obtain a semiconductor device in which the yield and the reliability level of the second wiring layer formed thereon are improved, and to provide a method for manufacturing such a semiconductor device.

[Means for Solving the Problems] A semiconductor device according to the present invention is mainly composed of organic silane and oxygen or nitrous oxide as an interlayer insulating film formed between a first wiring layer and a second wiring layer. Using the first gas, the first silicon oxide film formed by the chemical vapor deposition method using plasma, and the second gas obtained by adding ozone to the first gas, and using the plasma The second silicon oxide film formed by the above chemical vapor deposition method is alternately and repeatedly laminated.

In particular, each of the first silicon oxide film and the second silicon oxide film is formed to a thickness of 2000 Å or less.

Further, in the method of manufacturing a semiconductor device according to the present invention, the step of forming the interlayer insulating film uses a chemical vapor phase using plasma using organic silane and a first gas containing oxygen or nitrous oxide as main components. First step of forming a first silicon oxide film by a growth method, using a second gas obtained by adding ozone to a first gas to the main surface of the first silicon oxide film, and using a plasma-based chemistry. It includes a second step of forming a second silicon oxide film by a vapor phase method.

Further, in the method of manufacturing a semiconductor device according to the present invention, the first step and the second step are alternated so that the first and second silicon oxide films are alternately and repeatedly laminated in the film thickness direction. In particular, this laminated structure uses a chemical vapor deposition method using plasma,
It is formed by a step of generating plasma in a mixed gas containing organic silane and oxygen or nitrous oxide as main components, and intermittently adding ozone to the plasma.

Further, when ozone is added to this mixed gas, the high frequency power for generating plasma is lowered.

[Function] A silicon oxide film formed by a chemical vapor deposition method using plasma using organosilane and a gas containing oxygen or nitrous oxide as a main component has high crack resistance. In addition, a silicon oxide film formed by a chemical vapor deposition method using plasma using organic silane and oxygen or a gas containing nitrous oxide and ozone as its main components has high step coverage. Moreover, this film is formed by a chemical vapor phase reaction (surface condensation reaction) on the surface of the substrate. Therefore, if it is formed in the step portion of the wiring interval of the submicron level, the step portion should be flattened. You can

Thus, according to the semiconductor device and the method for manufacturing a semiconductor device of the present invention, these films are alternately and repeatedly formed,
By using a film having a laminated structure, the advantages of both films can be utilized, and an interlayer insulating film having excellent crack resistance and good flatness can be obtained. Therefore, if the second wiring layer is formed on the interlayer insulating film thus formed, a semiconductor device having a high yield and an extremely high reliability level can be obtained.

[Embodiment of the Invention] FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention. In FIG. 1, a stacked DRAM element 2 is formed on the surface of a silicon semiconductor substrate 1. A first insulating film 3 is formed on the DRAM element 2. A first wiring layer 4 is formed on the first insulating film 3. A second insulating film 100 is formed on the first wiring layer 4. The first wiring layer 6 is formed on the second insulating film 100.

Here, the second insulating film 100 is composed of the first to seventh layers of silicon oxide film. Of these, the first, third, fifth, and seventh silicon oxide films are silicon oxide films formed by the plasma CVD method using TEOS and an O ₂ -based gas, and the second and fourth layers. Layer and 6th layer silicon oxide film is TE
It is a silicon oxide film formed by a plasma CVD method using OS, O ₂ and O ₃ . Next, a method of depositing the second insulating film 100 of the semiconductor device shown in FIG. 1 will be described. The first wiring layer 4
The case where both the second wiring layer 6 and the second wiring layer 6 are aluminum wirings will be described.

Referring to FIG. 2A, a device isolation oxide film 301, a transfer gate electrode 302, an impurity diffusion layer 303, a word line 304, a storage node 305, a capacitor insulating film 30 are formed on the surface of the silicon semiconductor substrate 1.
Stacked DR composed of 6 and cell plate 307
The AM element 2 is formed.

Next, referring to FIG. 2B, after depositing the first insulating film 3 on the entire surface of the silicon semiconductor substrate 1 on which the DRAM element 2 is formed, a desired portion is formed by photolithography and etching. The contact hole 308 is opened. Next, an aluminum wiring layer which is the first wiring layer 4 used as a bit line is formed. The process up to this point is the same as the manufacturing flow in the conventional semiconductor device.

Next, referring to FIG. 2C, TEOS and oxygen are used on the first wiring layer 4 and plasma CVD is performed at a film deposition temperature of 300 to 450 ° C. by TEOS + O ₂ system plasma CVD of the first layer. A silicon oxide film 101 is deposited.

Although this film has excellent crack resistance, it does not have sufficient step coverage, so as shown in FIG.
+ O ₂ system plasma CVD method with thick silicon oxide film 109
Is deposited, the overhang shape 11
0 will be generated. Therefore, the film thickness t ₁ needs to be 2000 Å or less in the case of a submicron level wiring interval.

Next, referring to FIG. 2D, ozone (O ₃ ) was added to TEOS and oxygen (O ₂ ), and plasma CV was performed at a film deposition temperature of 300 to 450 ° C.
The silicon oxide film 102 of the second layer is deposited by the plasma CVD method using the TEOS + O ₂ + O ₃ system gas by the D method.

Compared to the silicon oxide film formed by the thermal CVD method using only TEOS and ozone described above, this film has a smaller shrinkage stress, and therefore has improved crack resistance, but as shown in FIG. 10, TEOS + O ₂ When the thick film 111 of silicon oxide film is deposited by the plasma CVD method using + O ₃ system gas, cracks 112 are likely to occur.

Therefore, in the case of submicron level wiring spacing, the film thickness
t ₂ should be less than 2000Å in the flat part. On the other hand, since this film has a good step coverage as described above, it is possible to promote the flattening of the wiring step portion.

Next, referring to FIG. 2E, as in FIG. 2C, TEOS and oxygen (O ₂ ) are used and the third layer of TEOS + O is formed by the plasma CVD method.
Silicon oxide film 10 by plasma CVD method using ₂ type gas
Deposit 3. For the same reason as described above, the transmembrane pressure is 2
000 Å or less.

Next, referring to FIG. 2F, as in FIG. 2D, TEOS and oxygen (O ₂ ) are added with ozone (O ₃ ), and the fourth layer of TEOS + O ₂ + O ₃ is added by plasma CVD. A silicon oxide film 104 is deposited by a plasma CVD method using a system gas. For the same reason as explained in FIG. 2D, the film thickness is 2000 Å in the flat part.
Below.

Hereinafter, repeated the method described above, the silicon oxide film 105 by plasma CVD method using a fifth layer of TEOS + O ₂ based gas, 6
By depositing the silicon oxide film 106 by the plasma CVD method using the TEOS + O ₂ + O ₃ system gas in the layer and the silicon oxide film 107 by the plasma CVD method using the TEOS + O ₂ system gas in the seventh layer, The insulating film 100 is formed. Finally, an aluminum wiring layer is formed as the second wiring layer 6 on the second insulating film 100.

The deposition of the second insulating film 100 by such a method can be easily performed, for example, by the chemical vapor deposition apparatus shown in FIG. In FIG. 11, a head 202 having a gas dispersion function, a substrate holder 204 for mounting a semiconductor substrate 203 on which an insulating film is deposited, and a semiconductor substrate 203 are heated to a desired temperature in a reaction chamber chamber 201. And a heater 205 for doing so. A TEOS gas supply line 206, an O ₂ gas supply line 207 and an O ₃ gas supply line 208 are connected to the head 202. Further, the head 202 has a high frequency power supply 2 for generating plasma in the reaction chamber chamber 201.
Power is supplied from 09. The eleventh
In the figure, 210 is a high frequency power on / off switch, 211 is a vacuum exhaust system, and 212 is plasma generated in the reaction chamber.

Next, a method for depositing a film using the chemical vapor deposition apparatus shown in FIG. 11 will be described.

First, the semiconductor substrate 203 is placed on the substrate holder 204, and heated by the heater 205 to a desired temperature, for example, 300 to 450 ° C. Next, using the vacuum exhaust system 211, the inside of the reaction chamber chamber 201 is exhausted to a desired vacuum degree, for example, on the order of 10 ⁻⁴ Torr.

When depositing a silicon oxide film by the plasma CVD method using TEOS + O ₂ system gas, open the valve of TEOS gas supply line 206 and the valve of O ₂ gas supply line 207, and flow a predetermined amount of gas, The high-frequency power on / off switch 210 is turned on under a pressure of about 100 Torr to generate plasma 212 in the reaction chamber. This deposits a film.

Following this, plasma CV using TEOS + O ₂ + O ₃ system gas
When depositing a silicon oxide film by the D method, with the TEOS gas and the O ₂ gas flowing and the high frequency power applied, the valve of the O ₃ gas supply line 208 is opened to
A gas with a specified flow rate (for example, 1000 Torr) under a pressure of about 00 Torr
A gas containing 0 to 50,000 ppm of O ₃ ) may be flowed.

Hereinafter, the above operation is repeated. That is, by intermittently adding ozone to TEOS gas and oxygen gas, a silicon oxide film by a plasma CVD method using TEOS + O ₂ system gas and a plasma using TEOS + O ₂ + O ₃ system gas continuously in the same reaction chamber. An insulating film having a laminated structure can be formed by alternately repeating a silicon oxide film formed by the CVD method.

In the above-described embodiment, plasma CVD using TEOS + O ₂ -based gas for both the lowermost layer and the uppermost layer of the second insulating film 100 is performed.
Although the case of a silicon oxide film formed by the method is shown, the same effect can be obtained even if one or both of the lowermost layer and the uppermost layer is the silicon oxide film formed by the plasma CVD method using the TEOS + O ₂ + O ₃ system gas.

Further, in the above-described embodiment, a silicon oxide film formed by the plasma CVD method using the TEOS + O ₂ system gas and a silicon oxide film formed by the plasma CVD method using the TEOS + O ₂ + O ₃ system gas are alternately deposited. The case where all of the two insulating films are formed has been described, but for the purpose of further improving the flatness, the insulating film deposited by this method and the coating insulating film may be combined, or the insulating film may be formed by this method. After being deposited
The same effect can be obtained even if the insulating film deposited by this method is used as a part of the second insulating film in combination with an etchback method using reactive ion etching, sputtering etching or the like.

Although TEOS is used as an example of the organic silane in the above-mentioned examples, other organic silanes such as Si (OCH ₃ ) _{4 are used.}
[Tetra-methoxy _{silane], Si (i-C 3} H 7 O) 4 [ tetra isopropoxy _{silane], (t-C 4 H} 9 O 2) 2 Si
The same effect can be obtained by using (O ₂ CCH ₃ ) ₂ [DADBS; ditertiarybutoxy acetoxy silane].

In the above-described examples, the case where the film deposition is performed using only organic silane and oxygen or organic silane and oxygen and ozone is described. However, these gases are the main components, and for the purpose of further improving the crack resistance of the film, PO (OCH ₃ ) ₃ [Trimethyl phosphate] and B (OC ₂ H ₅ ) ₃ [Boron ・
The same effect can be obtained by doping the silicon oxide film with impurities such as phosphorus and boron by adding a gas such as "equilate".

Further, according to the above-mentioned embodiment, the case where oxygen is used as the oxidizing gas for reacting with the organic silane to form the silicon oxide film has been described. The same effect can be obtained by using nitrogen (N ₂ O).

Furthermore, in the above-described embodiments, the case where the first wiring layer is an aluminum wiring has been described. However, the first wiring layer is a metal wiring such as a refractory metal (W, Mo, Ti, etc.), a refractory metal silicide ( WSi ₂ , MoSi ₂ , TiSi _2, etc.) wiring or polycrystalline silicon wiring may be used, and the same effect is obtained. The same applies to the second wiring layer.

In the above-mentioned embodiment, the plasma is generated by using the TEOS + O ₂ + O ₃ system gas.
As a means of depositing a silicon oxide film by the CVD method, TEO
The method of intermittently adding ozone (O ₃ ) without changing the film formation conditions of the silicon oxide film by the plasma CVD method using S + O ₂ system gas was explained, but the TEOS + O ₂ + O ₃ system gas was used. The film forming conditions may be changed for the purpose of further improving the film quality and step coverage of the silicon oxide film formed by the plasma CVD method. For example, as shown in FIG. 12, in synchronization with the addition of ozone (O ₃ ) to TEOS and oxygen (O ₂ ), the high frequency power applied between the electrodes is reduced,
If a silicon oxide film is deposited by the plasma CVD method using TEOS + O ₂ + O ₃ system gas, the amount of reactive radicals generated in plasma is reduced, and the reaction in the gas phase is suppressed, and
Since the rate of film deposition (surface reaction) by the surface condensation reaction on the substrate surface due to TEOS and ozone (O ₃ ) increases relatively,
Furthermore, it is possible to obtain a silicon oxide film excellent in step coverage by a plasma CVD method using TEOS + O ₂ + O ₃ based gas.

In the above-described embodiments, the semiconductor device in which the DRAM element is formed on the surface of the semiconductor substrate has been described, but the same effect can be obtained even when applied to a semiconductor device having another multilayer wiring structure. For example, SRAM (Static Random
The case where the interlayer insulating film according to the present invention is applied to the one in which an access memory) element is formed is shown. A detailed description is omitted and only the main configuration is described. In FIG. 13, 1 is a silicon semiconductor substrate, 310 is an SRAM element formed on the surface of the silicon semiconductor substrate 1 [double well CMOS
(Complementary Mental Oxide Semiconductor) structure, 311 is a P-type well region, 312 is an N-type well region, 31
3 is an oxide film for element isolation, 314 is a gate electrode, 315 is an N-type impurity diffusion layer, 316 is a P-type impurity diffusion layer, 317 is a polycrystalline silicon wiring, 318 is a contact hole, and 3 is deposited on the SRAM element 310. A first insulating film, 4 is a first wiring layer formed on the first insulating film 3, 100 is a second insulating film deposited on the first wiring layer 4, and 101, 103, 105 and 107 are first 3rd layer
Silicon oxide films by the plasma CVD method using the TEOS + O ₂ system gas in the 5th and 7th layers, 102, 104, and
Reference numeral 106 denotes TEOS of the second layer, the fourth layer, and the sixth layer, respectively.
A silicon oxide film formed by a plasma CVD method using + O ₂ + O ₃ system gas, and 6 indicates a second wiring layer formed on the second insulating film 100.

Similarly, the elements formed on the surface of the semiconductor substrate 1 are
Elements other than DRAM elements and SRAM elements such as EPROM (Era
sable Programmable Read Only Memory) element, E2PRO
M (Electrical Erasable Programmable ROM) element,
It may be a microcomputer circuit element, a CMOS logic circuit element, a bipolar transistor element, or the like.

[Advantages of the Invention] As described above, according to the present invention, silicon produced by a plasma CVD method using an organic silane having a large step resistance but having a large crack resistance and a gas containing oxygen or nitrous oxide as a main component is used. The oxide film and the step coverage are very good, but the silicon oxide film formed by the plasma CVD method using a gas whose main component is silane and oxygen or nitrous oxide and ozone, which are poor in crack resistance, is alternately repeated. Since the silicon oxide film is formed, it is possible to obtain a silicon oxide film having excellent crack resistance and good flatness.

Therefore, even if the second wiring layer is formed on the interlayer insulating film thus obtained, it is possible to perform stable patterning and improve the reliability level of the second wiring layer. As a result, a semiconductor device having a high yield and an excellent reliability level can be obtained.

[Brief description of drawings]

FIG. 1 is a sectional view showing a semiconductor device according to an embodiment of the present invention. 2A to 2G are sectional views showing a method of depositing an insulating film in a semiconductor device according to an embodiment of the present invention.
FIG. 3 is a sectional view showing a conventional semiconductor device. 4A to 4F are sectional views showing an insulating film forming method in the conventional semiconductor device shown in FIG. 5 to 10
The figure is a view for explaining problems in the conventional insulating film forming method. FIG. 11 is a diagram showing a chemical vapor deposition apparatus applied to the insulating film deposition method of the present invention. FIG. 12 is a diagram showing an insulating film deposition method according to another embodiment of the present invention. FIG. 13 is a sectional view showing a semiconductor device according to another embodiment of the present invention. In the figure, 1 is a silicon semiconductor substrate, 2 is a DRAM element,
3 is a second insulating film, 4 is a first wiring layer, 6 is a second wiring layer, 100 is a second insulating film, 101, 103, 105 and 107 are the first layer, the third layer, the fifth layer and the seventh layer, respectively. Oxide film by plasma CVD method using TEOS + O ₂ based gas, 102,104,1
06 is TEOS + O ₂ + of the second, fourth and sixth layers respectively
1 shows a silicon oxide film formed by a plasma CVD method using O ₃ gas. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (6)

[Claims] 1. A semiconductor having a first wiring layer provided on a semiconductor substrate via an insulating film, and a second wiring layer provided on the first wiring layer via an interlayer insulating film. In the apparatus, the interlayer insulating film includes a first silicon oxide film formed by a chemical vapor deposition method using plasma using organic silane and a first gas containing oxygen or nitrous oxide as a main component, A second gas in which ozone is added to the first gas is used, and a second silicon oxide film formed by a chemical vapor deposition method using plasma is alternately and repeatedly laminated. Characteristic semiconductor device. 2. The semiconductor device according to claim 1, wherein each of the first silicon oxide film and the second silicon oxide film is formed to have a thickness of 2000 Å or less. 3. A semiconductor having a first wiring layer provided on a semiconductor substrate via an insulating film, and a second wiring layer provided on the first wiring layer via an interlayer insulating film. In the method of manufacturing a device, in the step of forming the interlayer insulating film, a first gas containing organic silane and oxygen or nitrous oxide as a main component is used, and first silicon is formed by a chemical vapor deposition method using plasma. A first step of forming an oxide film, a second gas in which ozone is added to the first gas is used on the main surface of the first silicon oxide film, and a second step is performed by a chemical vapor deposition method using plasma.
2. A method of manufacturing a semiconductor device, including the second step of forming a silicon oxide film. 4. The first step and the second step are alternately repeated so that a structure in which first and second silicon oxide films are alternately and repeatedly laminated in the film thickness direction is formed. The method for manufacturing a semiconductor device according to claim 3, wherein 5. A semiconductor having a first wiring layer provided on a semiconductor substrate via an insulating film, and a second wiring layer provided on the first wiring layer via an interlayer insulating film. In the method of manufacturing an apparatus, the step of forming the interlayer insulating film uses a chemical vapor deposition method using plasma, and generates plasma in a mixed gas containing organic silane and oxygen or nitrous oxide as main components, A first silicon oxide film formed by using the mixed gas and a second silicon oxide film formed by adding ozone to the mixed gas, including a step of intermittently adding ozone to the plasma; A method of manufacturing a semiconductor device, wherein the interlayer insulating film is formed so as to have a structure in which the layers are alternately and repeatedly stacked. 6. A method of manufacturing a semiconductor device according to claim 5, wherein when the ozone is added to the mixed gas, the high frequency power for generating the plasma is lowered.