JPH0744412B2 - AGC circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an AGC circuit, and more particularly to an AGC circuit suitable for a television tuner and a 1 GHz tuner of a satellite broadcast receiver.

[Prior Art] A typical conventional example of an AGC circuit used in a tuner is described in Japanese Patent Publication No. 56-107652. This is a π-type AGC circuit that uses three pin diodes, and the AGC circuit is connected to this pin diode through a control transistor.
This is a circuit that applies a control voltage to vary the gain.
In this circuit, a pin diode drive transistor is required in addition to the pin diode as the AGC circuit, and the circuit becomes large. There were problems such as large current consumption.

[Problems to be solved by the invention]

In the above conventional technology, the collector current for driving the amplification transistor and the current for driving the pin diode are independent, so that the power consumption of the AGC circuit is increased, and the transistor for pin diode driving is separately provided, so that the circuit is large. There was a problem that the shape became complicated.

An object of the present invention is to use an amplifying transistor as a pin diode driving transistor to achieve a compact and low power consumption AGC circuit.

[Means for solving problems]

In the present invention, in order to achieve the above object, in an AGC circuit composed of a transistor and a pin diode, the cathode of the pin diode is connected to the collector of the transistor, and a bias is supplied to this cathode through a resistor to the anode of the pin diode. Supplies a fixed bias and connects a capacitor in parallel to the pin diode or a series circuit of a capacitor and a resistor, and lowers the input signal and AGC voltage to the base of the transistor, and the anode side of the pin diode. The output signal is taken out from.

[Action]

The collector voltage of the amplifying transistor is supplied to the cathode of the pin diode, and a fixed bias is applied to the anode from the power supply. When the AGC voltage applied to the base of the amplifying transistor rises, the collector voltage of the transistor falls, the pin diode turns on, and the amount of signal attenuation decreases. On the other hand, when the AGC voltage decreases, the collector voltage of the transistor increases, the current flowing through the pin diode decreases, and the amount of signal attenuation increases. When the collector voltage of the transistor becomes higher than the fixed voltage supplied to the anode of the pin diode, the pin diode is turned off and the amount of attenuation becomes maximum. Here, even when the AGC voltage applied to the base of the transistor becomes 0 V, it is necessary to apply a constant voltage to the base of the transistor in order not to deteriorate the distortion characteristics of the transistor. Therefore, in the present invention, a constant voltage is applied from the power supply to the base in advance by resistance division, and the AGC voltage is applied to the base via the switching diode. According to this method, when the AGC voltage is equal to or lower than the fixed bias of the base, the fixed bias is applied to the base as it is, and the deterioration of the distortion characteristic of the amplification transistor can be prevented.

〔Example〕

Hereinafter, the present invention will be described in detail according to the embodiments shown in the drawings. FIG. 1 shows an embodiment of the present invention. The AGC circuit of the present invention includes a high frequency amplification transistor 1 and a pin diode 5.
And a switching diode 13. The base bias voltage of the transistor 1 is given by resistance division of the resistors 10 and 11, and the AGC control voltage is applied from the terminal 20 via the resistor 12 and the switching diode 13. Now terminal 1
When the signal level input from 8 is low, the AGC control voltage applied from terminal 20 is high.When this AGC control voltage is higher than the voltage divided by resistors 10 and 11, the switching diode Current flows to 13, AG
A bias proportional to the C control voltage is applied to the base of the transistor 1. On the other hand, when the signal level input from the terminal 18 is high, the AGC voltage applied from the terminal 20 decreases, and when the AGC control voltage becomes lower than the voltage divided by the resistors 10 and 11, The switching diode 13 is turned off, and the base 2 of the transistor 1 has a resistor 1
A constant voltage divided by 0 and 11 is biased. By adopting the base bias circuit as described above, the collector current of the transistor 1 is maintained at a constant value even when the AGC control voltage is lowered, and the distortion characteristic is not deteriorated. Next, in the collector 4 of the transistor 1,
A bias is supplied from the power source through the resistor 8 and the cathode of the pin diode 5 is connected. A fixed voltage is biased to the anode of the pin diode 5 by resistance division of the resistors 6 and 7, and a high frequency signal is output from the terminal 19 of the anode of the pin diode 5 via the capacitor 16. Generally, in a pin diode, the high frequency resistance value becomes extremely large, and the bias region where a sufficient effect for high frequency signal attenuation is obtained is the anode of the pin diode,
When the bias between the cathodes is less than the PN junction potential difference of the pin diode (0.7V in silicon),
(That is, the state in which the pin diode transits from the ON state to the OFF state), the transition region is positively utilized in the present invention. That is, when the input signal level input from the terminal 18 rises, the AGC control voltage applied from the terminal 20 falls, and the collector current flowing in the transistor 1 decreases, the voltage drop due to the resistor 8 becomes small and the The collector voltage, that is, the anode voltage of the pin diode 5 rises. At this time, when the anode voltage of the pin diode 5 rises above the fixed voltage biased by the resistors 6 and 7 at the cathode of the pin diode 5, the pin diode 5 is turned off and the high frequency resistance of the pin diode 5 is increased. Increase and the signal level decreases. On the contrary, when the input signal level input from the terminal 18 decreases, the AGC control voltage applied from the terminal 20 increases, and the collector current flowing through the transistor 1 increases, the voltage drop due to the resistor 8 increases, The collector voltage of 1, that is, the anode voltage of the pin diode 5 drops. At this time, rather than the fixed voltage biased by the resistors 6 and 7 at the cathode of the pin diode 5,
When the anode voltage of 1 decreases, a minute current flows into the pin diode 5, the high frequency resistance of the pin diode 5 decreases, and the amount of signal attenuation decreases. As described above, the present invention is a circuit for attenuating the signal level by turning on and off the pin diode 5 by the voltage drop due to the collector resistance 8 of the transistor 1, and for driving the amplifying transistor 1 and the pin diode. Since the pin diode 5 is driven by using the transistor also and a part of the collector current flowing through the transistor 1, the AGC circuit has a small size and low power consumption. In the circuit of the present invention, the low-capacitance capacitor 14 is connected between the cathode and the anode of the pin diode 5 in order to keep the signal attenuation below a certain value even if the AGC control voltage is lowered. (Fig. 1 (a)) Also, instead of this low-capacity capacitor, as shown in Fig. 1 (b), a large-capacity capacitor 26
A circuit in which the resistor 22 and the resistor 22 are connected in series may be connected between the anode and the cathode of the pin diode 5. A case where the circuit of the present invention is used in a 400 MHz band second IF circuit of a satellite broadcast receiver will be described. Satellite receiver, BS converter and
The BS tuner is used, and the signal obtained by converting the 12 GHz band signal to the 1 GHz band first IF signal by the BS converter is input to the BS tuner. In the BS tuner, the 1st IF received in the 1 GHz band
A desired signal is selected from the signals, converted into a 400 MHz band second IF signal, and demodulated. Here, since the input level of the BS tuner has a range of -20 to -60 dBm and 40 dB, an AGC circuit is required to make it the same level. In the BS tuner, to prevent deterioration of NF characteristics and distortion characteristics,
Two-stage A to apply AGC in the first IF circuit and the second IF circuit
A GC is generally used, and the gain control of the AGC of the first IF circuit (hereinafter referred to as the first AGC circuit) is 30 dB or more, and the AGC of the second IF circuit (hereinafter referred to as the second AGC circuit) is about 10 dB. The 2AGC circuit is operated, and the first AGC circuit is operated at a low AGC control voltage. Therefore, when the AGC control voltage is 5 to 4 V, an attenuation of about 10 dB is obtained, and at 4 V or less, the second AGC circuit in which the gain does not change is required.
Therefore, in the AGC circuit of the present invention, when the AGC control voltage supplied from the terminal 20 is 5V, the pin diode 5 is switched from ON to O.
A bias condition was set such that the state transitioned to the FF state, and further, the cathode and the anode of the pin diode 5 were connected by a capacitor 14 that attenuates the AGC control voltage by 10 dB near 4 V and does not further attenuate. FIG. 2 shows the characteristics of the circuit of the present invention shown in FIG. 1 when used as a 400 MHz band AGC circuit of the satellite broadcast receiver. Good characteristics with a gain control width of about 12 dB are obtained with an AGC control voltage of 5 to 4V.

A second embodiment is shown in FIG. This is a circuit in which a bias is supplied from a power supply using a choke coil 23 as a fixed bias of the anode of the pin diode 5, and the same operation as that in the embodiment of FIG. 1 is performed and the same effect is obtained.

FIG. 4 shows a third embodiment. This is a circuit in which a bias is supplied using a Zener diode 24 as a fixed bias for the anode of the pin diode 5, and the same operation as the embodiment of FIG. 1 is performed and the same effect is obtained.

FIG. 5 shows a fourth embodiment. This is one in which resistors 25 and 27 are connected to the base 2 of the transistor 1, one is used as a power supply voltage supply terminal and the other is used as an AGC control voltage supply terminal, and the AGC control voltage becomes a small value near 0V. However, the base 2 of the transistor 1 is biased with a voltage determined by the power supply voltage and the resistors 25 and 27, and a current flows through the transistor 1 to prevent deterioration of distortion characteristics. Even if this circuit is used, the same operation as that in the embodiment of FIG. 1 is performed and the same effect is obtained.

〔The invention's effect〕

The present invention, by applying an AGC control voltage to the base of the amplifying transistor, by the voltage drop of the collector resistance of the transistor,
It is a circuit that attenuates the signal level by turning on and off the pin diode connected in series to the collector of the transistor.The amplifying transistor is also used as the drive transistor for the pin diode, and part of the collector current flowing through the transistor is used. Since it is used to drive the pin diode, a compact and low power consumption AGC circuit can be obtained.

[Brief description of drawings]

1 (a) and 1 (b) are circuit diagrams of the first embodiment of the present invention, FIG. 2 is a characteristic diagram of the circuit of the present invention, and FIGS. 4 is a circuit diagram of an embodiment of FIG. 1 …… Transistor, 5 …… Pin diode 13 …… Switching diode 20 …… AGC control voltage application terminal 21 …… Power supply voltage application terminal, 23 …… Choke coil 24 …… Zener diode

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masatoshi Ohsaw Masatoshi Ohsaw 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitate Video Engineering Co., Ltd. (56) References JP-A-50-157041 (JP, A) 57-145012 (JP, U)

Claims (1)

[Claims] 1. An AG comprising a transistor and a pin diode.
In the C circuit, the collector of the transistor is connected to the cathode of the pin diode, a bias is supplied to this cathode through a resistor, and the anode of the pin diode is connected to
Supply a fixed bias and connect a capacitor in parallel with the pin diode, or connect a series circuit of a capacitor and a resistor,
An AGC circuit is characterized in that an input signal and an AGC voltage are applied to the base of the transistor, and an output signal is taken out from the anode side of the pin diode.