JPH0744662B2 - Solid-state imaging device - Google Patents

Description

The present invention relates to broadcasting using a solid-state imaging device in which a plurality of photoelectric conversion elements and a CCD shift register for extracting an optical signal from each photoelectric conversion element are integrated on a semiconductor substrate. The present invention relates to a solid-state imaging device such as a video camera, a VTR camera, and an electronic camera.

[Background of the Invention]

The solid-state image pickup device requires an image pickup plate having a resolution comparable to that of an image pickup electron tube used in the current television broadcasting, and therefore, 500 picture elements arranged vertically and 800 to 1000 picture elements arranged horizontally ( A photoelectric conversion element matrix and a corresponding scanning element are required. Therefore, the solid-state imaging device is manufactured by using the MOS large-scale circuit technology that requires high integration, and CCD or MOS transistor is generally used as a constituent device.

FIG. 1 shows the basic structure of a solid-state image sensor.

FIG. 1A shows the structure of a MOS type element, 1 is a photoelectric conversion element (generally a photodiode is used), 2 is an image pickup area in which photoelectric conversion elements are arranged in a matrix, and 3 is a horizontal position. Is a horizontal scanning circuit (generally a MOS shift register is used), 4 is a vertical scanning circuit for selecting a vertical position, and 5 is a signal output line for extracting a signal of a selected pixel.

FIG. 2B shows the structure of a CCD type device, 3'is a horizontal CCD shift register, 4'is a vertical CCD shift register,
Reference numeral 5'denotes a circuit for detecting the signal of the photoelectric conversion element 1 transferred by the shift registers 4'and 3 '.

The solid-state image sensor is smaller than the conventional imaging electron tube.
It has many advantages peculiar to solid such as light weight, no afterimage, low power consumption, maintenance-free, long life, and no graphic distortion. Therefore, in addition to broadcast cameras, VTR cameras, etc., extremely wide-ranging applications such as input devices for measurement, industrial use, and information processing are expected, and vigorous research and development are currently underway. However, as an integrated circuit (LC) element, the chip size is extremely large, which causes a low yield. As mentioned above, the solid-state image sensor can be highly integrated.
Made using MOS large-scale circuit technology, but still 10mm
It requires x10 mm, which corresponds to 5 to 10 times the occupied area of a general semiconductor memory. Furthermore, in the future, 1000 (vertical direction) x 1600 (horizontal direction) pixels will be required to improve the resolution. In addition, 1000 × 1600 pixels or more are required for application to electronic cameras and the like. Therefore, it is an unavoidable fact that the chip size is increased, and further, a fine processing technology several steps higher than the current one is required. This can be a major factor in lowering the yield than ever before.

[Object of the Invention]

It is an object of the present invention to solve the above problems, reduce the cost, and expand the field of application. Another object of the present invention is to provide a solid-state image pickup device having high image quality. Still another object of the present invention is to provide means for improving the yield of solid-state imaging devices.

[Outline of Invention]

In order to achieve the above object, the present invention can be achieved by previously integrating the number of pixels or the number of stages of scanning elements in a larger amount than necessary. The present invention also seeks to improve the effective yield by screening out a region where no defect exists and securing a required number of pixels through inspection after device fabrication.

Example of Invention

Hereinafter, the present invention will be described in detail with reference to examples. In addition,
The MOS type element is shown as a reference example. FIG. 2 is a diagram showing a configuration in which the number of pixels is increased by an arbitrary number (δ) from the number required for the element. FIGS. 9A and 9B show the case of a MOS type element, and assuming that the number of picture elements originally required for the element is n in the horizontal direction and m in the vertical direction, in the element of the reference example, n + δn increased by δn in the horizontal direction, M + δ increased by δm in the direction
Only m are arranged. On the other hand, the number of stages of the horizontal scanning circuit is arranged by n '+ δn, which is the required number of stages n'added by δn, and the number of stages of the vertical scanning circuit is also added by m' + δm.
Only arranged. Here, n = n 'and m = m' when no play is provided in the preceding stage or the final stage of the scanning circuit.

When the fabrication of the imaging IC wafer is completed, inspection is performed to select good chips. In this inspection, when a defect is observed in the region R or D (in the case of FIG. 2A), the region I is used for imaging, and the number of pixels required for the region I m × n should be secured. Here, since the region R or the region where the D signal should not be sent (that is, the region where scanning is not performed), the region HR of the horizontal scanning circuit corresponding to the region R or the vertical scanning circuit corresponding to the region D of the horizontal scanning circuit It is necessary to prevent the generation of the scan pulse output from the area VD. As a specific means for preventing the generation of the scanning pulse from this area, the clock wiring is cut at the position PR or PD using a laser trimming device or the like.
Alternatively, it is conceivable to cut the wiring that transmits the pulse to the next stage.

When defects are observed in the upper (U), lower (D) left (L) or (right) regions as in the case of FIG. 2B, the central region I is used for imaging. Decide that area I
It suffices to secure the required number of pixels m × n. Where the area
U, D, L or R is an area where no signal should be sent. The following method can be considered as a specific means for this. (A) In order not to output the signal of the area L, the signal output wiring is cut at the PLL point and the output wiring of the SL portion is cut off, or the clock wiring of the area HL in the horizontal scanning circuit is cut at the PL point. (B) In order not to output the signal in the region R, the clock wiring or the wiring for transmitting the pulse to the next stage is cut at the PR point. Further, there is also a method of disconnecting the vertical signal output line 6 existing on the right of the point at the PRR point so as not to connect to the signal output line 5. (C) In order not to output the signal of the area U, the clock wiring is cut at the PU point.
(D) In order not to output the signal of the area D, the clock wiring or the wiring for transmitting the pulse to the next stage is cut at the PD point.

Further, it is also possible to output all signals from the solid-state image pickup device, select them in other circuits, and use them as outputs of the image pickup apparatus.
Such use is also effective in preventing camera shake in electronic cameras such as VTR cameras.

2 (c) and 2 (d) show a CCD type device according to the present invention, wherein FIG. 2 (c) corresponds to FIG. 2 (a) and FIG. 2 (d) corresponds to FIG. 2 (b). is doing. Also in FIGS. 7C and 7D, the region I may be used as in the case of FIGS. However, since the CCD shift register which constitutes the CCD type device has an operational restriction that charges can be transferred only in one direction, the following limitation is added especially to FIG. In the regions L, U and R, no matter whether the photoelectric conversion element or the vertical CCD shift register has a defect, this portion should not be used according to the same principle as described above. However, if there is a defect in the area D, even if there is a defect in the photoelectric conversion element, it is sufficient not to use this portion as described above. However, if there is a defect in the vertical CCD, the vertical CCD in the area D is used. Serves as a path for the signal charge in the area I, so that it is virtually impossible to transfer the charge to the horizontal CCD. That is, the present invention cannot save the device when the vertical CCD in the region D is defective. This also applies to the horizontal CCD, and if there is a defect after the PR point, the necessary number of stages n'can be secured by excluding the region HR. For example, if the region HR has a defect, the signal charge of the region I can be obtained. The device cannot be saved by the present invention because it becomes impossible to transfer the data. Except for the above two cases (when there is a defect in the vertical CCD of the area D and when there is a defect in the area HL of the horizontal CCD), the present invention also applies to the CCD type element in the above-described FIGS. This is effective as in the case of b), and the number of pixels m × n necessary for the region I may be secured.

The clock wiring is cut at the PU or PR point to prevent the signal of the area U or R from being output, and the CCD electrode HR on the right side of the PR point is cut to prevent the signal output of the area R, or the HR area. It is conceivable that the vertical CCD and the horizontal CCD in the above are not connected. If the photoelectric conversion element in the area D is defective, the signal in this area is also taken out to the output circuit 5 ', and the signal in this area is output in the vertical blanking period (a period that is not included in the image) when creating the image signal. If it is housed inside, only the signal in the area I can be used.
If the blanking period described here is used, the method of disconnecting the wiring as described above becomes unnecessary, and the defect signals in the regions U and D are in the vertical blanking period, and the defect signals in the regions L and R are in the horizontal blanking period. Therefore, it is possible to obtain the signal of only the required area I.

By providing extra pixels δn and δm as in the present invention and ensuring a predetermined number of pixels (m × n) in a region where no defect exists, the yield is a predetermined number of pixels (m × n) from the beginning as in the conventional case.
This is a significant improvement over the case where only n) are arranged.
However, providing an extra number of pixels leads to an increase in chip size on the one hand, so there is no effect even if the values of δn and δm are increased without limit, and the upper limits of δn and δm are about n and m (n + δn). <2n, m + δm <2m).

In FIG. 2, the case where a defect exists in the pixel area was considered. On the other hand, a decrease in yield due to a defect in the scanning circuit rather than in the pixel region is another factor that cannot be ignored. FIG. 3 shows an embodiment in which extra scanning circuits are provided above and below or to the left and right of the pixel area. FIG. 3A shows a MOS type element, which is an extra scanning circuit 3-in addition to the normal horizontal scanning circuit 3-1.
This is the case where 2 is provided. As a result of the inspection, the upper scanning circuit 3
If a failure is found at -1, the lower (extra) scanning circuit will be used. Along with this, the signal output line also uses the output line 5-2 provided on the lower side (it suffices not to apply a driving power source such as a clock pulse to a scanning circuit which is not used). Since the signal charge can be taken out in any direction by the line, it is possible to take out the signal to either the upper output line or the lower output line in this way.

FIG. 3B shows a case where an extra scanning circuit 4-2 is provided in addition to the regular vertical scanning circuit 4-1 in the MOS type element. If a failure is found in the left scanning circuit 4-1 as a result of the inspection, the left (extra) scanning circuit 4-2 will be used.

FIG. 3 (c) shows a case where extra horizontal and vertical scanning circuits 3-2 and 4-2 are provided in addition to the normal horizontal and vertical scanning circuits 3-1 and 4-1 in the MOS device. Test results,
If a failure is found in the upper horizontal scanning circuit or the left vertical scanning circuit, the lower (extra) or right (extra) scanning circuit will be used.

Thus, even if one extra horizontal scanning circuit or vertical scanning circuit is integrated in advance, the area occupied by these circuits is 1/10 to 1/20 of the pixel area, and the increase in chip size can be ignored. Is the amount. Therefore, the decrease in yield due to the extra scanning circuits can be almost ignored, and the normal operation of either one of the scanning circuits can substantially improve the yield substantially.

FIG. 3 (d) shows a case where an extra horizontal CCD shift register 3'-2 is provided in the CCD type device in addition to the regular horizontal CCD shift register 3'-1. As a result of inspection, if a failure is found in the lower (normal) CCD register, the upper C
The CD register will be used. In this case, the phase relationship of the vertical clock pulse is reversed from the normal case, and the vertical CC
The transfer direction of the D shift register may be reversed from the normal direction, and the signal charge may be sent upward. Further, when the signals are transferred in the opposite direction and the signal is taken out from the output 5'-2, the package 7 is mounted in the same manner as the normal case (Fig. 3 (f)).
9-1), a regular image (8 in FIG. 3E) is displayed on the monitor.
An inverted image (8-2 in FIG. 3 (e)) that is the opposite of -1) appears. Therefore, in the case of reverse transfer, that is, when the extra horizontal CCD shift register 3'-2 is used, it is necessary to mount the chip package in the reverse direction from the normal (9-2 in FIG. 3 (g)). As a result, an erect image (8-1 in FIG. 3 (e)) similar to that in the normal case can be obtained on the monitor. In this way, it is necessary to consider the mounting direction in the case of a CCD type device in which the scanning direction changes depending on the transfer direction. In the MOS type device, even if the signal is taken out from above, 5-1 or from below ( 5-2), since the scanning direction does not change, the mounting direction may be the same in any case.

FIG. 4 is an embodiment showing a case where both the methods of FIGS. 2 and 3 are incorporated. FIG. 4 (a) shows a case of a MOS type element, which includes an extra pixel area δm, in addition to the necessary pixel area m × n.
δn is provided, and an extra horizontal scanning circuit 3-2,
A vertical scanning circuit 4-2 is provided. Figure 4 (b)
In addition to the pixel area m × n required in the case of a CCD type element, extra pixel areas δm and δn are provided, and an extra horizontal CCD
A shift register 3'-2 is provided. The operation of this element will be omitted because it is a combination of the description of FIGS. 2 and 3.

[Effects of the Invention] As described above with reference to the embodiments, in the present invention, by providing an extra pixel or scanning circuit in advance and using a normal pixel region or scanning circuit, a predetermined pixel and The yield is greatly improved as compared with the case of the conventional solid-state image sensor having only a scanning circuit, and its practical value is extremely high.

In addition, the image quality can be improved as compared with the case where an image is output with a defect. As a concrete example, 600 pixels (standard number of pixels required for the PAL method) are provided in the vertical direction in advance, and if all the pixels have no defects, they are used as PAL elements. The use of an element for the NTSC system, which secures pixels and uses 500 pixels as a standard, also greatly contributes to the improvement of the element yield and the low price.

[Brief description of drawings]

FIG. 1 is a diagram showing a basic configuration of a conventional solid-state image pickup device, and FIG.
FIGS. 2A and 2B are plan views showing the structure of a MOS type device of a reference example, FIGS. 2C and 2D are plan views showing the structure of a CCD type device according to the present invention, and FIG. ) To (c) are other reference examples.
3 is a plan view showing the structure of a MOS type device, FIG. 3 (d) is a plan view showing the structure of another CCD type device according to the present invention, and FIG. 3 (e) is for explaining image formation on a monitor. Figure, third
FIGS. 4 (f) and 4 (g) are views for explaining the image formation on the package, FIG. 4 (a) is a plan view showing the configuration of a MOS type device of another reference example, and FIG. FIG. 6 is a plan view showing the configuration of another CCD type element according to the present invention. 1 ... Photoelectric conversion element, 2 ... Imaging area, 3 ... Horizontal scanning circuit, 3 '... Horizontal CCD shift register, 4 ... Vertical scanning circuit, 4' ... Vertical CCD shift register, 5 ... Signal output Line, 5 '... Signal detection circuit, 6 ... Vertical signal output line, 7 ... Package, 8 ... Monitor reproduced image.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Ichio Takemoto 1-280, Higashi Koikeku, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Inventor Shinya Oba 1-280, Higashi Koikeku, Kokubunji, Tokyo Central Research Laboratory, Hitachi, Ltd. (56) Reference JP-A-57-178479 (JP, A) JP-A-53-124028 (JP, A) JP-A-56-102172 (JP, A)

Claims (5)

[Claims] 1. A semiconductor substrate, a photoelectric conversion element group in which photoelectric conversion elements are provided in a matrix form in the vertical and horizontal directions on the semiconductor substrate, and a vertical direction for transferring an output signal from the photoelectric conversion element in the vertical direction. In a solid-state imaging device having a CCD and a horizontal CCD for horizontally transferring the output signal transferred by the vertical CCD, the photoelectric conversion element group is provided in a matrix of m × n arranged vertically and horizontally. A first photoelectric conversion element group composed of a plurality of photoelectric conversion elements, and provided in a matrix on at least one of the right and left parts in the horizontal direction of the first photoelectric conversion element group, and the total number of m × δn A second photoelectric conversion element group composed of photoelectric conversion elements, and a matrix shape is provided on at least one of the upper and lower portions of the first and second photoelectric conversion element groups in the vertical direction, and δm × (n + δ) as a whole.
n) a third photoelectric conversion element group composed of photoelectric conversion elements, and an output signal from the second photoelectric conversion element group is output from the third photoelectric conversion element group within a horizontal blanking period. Means for reading the output signal during the vertical blanking period, and the output read from the first photoelectric conversion element group among the signals read from the first, second, and third photoelectric conversion element groups A solid-state imaging device, further comprising: a unit that outputs the signal as a video signal. 2. The solid-state image pickup device according to claim 1, wherein a photoelectric conversion element having a defect is included in the second and third photoelectric conversion element groups. 3. The solid-state image pickup device according to claim 1, wherein the solid-state image pickup device is a broadcast camera. 4. The solid-state imaging device according to claim 1 or 2, wherein the solid-state imaging device is a VTR camera. 5. The solid-state imaging device according to claim 1 or 2, wherein the solid-state imaging device is an electronic camera.