JPH0744676B2 - Pixel retouching device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pixel adjusting device for digital recording / reproduction of images such as a digital video tape recorder.

2. Description of the Related Art As a conventional pixel modifying device, for example, Japanese Patent Laid-Open No. 60-226075
There is a digital data reproducing circuit disclosed in the publication.

FIG. 5 shows an example of a configuration in which the conventional pixel modification device is applied to a digital VTR, and 1 is an estimation of a target pixel (hereinafter, used as a synonym of a modified pixel) from a series of input data and flags. It is an interpolation filter that calculates a value. A circuit 2 controls the multiplexer 3 based on the estimated value calculated by the interpolation filter 1, the original value of the target point, and the error flag. Reference numeral 4 is a circuit for delaying the input data of the number of processing steps corresponding to the interpolation filter 1.

In the conventional pixel modification device configured as described above, the interpolation filter 1 estimates the input pixel value. The control circuit 2 selects the original value of the input pixel, the flag, and the estimated value. If the error flag of the input pixel indicates invalid, the input pixel value is likely to be incorrect. Therefore, it is necessary to replace the estimated values from the pixels preceding and succeeding. This is called modification. However, in a digital VTR application in which error coding (for example, Reed-Solomon coding) is performed on a block-by-block basis as a group of pixels that has a pixel sequence as an input, and error detection is performed on a block-by-block basis during playback, it is invalid on a block-by-block basis. It can be foreseen that the pixel can be subject to retouching even though the pixel has an error flag indicating that it is not an error. In this conventional example, in order to cope with this, a threshold value m is provided for modification, and the original value of the input pixel is set.
The multiplexer 3 is controlled to output the estimated value Dc only when the absolute value | Di−Dc | of the difference between Di and the estimated value Dc obtained by the interpolation filter 1 is m or more and the error flag indicates invalid. .

If there is not much difference between the interpolated value and the original value, it is considered that the image quality is not affected by the presence / absence of the modification. However, the conventional example is effective in accurately storing the original value of the digital data.

Problems to be Solved by the Invention However, in the above-described configuration, the output corresponding to the absolute value of the difference between the estimated value and the original value becomes large in the part corresponding to the high band in the two-dimensional frequency space of the image, and the high band component of the image There is a problem in that it is not possible to change the determination of invalidity based on the error flag for the pixels constituting the.

In the above-mentioned conventional example, the structure of the interpolation filter is not specified, but assuming that a pixel is interpolated from four horizontal and vertical neighbors, for example, the calculation for determining whether or not the target pixel is truly incorrect is performed. By observing the output of the dimensional digital filter shown in FIG. 6, the transfer characteristic in the two-dimensional frequency space can be expressed by the following equation.

(4-Z ⁻¹ −Z ⁺¹ −W ⁺¹ −W ⁻¹ ) / 8 where Z = exp (2πjf _h / fs) W = exp (2πjf _v / cph) fs = sampling frequency [Hz] cph = the number of scanning lines / screen height, a f _h = horizontal frequency [Hz] f _v = vertical frequency [cph].

When the above transfer function is modified, it becomes = (1-cos (2πfh / fs) + 1-cos (2πfv / cph)) / 4.

According to the above transfer characteristics, the cosine function monotonically decreases up to 1/2 sampling frequency, so that the transfer characteristics monotonically increase for the high frequency components of the image. That is, if the error flag for the pixel forming the high frequency component of the image indicates invalid, it means that the image is subject to modification regardless of its authenticity.

In particular, there is a possibility that the high-frequency portion in the image, the thin line, or the contour portion of the area may be erroneously modified. Even if the interpolation filter taken as an example is more generally interpreted, many valid pixels are determined to be invalid as long as the threshold determination based on the error from the interpolation value is simply used to determine whether the error flag is true or false. Had the possibility to

In view of the above point, the present invention has an object to provide a pixel retouching device with high retouching accuracy that enables effective / invalid determination even in a high-frequency component of an image.

Means for Solving the Problems The present invention takes as input a pixel series of an image to which an error flag indicating validity and invalidity of sampled digital data is added, and indicates that at least an error flag belonging to the pixel series is invalid. Correlation calculation circuit for calculating a plurality of N-dimensional vectors, which are correlation vectors in the N-direction (N ≧ 2) correlation direction in a two-dimensional space, for each pixel and its neighboring pixels And evaluating the plurality of correlation vectors of the correlation calculation circuit with respect to a pixel in which an error flag is invalid among pixels in the pixel series or a neighboring pixel, When the correlation is recognized, the invalid error flag of the target pixel is determined to be valid, and when the correlation of the sameness between the plurality of vectors is not recognized, it is determined to be invalid. A fixed means,
At least an arithmetic circuit that calculates a correction value for a pixel that is determined to be invalid by the validity determining unit based on its neighboring pixel value, and that value for the pixel that is determined to be invalid by the validity determining circuit, by the arithmetic circuit. A pixel modifying device having a replacing circuit for replacing an output.

Action The present invention has the above-described configuration, for each pixel belonging to the pixel series, sets the correlation strength in the N direction (N ≧ 2) correlation direction in the two-dimensional space with respect to the target pixel and its neighboring pixels in N terms. The correlation calculation circuit outputs a plurality of represented correlation vectors. The validity determining means regards a pixel for which the error flag is determined to be invalid, and if there is no correlation between the plurality of correlation vectors, considers that it is because the target pixel value is incorrect and determines that the pixel is truly invalid. . On the contrary, if the plurality of correlation vectors have the same identity, the validity determining means determines that the target pixel is truly valid.

Separately from this, the arithmetic circuit calculates the modification value of the target pixel, and the replacement of the original value and the modification value is replaced with respect to the target pixel for which the validity flag is judged to be invalid and the target pixel is judged to be truly invalid. Executed by means.

Example A pixel series as an input is composed of 250 scanning lines in the vertical direction and 360 sample points per scanning line in the horizontal direction,
It is assumed that each sample point is quantized with 8 bits and a 1-bit error flag is already added to each data by error detection. It is premised that the input pixel series is converted into a pixel series of 720 sample points per scanning line after the modification according to the present embodiment by interpolation, and the information necessary for interpolation is superimposed on the least significant bit without specifying, for example. It has been done. The error detection method is not specified in the same way, but for example, single error correction and double error detection are performed on a block that is Reed-Solomon-encoded such that 4 redundant data is added to 60 data (64, 60). Methods etc. are considered. According to the error detection method described above, error correction is not performed for double or more errors, and an error flag is added as "invalid" to all in-block data within a range where an error can be detected. In this embodiment, if the bit of the error flag is “0”, it is treated as valid, and if it is “1”, it is treated as invalid. A first embodiment of the pixel modification device will be described with reference to FIGS. 1, 2, and 4.

FIG. 1 is a block diagram for explaining the configuration of the first embodiment of the present invention. 5, 6, 7, 8, and 14 are adders, 9, 10, 15, and
16 is a subtractor, 11, 12, 13 are multipliers 17 for doubling the input,
Reference numeral 18 is a multiplier having an input of 1/4, 19 and 20 are multipliers having an input of 1/8, and 21 is a determination circuit (I) which receives the outputs of the multipliers 17 to 20 and determines whether the invalid flag is true or false. ), 22 is a switcher (II) that selects one modification value from five modification values, and 23 is a comparison that compares the horizontal and vertical correlation values from neighboring pixels and outputs the direction with strong correlation as 1-bit data. A circuit, 24 is a divider having an input of 1/2, 25, 26, 27, 28, 29 are OR gates, 30 is a control circuit for controlling the switcher 22 by the error flag of the neighboring pixels and the direction of correlation, and 31 is The switcher (I) 32 for selecting the modified value and the original value is an AND gate.

The first embodiment configured as described above will be described with reference to FIGS. 2 and 4. Blocks 5 to 20 in FIG. 1 perform the following calculations.

e0 = a1 + a5 e1 = a3 + a7 e2 = a2 + a6 e3 = a0 + a4 v0 = (2x-e0) / 4 h0 = (2x-e1) / 4 h1 = (2e0-e2-e3) / 8 v1 = (2e1-e2-e3) / 8 In the first embodiment of the present invention, the decision circuit (I) 21 is constructed as shown in FIG. In FIG. 2, 33 and 34 are subtracters for calculating the difference between two inputs, and 35 and 36 are square values for the inputs.
A ROM table, 37 is an adder, 38 is a ROM table for obtaining a square root, and 39 is a judgment circuit (II) which outputs a comparison result with an input threshold value in 1 bit.

Here, the inter-vector distances of the correlation vectors (v0, h0) and (v1, h1) represented by the above-mentioned calculation results v0, h0, v1, h1 as a binary set are obtained. The calculation is performed as follows.

D = ((v0-v1) ² + (h0-h1) ² ) ^1/2 Judgment circuit (II) 38 outputs a 1 if D> S and a 0 if D ≦ S for a certain threshold S If the inter-vector distance between the two binomial sets is, the decision circuit I21 outputs "1".

Meanwhile, the comparison circuit 23, the control circuit 30, the switcher III22 and the OR
The modification value is selected by gates 25 to 28.

In the present embodiment, one of the intermediate results e0, e1, e2, e3 by the above calculation is selected as the modification value. This selection operation is shown in Table 1 below.

In Table 1, "0" and "1" mean the OR output of the error flag of each pixel, and "X" means any content. The modification value selected as above passes through the switcher (II) 22 and the multiplier.
It is halved by 24 and becomes the A input of switcher I31.

On the other hand, the B input of the switcher I has the pixel X to be modified.
When the error flag of the pixel X is "1" from the AND gate 32 and the output of the OR gate 29 is "1", the switcher 31 outputs the A input, that is, the modified value. When the output of the OR gate 29 becomes 1, it means that some of the neighboring 8 pixels have an error flag of "1" or the output of the decision circuit I is "1" which indicates that the pixel is truly invalid. According to the first embodiment configured as described above, two binomial sets representing the strengths of horizontal and vertical correlations centering on the pixel X to be modified, one of which is four neighborhoods including the pixel X The remaining one is obtained from 8 neighborhoods that do not include the pixel X.

Here, the two-dimensional frequency response v0 (f _h ,
f _v ), h0 (f _h , f _v ), v1 (f _h , f _v ), h1 (f _h , f _v ) can be expressed by the following equations.

h0 (f _h , f _v ) = (1-cos (2πf _v / cph) / 2 v0 (f _h , f _v ) = (1-cos (2πf _h / f _s )) / 2 h1 (f _h , f _v ) = cos (2πf _v / cph) ・ (1-cos (2πf _h / f _s )) / 2 v1 (f _h , f _v ) = cos (2πf _h / fs) ・ (1-cos (2πf _v / cph)) / 2 where f _s = sampling frequency [Hz] cph = number of scanning lines / screen height, and f _h = horizontal frequency [Hz] f _v = vertical frequency [cph].

The correlation vector (v0, h0) includes the target pixel X in its calculation, and the correlation vector (v1, h1) does not include the target pixel X in the calculation.

If the value of pixel X is truly valid, then the two correlation vectors should be nearly identical except when both f _h and f _v are higher than the above frequency response. For example, assuming f _v = 0, h0 and h1 match, and v0 and v1 are both 0. Therefore 2
The distance between two vectors is 0, and the pixel value is regarded as valid even if the error flag is shown as "1".

On the contrary, if the value of the target pixel X is truly invalid,
The above-mentioned pixel correlation does not coincide and the disagreement is represented by the magnitude of the inter-vector distance between the correlation vectors (v0, h0) and (v1, h1). In the present embodiment, it is determined that if the inter-vector distance D exceeds a certain threshold value S, it is truly invalid, and if it does not exceed it, it is truly valid.

On the other hand, in this embodiment, in the process of obtaining the above correlation vector, the correction value candidates e0, e1, e2, and e3 are calculated, and the hardware necessary for the correction is also used. Further, in this embodiment, the correlation vector (v1, h1) is also used for selecting the modification value. This makes it possible to provide a more accurate modification value when a pixel is determined to be invalid.

According to this embodiment, since the validity / invalidity is determined depending on whether the pixel correlations are coincident or non-coincidence as described above, the validity / invalidity can be accurately determined up to 1/2 sampling frequency only in the horizontal and vertical directions.

Next, a second embodiment in which the decision circuit (I) 21 shown in FIG. 1 is constructed as shown in FIG.

The first and second embodiments differ only in the configuration of the decision circuit (I) 21. In FIG. 3, reference numerals 40 and 41 are subtractors for obtaining the difference between two inputs, 42 and 43 are absolute value circuits for obtaining the absolute value of the inputs, and a decision circuit II for outputting the comparison result with the threshold values of the inputs of 44 and 45 with 1 bit. , 46 are OR gates.

In the first embodiment, the validity / invalidity of the target pixel is determined by the distance between the correlation vectors represented by two binomial sets, but in the present embodiment, at least one of the absolute values of the differences of the respective terms is a predetermined threshold value. The feature is that it is judged invalid if it exceeds.

In the first embodiment, the square calculation and the square root calculation are required to determine the presence or absence of the correlation, and the ROM is used to realize this. However, in a simpler application, it is considered to be sufficiently practical without calculating the inter-vector distance, and in this embodiment, the hardware scale evaluated by the number of gates can be made smaller than that in the first embodiment.

Since all the coefficients of the multipliers used in the first and second embodiments are powers of 2, the execution of the operation can be realized by bit shift or the like, so that no special device is required and the configuration is easy. Is.

The first embodiment and the second embodiment of the present invention have been described above. In the above embodiment, only two horizontal and vertical directions were used for the correlation comparison, but a total of four directions may be taken into consideration in consideration of the oblique direction, and the configuration in this case can be easily introduced from the present embodiment, and a good determination capability can be obtained. Can be expected. Further, the correlation is compared by using a correlation vector of 4 neighboring pixels including the target pixel to be modified and a correlation vector of 8 neighboring pixels not including the target pixel, but it is also possible to compare between different pixel sets, for example, for each pixel. It is also possible to measure the correlation between the target pixel and vertically and horizontally four neighboring pixels and observe whether or not these correlation vectors are discontinuous as a change in the correlation in the vicinity of the pixel to be modified.

EFFECTS OF THE INVENTION As described above, according to the present invention, the determination of the validity / invalidity of a pixel is characterized by observing a change in the pixel correlation, so that the high frequency component of an image such as a thin line or a contour line is also good. In the sense of preserving the original information of digital signals and in the sense of preventing erroneous correction,
Its practical effect is great.

[Brief description of drawings]

FIG. 1 is a block diagram of a pixel modifying device according to a first embodiment of the present invention, FIG. 2 is a block diagram of a decision circuit according to the first embodiment of the present invention, and FIG. 3 is a second embodiment of the present invention. FIG. 4 is a block diagram of a determination circuit in an example, FIG. 4 is an explanatory diagram of relative positions of a pixel to be modified and its neighboring pixels, FIG. 5 is a block diagram of a conventional pixel modification device, and FIG. It is explanatory drawing of the relative position of the neighboring pixel used for correlation detection. 5,6,7,8,14,37 …… Adder, 9,10,15,16,33,34,40,41…
… Subtractor, 12,13,17,18,19,20,24 …… Multiplier, 25,26,2
7,28,29,46 …… OR gate, 32 …… AND gate, 35,36 ……
Square ROM table, 38 …… Square root ROM table, 42, 43…
… Absolute value conversion circuit.

Claims (4)

[Claims] 1. A pixel series of an image to which an error flag indicating validity and invalidity of sampled digital data is added as an input, and at least each pixel belonging to the pixel series and indicating the invalidity of the error flag and the vicinity thereof. 2 for a pixel
A correlation calculation circuit for calculating a plurality of N-dimensional vectors, which are correlation vectors in the correlation direction in N directions (N ≧ 2) in the dimensional space, and an error in the pixels in the pixel series. Evaluating the plurality of correlation vectors of the correlation calculation circuit with respect to a pixel whose flag indicates invalid or a neighboring pixel, and when a correlation of identity is recognized between the plurality of correlation vectors, the target pixel is determined to be invalid. And a validity determining unit that determines that the error flag is valid and determines that the correlation is not valid between the plurality of vectors, and at least a pixel that is determined to be invalid by the validity determining unit. And a replacement circuit that replaces the value of the pixel determined to be invalid by the validity determination circuit with the output of the calculation circuit, the calculation circuit calculating the modification value based on the neighboring pixel value. Pixel correcting device, characterized in that. 2. A correlation vector which is an output of a correlation calculation circuit is obtained from only the neighboring pixels by excluding the first correlation vector obtained by including the target pixel with respect to the target pixel to be modified and the target pixel. 2. The pixel retouching device according to claim 1, wherein the second correlation vector is two, and the validity determining means depends on the correlation between the two vectors. 3. The validity determining means makes a determination by comparing a vector distance of a plurality of correlation vectors with respect to a pixel whose error flag to be determined is invalid and its neighboring pixels with a certain threshold value. The pixel retouching device according to claim 1. 4. The validity judging means is a first object to be judged.
3. The pixel retouching device according to claim 2, wherein the determination is made by comparing an inter-vector distance between the correlation vector and the second correlation vector with a certain threshold value.