JPH0744677B2 - Luminance signal processing circuit for recording - Google Patents

Description

The present invention relates to a luminance signal processing circuit for recording of a VTR (video tape recorder), which is unadjusted so as to be particularly suitable for IC (integrated circuit). The present invention relates to a recording luminance signal processing circuit including a simplified clipping circuit.

(B) Conventional technology In a VTR, a luminance signal is generally FM-modulated and recorded. However, since a higher frequency signal is more susceptible to noise during FM modulation, a pre-emphasis circuit is used before recording. , S / N by increasing the level of high frequency signal of luminance signal
The ratio is improving. In the luminance signal in which the high frequency components are emphasized by the pre-emphasis circuit, sharp whiskers occur at rising and falling portions. Since the beard causes overmodulation when performing FM modulation, black-and-white inversion may occur, so that the white clip circuit and the dark clip circuit set the length of the beard to a constant level to prevent overmodulation. . An IC of such a clip circuit is called "Nati
onal Technical Report "Vol.31 No.6 Dec.1985 No.161
Page. FIG. 2 is a circuit diagram showing the clipping circuit. The luminance signal from the input pin (1) is adjusted in level by the AGC circuit (2), and then the clamp signal (2 ') is used to adjust the leading edge of the synchronizing signal. The part is clamped to a predetermined value, and the sub-emphasis circuit (3) and the main emphasis circuit (4) emphasize the high frequency band. The luminance signal with the high frequency emphasized is clipped by the clipping circuit (5).
The length of the beard is regulated to the white clip level and the dark clip level, converted into an FM signal by the FM modulation circuit (6) and applied to the head from the output terminal (6 ').

Therefore, according to the circuit of FIG. 2, the luminance signal in the video signal can be correctly converted into the FM signal.

Note that the sub-emphasis circuit (3) in FIG. 2 is not required during normal recording and is required only during special recording. Since different emphasis characteristics are required during normal recording and during special recording, it is arranged. ing.

(C) Problems to be solved by the invention However, in the circuit of FIG. 2, between the direct current level of the luminance signal applied to the clip circuit (5) and the white and dark clip levels of the clip circuit (5). Since there is no correlation between the two, the white and dark clip levels must be set by the external variable resistors (8) and (9) of the IC (7) respectively, which complicates the manufacturing process and reduces the external circuit. It was not preferable because it increased the number of pins and the number of pins.

(D) Means for Solving the Problems The present invention has been made in view of the above-mentioned points, and a clamp circuit for clamping the tip of the synchronization signal in the luminance signal to the reference voltage, and the output of the clamp circuit. The emphasis circuit includes an emphasis circuit that emphasizes high frequency components in a signal, a first transistor that sets a white clip level according to the reference voltage, and a second transistor that sets a dark clip level according to the reference voltage. And a clipping circuit for clipping the luminance signal which has been emphasized according to 1. at the white clip level and the dark clip level.

(E) Function According to the present invention, the dark and white clip levels are set by using the reference voltage of the clamp circuit to which the luminance signal is applied as the reference voltage of the clip circuit. The distance to can be fixed.

(F) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention.
An input terminal to which a luminance signal from an AGC circuit (not shown) is applied, (11) is a clamp circuit that clamps the luminance signal to the level of the reference power supply (12), and (13) is an output of the clamp circuit (11). A sub-emphasis circuit for emphasizing high frequency components in a signal, (14) a dummy circuit having a DC transfer characteristic equal to that of the sub-emphasis circuit (13), (1
5) is a main emphasis circuit that further emphasizes high frequency components in the output signal of the sub-emphasis circuit (13), and (16) is a clipping circuit that clips the output signal of the main emphasis circuit (15) at a predetermined level. Is.

Next, the operation will be described. The luminance signal applied to the input terminal (10) through the AGC circuit is applied to the clamp circuit (11) via the DC blocking capacitor (17), and the tip of the synchronizing signal is applied to the reference power source (12). Clamped to the level. The clamped luminance signal is applied to the sub-emphasis circuit (13) in order to emphasize high frequency components. The luminance signal is applied to the base of the transistor (18) of the sub-emphasis circuit (13), and an output signal corresponding to the luminance signal is applied from the emitter of the sub-emphasis circuit (13) to the transistor of the differential amplifier circuit ( 20 ) via the resistor (19). Applied to the base of (21). The output signal obtained at the emitter of the transistor (18) is applied to the base of the transistor (23) via the integrating circuit ( 22 ). Therefore, only the low frequency component in the output signal is applied to the base of the transistor (23), the low frequency component is canceled in the differential amplifier circuit ( 20 ), and the high frequency component only. Are amplified and are generated in the collector of the transistor (23). Therefore, an output signal obtained by differentiating the luminance signal appears as a result at the collector of the transistor (23), and the output signal is applied from the emitter of the transistor (24) to the point A, and the output signal of the transistor (18) is applied. It is added to the output signal corresponding to the luminance signal obtained on the emitter side. Therefore, at the point A, a luminance signal in which the high frequency component is emphasized can be obtained. Then, the luminance signal is applied to the main emphasis circuit (15) to further emphasize the high frequency components.

By the way, the dummy circuit (14) has a DC transfer characteristic equal to that of the sub-emphasis circuit (13), and its configuration is almost the same as that of the sub-emphasis circuit (13), for example.
Then, since the voltage of the reference power source (12) of the clamp circuit (11) is applied to the input end of the dummy circuit (14), the synchronization signal obtained at the point A of the sub-emphasis circuit (13) is applied to the output end thereof. A voltage exactly equal to the voltage at the tip is obtained.
In that case, even if the output DC voltage of the sub-emphasis circuit (13) fluctuates due to variations or temperature changes, there is no problem because similar fluctuations occur in the dummy circuit (14). The luminance signal obtained at the point A of the sub-emphasis circuit (13) is amplified by the differential amplifier circuit ( 25 ) of the main emphasis circuit (15) and generated at the collector of the transistor (26). The main emphasis circuit (15) feeds back the luminance signal obtained at the collector of the transistor (26) to the base of the transistor (26) via the transistor (27) and the integrating circuit ( 28 ), and is 100% DC. , The voltage generated at the output terminal (29) becomes equal to the voltage obtained at the point A. Further, the amount of feedback is reduced in terms of AC, so that the high frequency components are amplified. Therefore, if the voltage of the tip of the synchronizing signal applied to the main emphasis circuit (15) and V _S, the voltage becomes even V _S applied to the clipping circuit (16), generated in the output terminal (29) Synchronization voltage of the signal of the tip portion also becomes V _S. At this time, the voltage at synchronizing tip of the connection point B of the clip circuit (16) and the main emphasis circuit (15) is V _S + Vf (although, Vf is PN junction voltage)
Becomes The voltage at point B depends on the clipping circuit (16)
The upper limit (white clip level) and the lower limit (dark clip level) are defined. For example, when the voltage at the point B rises, the transistor (30) is turned on and white clipping is performed, and the voltage at the point B does not become higher than the white clipping level. Then, the voltage V _S + at that time point _{B (R 2 -R 1) I} + Vf ...... (1) Stipulated in.

On the contrary, when the voltage at the point B drops, the transistor (31) is turned on to perform dark clipping, and the voltage at the point B does not become lower than the dark clip level. Then, the voltage at the point B at that time is defined as V _S −R ₁ · I + Vf (2). This is shown in the waveform in FIG. Here, the width from the white clip level to the dark clip level is R ₂ · I (3). The width from the tip of the sync signal to the white clip level is (R ₂ −R ₁ ) I (4), and the clip width from the tip to the dark clip level is R ₁ · I ...... (5 ). That is, the resistance value R ₁ of the resistor (32) and the current source (34)
The dark clip level can be set according to the product of the current value I and the clip width can be set according to the product of the resistance value R ₂ of the resistor (33) and the current value I. With the part as the reference point, the entire clip width and the ratio of the white clip level and the dark clip level can be adjusted.

(G) Effect of the Invention As described above, according to the present invention, the reference voltage of the clamp circuit that clamps the synchronizing signal is used as the reference voltage of the clip circuit. Therefore, the upper and lower limits of the clip circuit are always constant. It can be set to a value and the clip level can be adjusted. Therefore, the effort for adjusting the clip level can be saved, and the external circuits and the number of pins can be reduced when the IC is integrated. Further, as in the embodiment, between the clamp circuit (11) and the main emphasis circuit (15),
When a circuit having a DC voltage fluctuation such as a sub-emphasis circuit (13) is interposed, a dummy circuit having the same DC transfer characteristic is used as a reference power source (12) for the clamp circuit (11).
And the clip circuit (16).

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional clip circuit, and FIG. 3 is a waveform diagram for explaining FIG. (11) …… Clamp circuit, (12) …… Reference power supply, (13)
...... Sub-emphasis circuit, (14) …… Dummy circuit,
(15) …… Main emphasis circuit, (16) …… Clip circuit.

Claims (1)

[Claims] 1. A clamp circuit for clamping a tip of a sync signal in a luminance signal to a reference voltage, an emphasis circuit for emphasizing a high frequency component in an output luminance signal of the clamp circuit, and a current value of a constant current source. And a resistance value of a resistor, a first clip portion for setting a white clip level according to the voltage and the reference voltage from the clamp circuit, and a product of a current value of the constant current source and a resistance value of the resistor. A second clip portion for setting a dark clip level according to the voltage and the reference voltage from the clamp circuit, and is connected to the clamp circuit and the emphasis circuit to change the clip level of the luminance signal in the emphasis circuit. A luminance signal processing circuit for recording, characterized in that the clipping circuit for setting is built into the IC and the clipping level is adjusted.