JPH0746720B2 - Photoelectric conversion device - Google Patents
Photoelectric conversion deviceInfo
- Publication number
- JPH0746720B2 JPH0746720B2 JP61033777A JP3377786A JPH0746720B2 JP H0746720 B2 JPH0746720 B2 JP H0746720B2 JP 61033777 A JP61033777 A JP 61033777A JP 3377786 A JP3377786 A JP 3377786A JP H0746720 B2 JPH0746720 B2 JP H0746720B2
- Authority
- JP
- Japan
- Prior art keywords
- photoelectric conversion
- thin film
- conversion device
- semiconductor layer
- film transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/10—Integrated devices
- H10F39/12—Image sensors
- H10F39/191—Photoconductor image sensors
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- Solid State Image Pick-Up Elements (AREA)
Description
【発明の詳細な説明】 [産業上の利用分野] 本発明は光電変換装置に係り、特に光学的信号を電気的
信号に変換する光電変換部と、該電気的信号を増幅させ
るトランジスタ部とを有する光電変換装置に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric conversion device, and more particularly to a photoelectric conversion unit that converts an optical signal into an electric signal and a transistor unit that amplifies the electric signal. The present invention relates to a photoelectric conversion device.
[従来技術] 最近、ファクシミリ,イメージリーダ等のいわゆる電子
事務機の普及に伴い、小型,低コストの画像入力装置の
需要が高まり、読み取り解像度が高く、高速度で読み取
り可能で、階調特性の良好な密着型イメージセンサが要
求されてきている。[Prior Art] With the recent widespread use of so-called electronic office machines such as facsimiles and image readers, the demand for compact, low-cost image input devices has increased, the reading resolution is high, high-speed reading is possible, and gradation characteristics are high. A good contact image sensor has been demanded.
従来、密着型イメージセンサは、非晶質シリコン(a−
Si)等の半導体層からなる光電変換素子を用いたものが
使われてきたが、高密度化に伴ない、光電流が減少し、
階調特性が悪くなり、光応答性も著しく改善することは
できない等の問題点があげられていた。これらの問題点
を解決するものとして、第6図に示すような光電変換装
置がある。この光電変換装置は、絶縁基板1上にソース
電極2及びドレイン電極3を設け、その上に半導体層
4、絶縁層5、ゲート電極6を積層して形成した薄膜ト
ランジスタ部と、さらにその上に形成した半導体層7、
透明電極8及び直列抵抗の接続された電極9とからなる
光電変換部とから構成される。光電変換部に入力した光
学的信号に応じて、薄膜トランジスタ部のゲート電位を
変化させ、ソース電極とドレイン電極間に光学的信号を
増幅した電気的信号を出力させる。Conventionally, the contact image sensor has been made of amorphous silicon (a-
The one using a photoelectric conversion element consisting of a semiconductor layer such as Si) has been used, but with the increase in density, the photocurrent decreases,
Problems have been raised such that the gradation characteristics are deteriorated and the light response cannot be remarkably improved. As a means for solving these problems, there is a photoelectric conversion device as shown in FIG. In this photoelectric conversion device, a source electrode 2 and a drain electrode 3 are provided on an insulating substrate 1, and a semiconductor layer 4, an insulating layer 5, and a gate electrode 6 are stacked on the source electrode 2 and the drain electrode 3, and a thin film transistor portion is formed thereon. The semiconductor layer 7,
The photoelectric conversion unit includes a transparent electrode 8 and an electrode 9 connected to a series resistor. The gate potential of the thin film transistor unit is changed according to the optical signal input to the photoelectric conversion unit, and an electrical signal obtained by amplifying the optical signal is output between the source electrode and the drain electrode.
[発明が解決しようとする問題点] しかしながら、上記光電変換装置は積層構造を取るため
に、製造工程が複雑で、そのため歩留りが悪く、製造コ
ストが高くなるという問題点を有していた。[Problems to be Solved by the Invention] However, since the photoelectric conversion device has a laminated structure, the manufacturing process is complicated, resulting in poor yield and high manufacturing cost.
[問題点を解決するための手段] 上記の問題点は、光電変換素子、該光電変換素子の1つ
の端子に直列に接続される直列抵抗、該光電変換素子の
前記1つの端子及び該端子と電気的に接続される前記直
列抵抗の1つの端子と電気的に接続されるゲート電極を
有する薄膜トランジスタを有し、前記光電変換素子、前
記直列抵抗及び前記薄膜トランジスタは同一成膜工程で
形成された非晶質薄膜半導体層を有することを特徴とす
る本発明の光電変換装置によって解決される。[Means for Solving Problems] The above-mentioned problems include a photoelectric conversion element, a series resistance connected in series to one terminal of the photoelectric conversion element, the one terminal of the photoelectric conversion element, and the terminal. A thin film transistor having a gate electrode electrically connected to one terminal of the series resistor electrically connected, wherein the photoelectric conversion element, the series resistor and the thin film transistor are formed by the same film forming process. The photoelectric conversion device of the present invention is characterized by having a crystalline thin film semiconductor layer.
[作用] 本発明の光電変換装置は、光電変換素子及び薄膜トラン
ジスタの半導体層として同一成膜工程で形成された非晶
質薄膜半導体層を用い、更に直列抵抗の構成層として該
非晶質薄膜半導体層を用いることにより、積層の数を減
らし、製造工程を簡単化させるものである。[Operation] In the photoelectric conversion device of the present invention, an amorphous thin film semiconductor layer formed in the same film forming process is used as a semiconductor layer of a photoelectric conversion element and a thin film transistor, and the amorphous thin film semiconductor layer is further used as a constituent layer of series resistance. By using, the number of laminated layers is reduced and the manufacturing process is simplified.
[実施例] 以下、本発明の実施例を図面を用いて詳細に説明する。EXAMPLES Examples of the present invention will be described below in detail with reference to the drawings.
第1図は本発明の光電変換装置の第1実施例の構造図で
あり、(a)は平面図,(b)は平面図(a)のA−
A′縦断面図である。FIG. 1 is a structural view of a first embodiment of a photoelectric conversion device of the present invention, (a) is a plan view, (b) is a plan view (A) of FIG.
It is an A'longitudinal sectional view.
第1図において、ガラス基板10上にゲート電極19、窒化
シリコン(Si Nx:H),酸化シリコン(SiO2)等の絶縁
膜11が形成され、その上に非晶質シリコン(a−Si)等
の半導体層12、オーミックコンタクト層のn+層13が順に
形成される。さらにその上に光電変換部20の電極14,1
5、薄膜トランジスタ部21のソース電極17,ドレイン電極
18、直列抵抗部22の接地電極16が形成される。光電変換
部20の電極15は薄膜トランジスタ部21のゲート電極19と
接続され、このゲート電極19には直列抵抗部22が接続さ
れる。本実施例においては、光電変換部20と薄膜トラン
ジスタ部21の絶縁膜11,半導体層12,n+層13等が同時に形
成され、また直列抵抗部22の半導体層12,n+層13も光電
変換部20と薄膜トランジスタ部21の半導体層12,n+13と
同時に形成されるので、製造工程における工程数を少な
くする事ができる。In FIG. 1, a gate electrode 19, an insulating film 11 of silicon nitride (Si Nx: H), silicon oxide (SiO 2 ) or the like is formed on a glass substrate 10, and amorphous silicon (a-Si) is formed thereon. And the semiconductor layer 12 and the n + layer 13 of the ohmic contact layer are sequentially formed. On top of that, the electrodes 14, 1 of the photoelectric conversion unit 20
5, source electrode 17 and drain electrode of the thin film transistor section 21
18, the ground electrode 16 of the series resistance portion 22 is formed. The electrode 15 of the photoelectric conversion section 20 is connected to the gate electrode 19 of the thin film transistor section 21, and the gate electrode 19 is connected to the series resistance section 22. In the present embodiment, the insulating film 11 of the photoelectric conversion portion 20 and the thin film transistor section 21, the semiconductor layer 12, n + layer 13 and the like are formed simultaneously and the semiconductor layer 12, n + layer 13 of the series resistor 22 is also the photoelectric conversion Since the part 20 and the semiconductor layer 12, n + 13 of the thin film transistor part 21 are formed at the same time, the number of steps in the manufacturing process can be reduced.
第2図は上記光電変換装置の等価回路図である。FIG. 2 is an equivalent circuit diagram of the photoelectric conversion device.
第2図において、光電変換装置28は図中破線部であり、
光電変換素子23は光電変換部20、薄膜トランジスタ24は
薄膜トランジスタ部21、直列抵抗25は直列抵抗部22を示
す。光電変換素子23の一端は薄膜トランジスタ24のゲー
ト電極と直列抵抗25の一端に接続される。直列抵抗25の
他端は接地されており、光電変換素子23の他端及び薄膜
トランジスタ24のソース電極はそれぞれ電圧VG,VDがか
けられる。薄膜トランジスタ24のドレイン電極には電荷
を蓄積させるコンデンサ26及び増幅器27が接続される。In FIG. 2, the photoelectric conversion device 28 is a broken line portion in the figure,
The photoelectric conversion element 23 indicates the photoelectric conversion section 20, the thin film transistor 24 indicates the thin film transistor section 21, and the series resistance 25 indicates the series resistance section 22. One end of the photoelectric conversion element 23 is connected to the gate electrode of the thin film transistor 24 and one end of the series resistor 25. The other end of the series resistor 25 is grounded, and voltages V G and V D are applied to the other end of the photoelectric conversion element 23 and the source electrode of the thin film transistor 24, respectively. The drain electrode of the thin film transistor 24 is connected to a capacitor 26 and an amplifier 27 for accumulating charges.
次にこの等価回路によって、本発明の光電変換装置の動
作について説明する。Next, the operation of the photoelectric conversion device of the present invention will be described using this equivalent circuit.
光電変換素子23のコンダクタンスをG1、直列抵抗25のコ
ンダクタンスをG2とするとゲート電極の電位Vgは、 と表される。When the conductance of the photoelectric conversion element 23 is G 1 and the conductance of the series resistance 25 is G 2 , the potential V g of the gate electrode is Is expressed as
いま、光電変換素子23に光が入射した場合、入射前に比
べてコンダクタンスG1が大きくなり、そのために薄膜ト
ランジスタ24のゲート電極の電位Vgも大きくなる。つま
り、光電変換素子23に入射した光学的信号は電気的信号
に変換され、さらに薄膜トランジスタ24によって増幅さ
れる。この増幅された電気的信号はコンデンサ26に蓄積
され、さらに増幅器27によって増幅される。Now, when light is incident on the photoelectric conversion element 23, the conductance G 1 is larger than before the incidence, and therefore the potential V g of the gate electrode of the thin film transistor 24 is also larger. That is, the optical signal incident on the photoelectric conversion element 23 is converted into an electric signal and further amplified by the thin film transistor 24. The amplified electric signal is stored in the capacitor 26 and further amplified by the amplifier 27.
第3図は上記第1実施例をラインセンサに用いた例を示
す。なお、第2図に示した等価回路図と同一部分につい
ては、同一符号を付して重複説明を略す。FIG. 3 shows an example in which the first embodiment is used as a line sensor. Note that the same parts as those in the equivalent circuit diagram shown in FIG.
第3図において、電荷転送部31は、光電変換装置28l〜2
8nの薄膜トランジスタ24l〜24nの各ドレイン電極と接続
されたコンデンサ26l〜26n、コンデンサ26l〜26nに蓄積
された電荷を転送するトランジスタ29l〜29n、トランジ
スタ29l〜29nを順次動作させるためのシフトレジスタ30
l〜30n、増幅用のアンプ27からなる。通常、電荷転送部
31は駆動用ICとして一体化される。In FIG. 3, the charge transfer unit 31 includes photoelectric conversion devices 28 l- 2
Capacitors 26 l to 26 n connected to the drain electrodes of the 8 n thin film transistors 24 l to 24 n , transistors 29 l to 29 n and transistors 29 l to 29 for transferring the charges accumulated in the capacitors 26 l to 26 n. Shift register 30 for sequentially operating n
1 to 30 n , and an amplifier 27 for amplification. Normally, charge transfer unit
31 is integrated as a driving IC.
次に上記第1実施例の光電変換装置の製造方法について
説明する。Next, a method of manufacturing the photoelectric conversion device of the first embodiment will be described.
両面研摩済みのガラス基板(コーニング社製♯7059)10
に中性洗剤を用いて通常の洗浄を施した。次にスパッタ
法でCrを0.05μm厚に堆積し、ポジ型フォトレジスト
(OFPR−800東京応化工業製)を用いて所望の形状にフ
ォトレジストパターンを形成した後、硝酸第2セリウム
アンモニウム及び過塩素酸の混合水溶液を用いて薄膜ト
ランジスタのゲート電極19を形成した。次いでフォトレ
ジスト剥離後、容量結合型のグロー放電分解装置内にガ
ラス基板10をセットし、1×10-6Torrの排気真空下で20
0℃に維持した。次に該装置内に、水素希釈10%SiH4ガ
ス(小松電子製)を100sccm、99.999%のNH3ガスを50sc
cmの流量で流入せしめ、ガス圧を0.4Torrに設定した
後、13.56MHzの高周波電源を用いRF(Radio−Frequenc
y)放電パワー50Wで1時間グロー放電を行い、3000Åの
SiNx:H層の絶縁膜11を形成した。ポジ型フォトレジスト
を用いて所望のパターンを形成し、フォトレジストをマ
スクにしてRIE(反応性イオンエッチング)法により、C
F4ガス20sccm,ガス圧0.1Torr,RFパワー100Wでドライエ
ッチングを行い、フォトレジストの剥離後10%SiH440sc
cm,ガス圧0.1TorrでRF放電パワー50Wで3時間グロー放
電を行い、a−Si等の半導体層12(膜厚5000Å)を形成
した後、10%SiH440sccm,水素希釈100ppmPH3ガス200scc
m,ガス圧0.2TorrでRF放電パワー200Wで1時間グロー放
電を行い、n+層のオーミックコンタクト層のn+層(膜厚
1000Å)13を形成した。次にポジ型フォトレジストを用
いて所望の形状にフォトレジストパターンを形成し、フ
ォトレジストをマスクにしてRIE(反応性イオンエッチ
ング)法により、CF4ガス20sccm,ガス圧0.1Torr,RF放電
パワー100Wでドライエッチングを行い、ゲート電極19上
の不用なn+層,半導体層,絶縁膜を除去した。ついで、
スパッタ法によってAlを0.5μm厚に堆積し、ポジ型フ
ォトレジストを用いて所望の形状にフォトレジストパタ
ーンを形成した後、リン酸(85%水溶液),硝酸(60%
水溶液),酢酸及び水を16:1:2:1の体積比で混合した液
でエッチングしパターンを形成した。Glass substrate (both Corning # 7059) 10 polished on both sides
Was subjected to normal washing with a neutral detergent. Next, Cr was deposited to a thickness of 0.05 μm by a sputtering method, and a photoresist pattern was formed into a desired shape using a positive photoresist (OFPR-800 manufactured by Tokyo Ohka Kogyo Co., Ltd.), and then ceric ammonium nitrate and perchlorine were used. The gate electrode 19 of the thin film transistor was formed using an aqueous mixed solution of acids. Then, after removing the photoresist, the glass substrate 10 was set in a capacitively coupled glow discharge decomposition apparatus, and the glass substrate 10 was placed under an exhaust vacuum of 1 × 10 −6 Torr for 20 minutes.
Maintained at 0 ° C. Next, 100 sccm of hydrogen-diluted 10% SiH 4 gas (manufactured by Komatsu Electronics) and 50 sc of 99.999% NH 3 gas were placed in the device.
The gas flow rate was set to 0.4 Torr, and a high-frequency power supply of 13.56 MHz was used to control the RF (Radio-Frequenc
y) Glow discharge for 1 hour at discharge power of 50W
An insulating film 11 of SiNx: H layer was formed. A desired pattern is formed using a positive photoresist, and the RIE (reactive ion etching) method is used to perform C by using the photoresist as a mask.
F 4 gas 20 sccm, gas pressure 0.1 Torr, dry etching is performed with RF power 100W, 10% after stripping of the photoresist SiH 4 40sc
cm, gas pressure 0.1 Torr, RF discharge power 50W, glow discharge for 3 hours to form semiconductor layer 12 (film thickness 5000Å) such as a-Si, 10% SiH 4 40sccm, hydrogen diluted 100ppmPH 3 gas 200scc
Glow discharge was performed for 1 hour with RF discharge power of 200 W at m, gas pressure of 0.2 Torr, and n + layer of n + layer (film thickness)
1000Å) 13 formed. Next, a photoresist pattern is formed in a desired shape using a positive photoresist, and CF 4 gas 20 sccm, gas pressure 0.1 Torr, RF discharge power 100 W by RIE (reactive ion etching) method using the photoresist as a mask. Then, dry etching was performed to remove the unnecessary n + layer, semiconductor layer, and insulating film on the gate electrode 19. Then,
Al was deposited to a thickness of 0.5 μm by the sputtering method, and a photoresist pattern was formed into a desired shape using a positive photoresist, then phosphoric acid (85% aqueous solution), nitric acid (60%)
Aqueous solution), acetic acid and water were mixed in a volume ratio of 16: 1: 2: 1 to etch a pattern.
次に、フォトレジスト剥離後、先程と同様の方法でRIE
法により、不用のn+層をドライエッチングして除去し、
第1図に示されるような光電変換装置が得られた。Next, after removing the photoresist, the RIE is performed by the same method as above.
By the method, the unnecessary n + layer is removed by dry etching,
A photoelectric conversion device as shown in FIG. 1 was obtained.
第4図は本発明の光電変換装置の第2実施例の構造図で
あり、(a)は平面図,(b)は平面図(a)のA−
A′縦断面図である。なお、第1図に示した第1実施例
と同一部分については同一符号を付し重複説明を略す。FIG. 4 is a structural view of a second embodiment of the photoelectric conversion device of the present invention, (a) is a plan view, (b) is a plan view (A).
It is an A'longitudinal sectional view. The same parts as those of the first embodiment shown in FIG. 1 are designated by the same reference numerals, and the duplicated description will be omitted.
第4図において、ガラス基板10上にITO,SnO2等の透明電
極よりなるゲート電極19が形成され、そのゲート電極19
上にn+層13及び絶縁膜11が形成され、その上に半導体層
12、n+層13が順に形成される。本実施例においては光電
変換部20の電極の一方はソース電極18と共有されるので
光電変換部20の占有面積を減らすことができる。In FIG. 4, a gate electrode 19 made of a transparent electrode such as ITO or SnO 2 is formed on a glass substrate 10.
An n + layer 13 and an insulating film 11 are formed on the semiconductor layer, and a semiconductor layer is formed thereon.
12 and n + layer 13 are sequentially formed. In this embodiment, one of the electrodes of the photoelectric conversion unit 20 is shared with the source electrode 18, so that the area occupied by the photoelectric conversion unit 20 can be reduced.
第5図は上記光電変換装置の等価回路図である。なお、
第2図に示した等価回路図と同一部分については同一符
号を付し重複説明を略す。FIG. 5 is an equivalent circuit diagram of the photoelectric conversion device. In addition,
The same parts as those of the equivalent circuit diagram shown in FIG.
第5図に示すように、本実施例においては、光電変換装
置32の光電変換素子23の一方の電極と薄膜トランジスタ
24のソース電極は共通の電圧VDがかけられる。As shown in FIG. 5, in the present embodiment, one electrode of the photoelectric conversion element 23 of the photoelectric conversion device 32 and the thin film transistor.
A common voltage V D is applied to the 24 source electrodes.
上記の本発明の光電変換装置の第2実施例の動作は第1
実施例と同様であり、次式で表される。The operation of the second embodiment of the photoelectric conversion device of the present invention is the first
This is similar to the embodiment and is represented by the following equation.
なお、詳細な説明については省略する。 The detailed description is omitted.
次に上記第2実施例の光電変換装置の製造方法について
説明する。Next, a method of manufacturing the photoelectric conversion device of the second embodiment will be described.
両面研摩済みのガラス基板(コーニング社製♯7059)10
に中性洗剤を用いて通常の洗浄を施した。次にスパッタ
法でITOを0.1μm厚に堆積し、ポジ型フォトレジスト
(シプレー社製)を用いて所望の形状にフォトレジスト
パターンを形成した後、塩酸,塩化第2鉄の混合水溶液
を用いて薄膜トランジスタのゲート電極19を形成した。
次にオーミックコンタクト層のn+層13を形成後、ポジ型
フォトレジストを用いて光電変換部のフォトレジストパ
ターンを作成後、ドライエッチングによりパターンを形
成をした。フォトレジスト剥離後、SiNx:Hの絶縁膜11を
形成し、n+層13と同様にパターンを形成した。続いてa
−Siの半導体層12,n+層13を実施例1と同様に積層し、
ポジ型フォトレジスト(OFPR−800東京応化工業製)を
用いて、フォトレジストパターンを形成した後、フォト
レジストパターンをマスクにして実施例1と同様にドラ
イエッチングを行い、ゲート電極19上の不用の絶縁膜,
半導体層,n+層を除去した。フォトレジスト剥離後、電
子ビーム蒸着法により、Alを0.5μm堆積し、続いて第
1実施例と同様な方法で、所望の電極パターンを形成
し、ドライエッチングにより不用のn+層を除去し、第4
図に示されるような光電変換装置が得られた。Glass substrate (both Corning # 7059) 10 polished on both sides
Was subjected to normal washing with a neutral detergent. Next, ITO was deposited to a thickness of 0.1 μm by a sputtering method, a photoresist pattern was formed into a desired shape using a positive photoresist (manufactured by Shipley), and then a mixed aqueous solution of hydrochloric acid and ferric chloride was used. The gate electrode 19 of the thin film transistor was formed.
Next, after forming the n + layer 13 of the ohmic contact layer, a photoresist pattern for the photoelectric conversion part was formed using a positive photoresist, and then a pattern was formed by dry etching. After removing the photoresist, an insulating film 11 of SiNx: H was formed, and a pattern was formed similarly to the n + layer 13. Then a
-Si semiconductor layer 12, n + layer 13 is laminated in the same manner as in Example 1,
After forming a photoresist pattern using a positive photoresist (OFPR-800 manufactured by Tokyo Ohka Kogyo Co., Ltd.), dry etching was performed in the same manner as in Example 1 using the photoresist pattern as a mask, and unnecessary gate electrode 19 was removed. Insulation film,
The semiconductor layer and n + layer were removed. After removing the photoresist, Al was deposited to 0.5 μm by an electron beam evaporation method, and then a desired electrode pattern was formed in the same manner as in the first embodiment, and an unnecessary n + layer was removed by dry etching, Fourth
A photoelectric conversion device as shown in the figure was obtained.
[発明の効果] 以上詳細に説明したように、本発明の光電変換装置によ
れば、光電変換素子及び薄膜トランジスタの半導体層と
して同一成膜工程で形成された非晶質薄膜半導体層を用
い、更に直列抵抗の構成層として該非晶質薄膜半導体層
を用いることにより、製造工程数を減らすことができ、
歩留りを向上させ、製造コストも安価にすることができ
る。[Effects of the Invention] As described in detail above, according to the photoelectric conversion device of the present invention, an amorphous thin film semiconductor layer formed in the same film forming step is used as a semiconductor layer of a photoelectric conversion element and a thin film transistor, and By using the amorphous thin film semiconductor layer as the constituent layer of the series resistance, the number of manufacturing steps can be reduced,
The yield can be improved and the manufacturing cost can be reduced.
第1図は本発明の光電変換装置の第1実施例の構造図で
あり、(a)は平面図,(b)は平面図(a)のA−
A′縦断面図である。 第2図は上記光電変換装置の等価回路図である。 第3図は上記第1実施例をラインセンサに用いた例を示
す。 第4図は本発明の光電変換装置の第2実施例の構造図で
あり、(a)は平面図,(b)は平面図(a)のA−
A′縦断面図である。 第5図は上記光電変換装置の等価回路図である。 第6図は従来の光電変換装置の縦断面図である。 10……ガラス基板 11……絶縁膜 12……半導体層 13……n+層 14,15……電極 16……接地電極 17……ソース電極 18……ドレイン電極 19……ゲート電極 20……光電変換部 21……薄膜トランジスタ部 22……直列抵抗部FIG. 1 is a structural view of a first embodiment of a photoelectric conversion device of the present invention, (a) is a plan view, (b) is a plan view (A) of FIG.
It is an A'longitudinal sectional view. FIG. 2 is an equivalent circuit diagram of the photoelectric conversion device. FIG. 3 shows an example in which the first embodiment is used as a line sensor. FIG. 4 is a structural view of a second embodiment of the photoelectric conversion device of the present invention, (a) is a plan view, (b) is a plan view (A).
It is an A'longitudinal sectional view. FIG. 5 is an equivalent circuit diagram of the photoelectric conversion device. FIG. 6 is a vertical sectional view of a conventional photoelectric conversion device. 10 …… Glass substrate 11 …… Insulating film 12 …… Semiconductor layer 13 …… n + layer 14,15 …… Electrode 16 …… Grounding electrode 17 …… Source electrode 18 …… Drain electrode 19 …… Gate electrode 20 …… Photoelectric conversion part 21 …… Thin film transistor part 22 …… Series resistance part
───────────────────────────────────────────────────── フロントページの続き (72)発明者 畑中 勝則 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 (72)発明者 深谷 正樹 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 (56)参考文献 特開 昭58−67075(JP,A) 特開 昭61−187363(JP,A) 特開 昭62−159477(JP,A) ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Katsunori Hatanaka 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Masaki Fukaya 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. Incorporated (56) Reference JP-A-58-67075 (JP, A) JP-A-61-187363 (JP, A) JP-A-62-159477 (JP, A)
Claims (2)
子に直列に接続される直列抵抗、該光電変換素子の前記
1つの端子及び該端子と電気的に接続される前記直列抵
抗の1つの端子と電気的に接続されるゲート電極を有す
る薄膜トランジスタを有し、 前記光電変換素子、前記直列抵抗及び前記薄膜トランジ
スタは同一成膜工程で形成された非晶質薄膜半導体層を
有することを特徴とする光電変換装置。1. A photoelectric conversion element, a series resistor connected in series to one terminal of the photoelectric conversion element, the one terminal of the photoelectric conversion element and one of the series resistors electrically connected to the terminal. A thin film transistor having a gate electrode electrically connected to two terminals, wherein the photoelectric conversion element, the series resistor, and the thin film transistor have an amorphous thin film semiconductor layer formed in the same film forming process, Photoelectric conversion device.
である特許請求の範囲第1項に記載の光電変換装置。2. The photoelectric conversion device according to claim 1, wherein the amorphous thin film semiconductor layer is amorphous silicon.
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61033777A JPH0746720B2 (en) | 1986-02-20 | 1986-02-20 | Photoelectric conversion device |
| DE3751242T DE3751242T2 (en) | 1986-01-24 | 1987-01-22 | Photoelectric converter. |
| EP87300566A EP0232083B1 (en) | 1986-01-24 | 1987-01-22 | Photoelectric conversion device |
| US07/412,586 US4931661A (en) | 1986-01-24 | 1989-09-25 | Photoelectric conversion device having a common semiconductor layer for a portion of the photoelectric conversion element and a portion of the transfer transistor section |
| US07/907,287 US5306648A (en) | 1986-01-24 | 1992-07-01 | Method of making photoelectric conversion device |
| US07/912,651 US5338690A (en) | 1986-01-24 | 1992-07-09 | Photoelectronic conversion device |
| US08/128,108 US5627088A (en) | 1986-01-24 | 1993-09-29 | Method of making a device having a TFT and a capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61033777A JPH0746720B2 (en) | 1986-02-20 | 1986-02-20 | Photoelectric conversion device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62193276A JPS62193276A (en) | 1987-08-25 |
| JPH0746720B2 true JPH0746720B2 (en) | 1995-05-17 |
Family
ID=12395880
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61033777A Expired - Lifetime JPH0746720B2 (en) | 1986-01-24 | 1986-02-20 | Photoelectric conversion device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0746720B2 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5867075A (en) * | 1981-10-19 | 1983-04-21 | Fujitsu Ltd | Composite semiconductor device |
| JPS61187363A (en) * | 1985-02-15 | 1986-08-21 | Fujitsu Ltd | Optical integrated circuit device |
| JPS62159477A (en) * | 1986-01-08 | 1987-07-15 | Fujitsu Ltd | Photosemiconductor device |
-
1986
- 1986-02-20 JP JP61033777A patent/JPH0746720B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62193276A (en) | 1987-08-25 |
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